The present invention relates to a receiver such as an FM receiver, and more particularly to a receiver having an improved practical sensitivity and the like.
The present application claims priority from Japanese Application No.2003-361033, the disclosure of which is incorporated herein by reference.
Referring to
The foregoing intermediate frequency signal SIF is limited to the pass bandwidth BWA when passing through the IF filter 4. The detector 5 performs FM detection on the band-limited intermediate frequency signal Sa to output a demodulation signal Sb.
Here, as shown in
That is, according to the principle of FM modulation and demodulation, the frequency of an FM wave resulting from the FM modulation of a sound wave deviates from a carrier frequency fo in proportion to the amplitude of the sound wave. The maximum frequency shifts ±fmax are the deviations in frequency (the amounts of deviation from the carrier frequency fo) for situations where the sound wave reaches its maximum amplitudes. On this account, the pass bandwidth BWA of the IF filter 4 is determined so as to cover the shift band BS between the maximum frequency shifts (−fmax) and (+fmax) with the carrier frequency fo as the center frequency=0.
For example, in the case of FM broadcasts, the maximum frequency shifts (+fmax) of the FM waves are determined as ±75 kHz. In order to cover the shift band BS between ±75 kHz, the IF filter 4 is given a pass bandwidth BWA of, e.g., 180 kHz which ranges from −90 kHz to +90 kHz.
By the way, in the typical FM receiver described above, the intermediate frequency signal Sa output from the IF filter 4 and the demodulation signal Sb output from the detector 5 are desirably required to trace waveforms containing no noise component, as shown in the waveform charts of
Then, there has conventionally been proposed the technique of narrowing the pass bandwidth BWA of the IF filter 4 with the foregoing carrier frequency fo at the center so that the adverse effect of thermal noise and the like occurring from the radio frequency amplifier 1 is reduced for an improved noise figure (NF). This can reduce upper noise components of the intermediate frequency signal Sa in the vicinity of the practical sensitivity.
Nevertheless, simply narrowing the pass bandwidth BWA of the IF filter 4 with the carrier frequency fo at the center can cause such problems as distortion of the demodulation signal Sb detected by the detector 5 and crosstalk with adjacent channels, possibly hampering the improvement to the practical sensitivity.
The present invention has been achieved in view of the foregoing conventional problems. It is thus an object of the present invention to provide a receiver which achieves an improved practical sensitivity without causing distortion of, e.g., the demodulation signal or impairing the capability of precluding interference with adjacent channels.
According to a first aspect of the present invention, a receiver comprises: a plurality of band-pass filters set to respective pass bandwidths determined by dividing a normal bandwidth covering a shift band of an intermediate frequency signal into two or more portions, the band-pass filters receiving the intermediate frequency signal and outputting intermediate frequency signals band-limited to the respective pass bandwidths; envelope detecting means for detecting envelops of the respective intermediate frequency signals band-limited and outputting envelope signals indicating the envelops of the respective intermediate frequency signals; detectors for performing detection on the intermediate frequency signals band-limited and outputting demodulation signals, respectively; maximum value detecting means for detecting an envelope signal having a maximum amplitude from among the envelope signals; and selecting means for selectively extracting signal components of the demodulation signal corresponding to the envelope signal having the maximum amplitude from among the demodulation signals output from the detectors, and generating and outputting a demodulation signal synthesized on a time axis.
According to a first aspect of the present invention, a receiver comprises: a plurality of band-pass filters set to respective pass bandwidths determined by dividing a normal bandwidth covering a shift band of an intermediate frequency signal into two or more portions, the band-pass filters outputting intermediate frequency signals band-limited to the respective pass bandwidths based on the intermediate frequency signal; envelope detecting means for detecting envelops of the respective intermediate frequency signals band-limited and outputting envelope signals indicating the envelops of the respective intermediate frequency signals; maximum value detecting means for detecting an envelope signal having a maximum amplitude from among the envelope signals; selecting means for selectively extracting signal components of the intermediate frequency signal corresponding to the envelope signal having the maximum amplitude from among the intermediate frequency signals output from the plurality of band-pass filters, and for generating and outputting an intermediate frequency signal synthesized on a time axis; and a detector for performing detection on the intermediate frequency signal output from the selecting means to output a demodulation signal.
These and other objects and advantages of the present invention will become clear from the following description with reference to the accompanying drawings, wherein:
Hereinafter, a best mode for carrying out the invention will be described with reference to
In
The signal processing unit CQ1 is provided with a first IF filter BF1, a first detector DT1, and a first envelope detector EV1. The signal processing unit CQ2 is provided with a second IF filter BF2, a second detector DT2, and a second envelope detector EV2. The same holds subsequently, and the signal processing unit CQn is provided with an nth IF filter BFn, an nth detector DTn, and an nth envelope detector EVn.
The first to nth IF filters BF1 to BFn are band-pass filters set to predetermined pass bandwidths BW1 to BWn, respectively. The first IF filter BF1 limits the intermediate frequency signal SIF to the passband width BW1 for output. The second IF filter BF2 limits the intermediate frequency signal SIF to the pass bandwidth BW2 for output. The same holds subsequently, and the nth IF filter BFn limits the intermediate frequency signal SIF to the pass bandwidth BWn for output.
More specifically, as shown in
The intermediate frequency signal SIF to be input to the first to nth IF filters BF1 to BFn is not flattened in amplitude by a limiter or the like. In other words, the intermediate frequency signal SIF varies in amplitude in proportion to the intensity of the reception signal received by the antenna. The maximum frequency shifts (−fmax), (+fmax), the shift band BS, and the normal bandwidth BWA mentioned above are thus determined based on the maximum amplitude of such an intermediate frequency signal SIF.
Then, as shown in
Note that the pass bandwidths BW1 to BWn need not be an identical bandwidth (BWA/n) which is determined by dividing the normal bandwidth BWA into n equal portions. As long as the pass bandwidths BW1 to BWn can be determined to sum up to the normal bandwidth BWA, at least one of the pass bandwidths is allowed to differ from the others. Further, all the pass bandwidths BW1 to BWn may differ from one another.
Returning to
The first envelope detector EV1 detects the envelope of the absolute value of the intermediate frequency signal S11 which is output from the first IF filter BF1, and outputs an envelope signal S13 indicating the detected envelope to the maximum value detecting unit DMX. The second envelope detector EV2 detects the envelope of the absolute value of the intermediate frequency signal S21 which is output from the second IF filter BF2, and outputs an envelope signal S23 indicating the detected envelope to the maximum value detecting unit DMX. The same holds subsequently, and the nth envelope detector EVn detects the envelope of the absolute value of the intermediate frequency signal Sn1 which is output from the nth IF filter BFn, and outputs an envelope signal Sn3 indicating the detected envelope to the maximum value detecting unit DMX.
The maximum value detecting unit DMX receives the envelope signals S13, S23, . . . Sn3 in parallel, detects the amplitudes of the respective signals one by one, and determines which of the envelope detectors EV1 to EVn is outputting the envelope signal of the maximum amplitude at the current moment. In addition, the maximum value detecting unit DMX supplies the selecting circuit SEL with a control signal SW which designates the signal processing unit provided with the determined envelope detector.
For example, if the envelope signal S13 has the maximum amplitude among the envelope signals S13, S23, . . . . Sn3, then the maximum value detecting unit DMX outputs the control signal SW which designates the signal processing unit CQ1.
The selecting circuit SEL is composed of an n-input one-output analog multiplexer or the like. It inputs the demodulation signals S12, S22, . . . . Sn2 from the first to nth detectors DT1 to DTn in parallel, and selectively outputs the demodulation signal which has been output from the detector in the signal processing unit designated by the foregoing control signal SW.
For example, when the control signal SW designating the signal processing unit CQ1 is supplied, the selecting circuit SEL outputs the demodulation signal S12 output from the first detector DT1 as the selected demodulation signal SD.
With the receiver RX having such a configuration, the first to nth envelope detectors EV1, EV2, . . . EVn can detect the envelops of the respective intermediate frequency signals S11 to Sn1 which have been band-limited to the pass bandwidths BW1, BW2, . . . BWn of the first to nth IF filters BF1, BF2, . . . BFn. This makes it possible to generate the envelope signals S13, S23, . . . Sn3 which make amplitude variations close to those of the original intermediate frequency signal while excluding noise components occurring in the vicinity of the practical sensitivity.
Then, the maximum value detecting unit DMX detects one having the maximum amplitude among these envelope signals S13, S23, . . . Sn3. Moreover, the selecting circuit SEL extracts the signal components of the demodulation signal corresponding to the foregoing detected envelope signal selectively from among the demodulation signals S12, S22, . . . Sn2. It is therefore possible to select the signal components containing minimum noise components out of the demodulation signals S12, S22, . . . Sn2.
When the selecting circuit SEL outputs the signal components containing minimum noise components, these signal components extracted are synthesized on a time axis. Consequently, it is possible to generate a demodulation signal SD of reduced noise and distortion in the vicinity of the practical sensitivity, as well as improve the practical sensitivity without impairing the capability of precluding interference with adjacent channels.
[Embodiment]
Next, with reference to
In
Then, the intermediate frequency signal Sa band-limited by the IF filter 9 without being flattened in amplitude by a limiter or the like is supplied to first, second, and third IF filters BF1, BF2, and BF3 which are arranged in three signal processing circuits CQ1, CQ2, and CQ3.
Here, the maximum frequency shifts (±fmax) of the FM wave in an FM broadcast are determined as ±75 kHz with the carrier frequency fo at the center. As shown in
The pass bandwidths BW1, BW2, and BW3 of the first, second, and third IF filters BF1, BF2, and BF3 are each determined to have a frequency range of 60 kHz which is obtained by dividing the foregoing normal bandwidth BWA ranging from −90 kHz to +90 kHz into three equal parts.
More specifically, the pass bandwidth BW1 of the first IF filter BF1 is determined to have a frequency range of +30 kHz to +90 kHz with the carrier frequency fo as the center frequency=0. The pass bandwidth BW2 of the second IF filter BF2 is determined to have a frequency range of −30 kHz to +30 kHz, again with the carrier frequency fo as the center frequency=0. The pass bandwidth BW3 of the third IF filter BF3 is determined to have a frequency range of −90 kHz to −30 kHz, again with the carrier frequency fo as the center frequency=0. Consequently, the sum of the pass bandwidths BW1, BW2, and BW3 coincides with the normal bandwidth BWA.
Apart from the first, second, and third IF filters BF1, BF2, and BF3, the signal processing units CQ1, CQ2, and CQ3 also have first, second, and third detectors DT1, DT2, and DT3, and first, second, and third envelope detectors EV1, EV2, and EV3 as in the embodiment shown in
The first, second, andthirddetectorsDT1, DT2, and DT3 perform FM detection on intermediate frequency signals S11, S21, and S31 which have been band-limited by the first, second, and third IF filters BF1, BF2, and BF3, thereby outputting detected demodulation signal S12, S22, and S32, respectively.
The first, second, and third envelope detectors EV1, EV2, and EV3 detect the envelops of the absolute values of the intermediate frequency signals S11, S21, and S31, thereby outputting envelope signals S13, S23, and S33, respectively.
Then, in the case of the receiver RX according to the present embodiment, the maximum value detecting unit DMX shown in
The first comparator DMX1 comprises a comparator, and an analog switch or the like. The comparator detects the amplitudes of the envelope signals S13 and S23 one by one, and compares the same. According to the result of comparison by the comparator, the analog switch or the like transfers either one of the envelope signals S13 and S23 which has a greater amplitude as an envelope signal SC(1,2) to be supplied to the second comparator DMX2.
The foregoing comparator then outputs a control signal SW(1,2) of logic “0” to a selecting circuit SEL1 to be described later if the amplitude of the envelope signal S13 is greater than that of the envelope signal S23 at the current moment (i.e., S13>S23). It outputs the control signal SW(1,2) of logic “1” if the amplitude of the envelope signal S13 is smaller than or equal to that of the envelope signal S23 (i.e., S13≦S23).
The foregoing analog switch or the like provided in the first comparator DMX1 selects the envelope signal S13 while the result of comparison by the comparator, or the control signal SW(1,2), shows logic “0,” and selects the envelope signal S23 while the control signal SW(1,2) shows logic “1.” The selected one is output as the envelope signal SC(1,2) to be supplied to the second comparator DMX2.
The second comparator DMX2 comprises a comparator for detecting the amplitude of the envelope signal SC(1,2) supplied from the first comparator DMX1 and the amplitude of the envelope signal S33 output from the third IF filter BF3 one by one, and comparing the same.
Then, the comparator of the second comparator DMX2 outputs a control signal SW(1,2,3) of logic “0” to a selecting circuit SEL2 to be described later if the amplitude of the envelope signal SC(1,2) is greater than that of the envelope signal S33 at the current moment (i.e., SC(1,2)>S33). It outputs the control signal SW(1,2,3) of logic “1” if the amplitude of the envelope signal SC(1,2) is smaller than or equal to that of the envelope signal S33 (i.e., SC(1,2)≦S33).
Moreover, in the receiver RX of the present embodiment, the selecting circuit SEL shown in
The first selecting circuit SEL 1 comprises analog switches a11 and a12 which complementarily turn on and off according to the control signal SW(1,2). The demodulation signal S12 from the first detector DT1 and the demodulation signal S22 from the second detector DT2 are supplied to the input end of the analog switch all and the input end of the analog switch a12, respectively. The output ends Pcom1 of the analog switches a11 and a12 are connected in common.
While the control signal SW(1,2) shows logic “0,” the analog switch a11 turns on (conducting state) and the analog switch a12 turns off (interrupted state), whereby the demodulation signal S12 is transferred to the foregoing output ends Pcom1 in common connection. On the other hand, while the control signal SW(1,2) shows logic “1,” the analog switch all turns off (interrupted state) and the analog switch a12 turns on (conducting state), whereby the demodulation signal S22 is transferred to the foregoing output ends Pcom1 in common connection.
Incidentally, for ease of description, the demodulation signal S12 or S22 occurring on the foregoing output ends Pcom1 will hereinafter be referred to as a demodulation-signal SD(1,2).
The second selecting circuit SEL2 has analog switches a21 and a22 which complementarily turn on and off according to the control signal SW(1,2,3). The demodulation signal SD(1,2) from the first selecting circuit SEL1 and the demodulation signal S32 from the third detector DT3 are supplied to the input end of the analog switch a21 and the input end of the analog switch a22, respectively. The output ends Pcom2 of the analog switches a21 and a22 are connected in common. The output ends Pcom2 are further connected to a circuit of the subsequent stage for driving not-shown loudspeakers, through a predetermined output terminal or the like.
While the control signal SW (1, 2, 3) shows logic “0,” the analog switch a21 turns on (conducting state) and the analog switch a22 turns off (interrupted state), whereby the demodulation signal SD(1,2) is transferred to the foregoing output ends Pcom2 in common connection. While the control signal SW(1,2,3) shows logic “1,” the analog switch a21 turns off (interrupted state) and the analog switch a22 turns on (conducting state), whereby the demodulation signal S32 is transferred to the foregoing output ends Pcom2 in common connection.
In this way, the receiver RX of the present embodiment detects the envelope signal having the maximum amplitude from among the envelope signals S13, S23, and S33 output from the first to third envelope detectors EV1 to EV3 by using the first and second comparators DMX1 and DMX2. The maximum value detecting unit DMX shown in
Moreover, the selecting circuits SEL1 and SEL2 select the signal components of the demodulation signals S12, S22, and S32 output from the first to third detectors DT1 to DT3 according to the control signals SW(1,2) and SW(1,2,3) from the first and second comparators DMX1 and DMX2, and finally synthesize the signal components on the common output ends Pcom2 into the demodulation signal SD(1,2,3). The selecting circuit SEL shown in
Next, description will be given of the operation of the receiver RX having the foregoing configuration.
Suppose that an intermediate frequency signal SIF in the vicinity of the practical sensitivity, not flattened in amplitude by a limiter or the like, is output from the frequency converter 8 and passed through the IF filter 9 to generate an intermediate frequency signal Sa as shown in
In the first IF filter BF1, the intermediate frequency signal Sa is band-limited to the foregoing pass bandwidth BW1 to output an intermediate frequency signal S11 as shown in
The intermediate frequency signal S11 is converted into an envelope signal S13 as shown in
The intermediate frequency signal S21 is converted into an envelope signal S23 as shown in
The intermediate frequency signal S31 is converted into an envelope signal S33 as shown in
The first comparator DMX1 compares the amplitudes of the envelope signals S13 and S23 shown in
Now, the second comparator DMX2 compares the amplitudes of the envelope signals S33 and SC(1,2) shown in
While the control signal SW(1,2) shows logic “0,” the first selecting circuit SELL transfers the demodulation signal S12 shown in
As above, according to the receiver RX of the present embodiment, the intermediate frequency signal Sa is band-limited to generate the intermediate frequency signals S11, S21, and S31 as shown in
In other words, from the comparison between the waveforms of the intermediate frequency signal Sa and the demodulation signal SD(1,2,3) shown in
Incidentally, as shown in
In the receiver RX of the present embodiment, as shown in
For example, with the normal bandwidth BWA shown in
The receiver RX of the present embodiment comprises the three signal processing units CQ1 to CQ3, along with the two comparators DMX1, DMX2 and the two selecting circuits SEL1, SEL2. Nevertheless, it may comprise four or more signal processing units, and as many comparators and selecting circuits as corresponding to the four or more signal processing units.
The selecting circuits SEL1 and SEL2 may also be made of switching elements other than the analog switches a11 to a22 shown in
As shown in
While there has been described what are at present considered to be preferred embodiments of the present invention, it will be understood that various modifications may be made thereto, and it is intended that the appended claims cover all such modifications as fall within the true spirit and scope of the invention.
Number | Date | Country | Kind |
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JP2003-361033 | Oct 2003 | JP | national |