At present time, there are four sets of satellite navigation systems in the world: BeiDou (Compass) satellite navigation system, Global Positioning System (GPS), Global Navigation Satellite System (GLONASS) satellite navigation system, and Galileo satellite navigation system developed by China, United States, Russia, and Europe, respectively. In these navigation systems, a satellite receiver captures a satellite signal and then enters a tracking loop. The tracking loop includes a carrier tracking loop and a code tracking loop.
In the carrier tracking loop, if an in-phase component I and a quadrature component Q of a satellite signal are sampled in the same data bit time period, that is, there is no data bit hopping between the component I and the component Q, the tracked carrier frequency in a frequency-locked loop discriminator of the receiver will not be fuzzy. However, in case of a high dynamic environment or large initial frequency offset condition, the frequency-locked loop may be locked in a wrong frequency, which may cause the carrier tracking loop to be falsely locked and thus reduce the accuracy of satellite positioning. Meanwhile, the phase-locked loop (PLL) is not sensitive to signal modulation, thus, the phase tracked by a phase-locked loop discriminator may be fuzzy, which may cause the carrier tracking loop to be falsely locked and reduce the accuracy of satellite positioning.
Conventionally, the following technology is adopted in order to reduce the false lock of the carrier tracking loop. At the beginning of tracking, a shorter pre-detection integration time (i.e., a wider range of traction) is used, and a frequency-locked loop with strong dynamic ability is adopted as the carrier tracking loop, to track carrier frequency and to eliminate the dynamic change of the carrier frequency. After the tracking is stable, a longer pre-detection integration time is used, and a phase-locked loop with little thermal noise error and the frequency-locked loop are adopted as the carrier tracking loop, to further reduce the carrier frequency error to a level that the phase-locked loop can track stably, and thus to track the carrier phase and positioning accurately.
This method reduces the probability of occurrence of a false lock. However, it cannot detect a false lock in real time.
Moreover, even when the carrier tracking loop is falsely locked, for example, the frequency-locked loop is locked at a wrong frequency or the phase-locked loop is locked at a wrong phase, the carrier tracking loop can continuously track, and the control parameters (i.e., Carrier-to-noise-density ratio, CN0) for determining the quality of the carrier tracking loop are still normal. Thus, the false lock can't be detected based on the control parameters (i.e., CN0).
The present disclosure describes a method for detecting a false lock of a carrier tracking loop. The method includes obtaining an average output of each of one or more loop discriminators in a predetermined time period when the carrier tracking loop works in a first mode; and determining whether the carrier tracking loop is falsely locked when the absolute value of the average output of any of the one or more loop discriminators is greater than a respective threshold associated with the corresponding loop discriminator. The carrier tracking loop comprises the frequency-locked loop and the phase-locked loop in the first mode. The one or more discriminator loops may include a frequency-locked discriminator loop, a phase-locked discriminator loop, or a combination thereof.
In yet another embodiment, the present disclosure describes a satellite receiver. The satellite receiver includes an obtaining unit and a determining unit. The obtaining unit is coupled to a carrier tracking loop, and is configured to obtain an average output of each of one or more loop discriminators in a predetermined time period when the carrier tracking loop works in a first mode. The carrier tracking loop may include a frequency-locked loop and a phase-locked loop in the first mode. The one or more loop discriminators may include a frequency-locked loop discriminator, a phase-locked loop discriminator, or a combination thereof. The determining unit is coupled to the obtaining unit, and is configured to determine whether an absolute value of the average output of any of the one or more loop discriminators is greater than a respective threshold associated with the corresponding loop discriminator. The determining unit may be further configured to determine a false lock of the carrier tracking loop when the absolute value of the average output of the frequency-locked loop discriminator is greater than a first threshold and/or the absolute value of the average output of the phase-locked loop discriminator is greater than a second threshold.
The disclosure will be readily understood in view of the following description when accompanied by the below figures and wherein like reference numerals represent like elements, wherein:
a illustrates a method for detecting false lock of a carrier tracking loop, in accordance with one embodiment of the present teaching;
b depicts a graph of the average output of a frequency-locked loop discriminator in a predetermined time period when a carrier tracking loop isn't locked falsely, in accordance with one embodiment of the present teaching;
c depicts a graph of the average output of a phase-locked loop discriminator in a predetermined time period when a carrier tracking loop isn't locked falsely, in accordance with one embodiment of the present teaching;
d depicts a graph of the average output of a frequency-locked loop discriminator in a predetermined time period when a carrier tracking loop is locked falsely, in accordance with one embodiment of the present teaching;
e depicts a graph of the average output of a phase-locked loop discriminator in a predetermined time period when a carrier tracking loop is locked falsely, in accordance with one embodiment of the present teaching;
Reference will now be made in detail to the embodiments of the present teaching, examples of which are illustrated in the accompanying drawings. While the present teaching will be described in conjunction with the embodiments, it will be understood that they are not intended to limit the present teaching to these embodiments. On the contrary, the present teaching is intended to cover alternatives, modifications, and equivalents, which may be included within the spirit and scope of the present teaching as defined by the appended claims.
Furthermore, in the following detailed description of embodiments of the present teaching, numerous specific details are set forth in order to provide a thorough understanding of the present teaching. However, it will be recognized by one of ordinary skill in the art that the present teaching may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure aspects of the embodiments of the present teaching.
a illustrates a method for detecting false lock of a carrier tracking loop, in accordance with one embodiment of the present teaching.
At step S120, average outputs of a frequency-locked loop discriminator and/or a phase-lock loop discriminator in a predetermined time period are obtained when the carrier tracking loop tracks a carrier working in a first mode (as shown in Step S1). In one embodiment, the carrier tracking loop may include a frequency-locked loop and a phase-lock loop in the first mode.
At step S140, if an absolute value of the average output of the frequency-locked loop discriminator is greater than a first threshold and/or an absolute value of the average output of the phase-locked loop discriminator is greater than a second threshold, the carrier tracking loop is determined to be falsely locked.
b is an experimental diagram illustrating the average output of a frequency-locked loop discriminator in a predetermined time period when a carrier tracking loop is not locked falsely, in accordance with one embodiment of the present teaching. For the embodiment illustrated in
Furthermore, the dither range of the absolute value of the average output of the frequency-locked loop discriminator of the carrier tracking loop in a predetermined time period (i.e., 1 second) is decreased as a carrier to noise power spectral density ratio CN0 increases, and the absolute value finally converges to 0 hertz. The carrier to noise power spectral density ratio CN0 can be used to determine the quality of the carrier tracking loop. For example, when the carrier to noise power spectral density ratio CN0 is greater than 26 decibel (dB), and the maximum dither range of the absolute value of the average output of the frequency-locked loop discriminator is within 2 hertz, the carrier tracking loop is determined to be tending to stable.
c is an experimental diagram illustrating the average output of a phase-locked loop discriminator in a predetermined time period when a carrier tracking loop is not locked falsely, in accordance with one embodiment of the present teaching. For the embodiment illustrated in
Furthermore, the dither range of the absolute value of the average output of the phase-locked loop discriminator of the carrier tracking loop in a predetermined time period (i.e., 1 second) is decreased as the carrier to noise power spectral density ratio CN0 increases, and this absolute value finally converges to 0 radian. The carrier to noise power spectral density ratio CN0 can be used to determine the quality of the carrier tracking loop. For example, when the carrier to noise power spectral density ratio CN0 is greater than 26 decibel (dB), and the maximum dither range of the absolute value of the average output of the phase-locked loop discriminator is within 0.1 radian, the carrier tracking loop is determined to be tending to stable.
d is an experimental diagram illustrating the average output of a frequency-locked loop discriminator in a predetermined time period when a carrier tracking loop is locked falsely, in accordance with one embodiment of the present teaching. For the embodiment illustrated in
Furthermore, as shown in
e is an experimental diagram illustrating the average output of a phase-locked loop discriminator in a predetermined time period when a carrier tracking loop is locked falsely, in accordance with one embodiment of the present teaching. For the embodiment illustrated in
Furthermore, as shown in
It is to be noted that
In one embodiment, the first threshold may be less than 8 hertz. For example, the first threshold may be 2 hertz or 1 hertz.
In one embodiment, the second threshold may be less than 0.5 radians. For example, the second threshold may be 0.4 radians or 0.1 radians.
In one embodiment, the predetermined time period may be equal to or greater than 1 second, e.g., 2 seconds.
In present disclosure, by obtaining the average outputs of the frequency-locked loop discriminator and/or the phase-locked loop discriminator in a predetermined time period in real time, the false lock of carrier tracking loop can be accurately determined when the absolute value of the average outputs of the frequency-locked loop discriminator is greater than a first threshold and/or the absolute value of the average outputs of the phase-locked loop discriminator is greater than a second threshold. Thus, the false lock of the carrier tracking loop can be detected timely and accurately, and the false lock can be eliminated in time once the false lock is detected, which can effectively avoid the adverse effects of the false lock occurred on the carrier tracking.
Compared with
At step 220, the carrier tracking loop is switched to a second mode which only includes the phase-locked loop once the false lock of carrier tracking loop is detected.
For example, in the embodiments illustrated in
Compared with the method for detecting the false lock as shown in
The determining unit 340 is coupled to the obtaining unit 320, and is configured to determine whether the absolute value of the average outputs of the frequency-locked loop discriminator is greater than a first threshold and/or determine whether the absolute value of the average outputs of the phase-locked loop discriminator is greater than a second threshold. The determining unit 340 is further configured to determine that the carrier tracking loop is falsely locked when the absolute value of the average outputs of the frequency-locked loop discriminator is greater than the first threshold and/or the absolute value of the average outputs of the phase-locked loop discriminator is greater than the second threshold.
For the above satellite receiver, the first threshold may be less than 8 hertz, e.g., 2 hertz or 1 hertz, in one embodiment.
For the above satellite receiver, the second threshold may be less than 0.5 radians, e.g., 0.4 radians or 0.1 radians, in one embodiment.
For the above satellite receiver, the predetermined time period can be equal to or greater than 1 second, e.g., 2 seconds, in one embodiment.
The obtaining unit 320 obtains the average outputs of the frequency-locked loop discriminator and/or the phase-locked loop discriminator in a predetermined time period in real time, and the determining unit 340 accurately determines the false lock of carrier tracking loop when the absolute value of the average outputs of the frequency-locked loop discriminator is greater than the first threshold and/or the absolute value of the average outputs of the phase-locked loop discriminator is greater than the second threshold. Thus, the false lock can be eliminated in time once the false lock is detected, which can effectively avoid the adverse effects of the false lock on the carrier tracking.
As shown in
Embodiments of the present disclosure are not only suitable for dual-mode receivers but also suitable for single-mode receivers. Embodiments of the present disclosure are not only applicable for GPS receivers and BD receivers, but also for GLONASS (Glonass) receivers, Galileo (Galileo) receiver, or any other receivers available presently or in future.
While the foregoing description and drawings represent embodiments of the present disclosure, it will be understood that various additions, modifications and substitutions may be made therein without departing from the spirit and scope of the principles of the present invention as defined in the accompanying claims. One skilled in the art will appreciate that the disclosure may be used with many modifications of form, structure, arrangement, proportions, materials, elements, and components and otherwise, used in the practice of the disclosure, which are particularly adapted to specific environments and operative requirements without departing from the principles of the present disclosure. The presently disclosed embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims and their legal equivalents, and not limited to the foregoing description.
Number | Date | Country | Kind |
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201310198814.6 | May 2013 | CN | national |
This Application claims priority to Patent Application No. 201310198814.6, filed on May 24, 2013 with State Intellectual Property Office of the P.R. China (SIPO), which is hereby incorporated by reference.