BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
A general architecture that implements the various feature of the invention will now be described with reference to the drawings. The drawings and the associated descriptions are provided to illustrate embodiments of the invention and not to limit the scope of the invention.
FIG. 1 is s block diagram depicting an example of a configuration of an IP broadcast time synchronization system according to an embodiment of the present invention;
FIG. 2 is a model chart showing an example of feedback control of an IP broadcast time synchronization system according to an embodiment of the present invention;
FIG. 3 is an explanatory view showing an example of numeric value simulation in the case where a clock of an IP broadcast time synchronization system according to an embodiment of the present invention is earlier by 25 ppm;
FIG. 4 is an explanatory view showing an example of numeric value simulation in the case where a clock of an IP broadcast time synchronization system according to an embodiment of the present invention is delayed by 25 ppm;
FIG. 5 is a model chart showing an example of feedback control of an IP broadcast time synchronization system according to an embodiment of the present invention;
FIG. 6 is an explanatory view showing an example of numeric value simulation in the case where a clock of an IP broadcast time synchronization system according to an embodiment of the present invention is earlier by 25 ppm;
FIG. 7 is an explanatory view showing an example of numeric value simulation in the case where a clock of an IP broadcast time synchronization system according to an embodiment of the present invention is delayed by 25 ppm; and
FIG. 8 is a flowchart showing an example of clock synchronization procedures in an IP broadcast time synchronization system according to an embodiment of the present invention.