Claims
- 1. An apparatus comprising:
two or more adaptive equalizers; a plurality of operational blocks that interconnect the adaptive equalizers; and a control mechanism that configures the adaptive equalizers and operational blocks according to different signal delay profiles.
- 2. The apparatus of claim 1 further comprising a second control mechanism that disables at least one of said plurality of operational blocks according to the different signal delay profiles.
- 3. The apparatus of claim 2 wherein each of said two or more adaptive equalizers comprise a computational resource.
- 4. The apparatus of claim 3 wherein the computation resource comprises at least one item selected from the group consisting of a summer, a conjugation block, a multiplier, and a divider.
- 5. The apparatus of claim 2 further comprising a third control mechanism that disables a computation resource of at least one of said adaptive equalizers according to the different signal delay profiles.
- 6. The apparatus of claim 1 wherein said operational blocks comprise at least one item selected from the group consisting of:
a signal regenerator; a delay line; and a summer.
- 7. The apparatus of claim 1 wherein the different signal delay profiles comprise at least one multi-path signal profile selected from the group consisting of:
sub-signals that arrive to the apparatus in consecutive chip time units; sub-signals wherein one sub-signal comprises a substantial amount of total energy of the sub-signals; sub-signals that do not arrive to the apparatus in consecutive chip time units; sub-signals that arrive to the apparatus in two or more clusters; sub-signals that arrive to the apparatus from more than one antenna.
- 8. The apparatus of claim 5 wherein the first, second, and third control mechanisms comprise multiplexers that receive control signals according to the different signal delay profiles.
- 9. The apparatus of claim 1 wherein a two-stage configuration of the apparatus comprises a default mode.
- 10. A method, comprising:
receiving a multi-path signal profile; determining attributes of the multi-path signal profile; and operating two or more adaptive equalizers, computational resources of the two or more adaptive equalizers, and operational blocks interconnecting said two or more adaptive equalizers according to said attributes of the multi-path signal profile.
- 11. The method of claim 10 wherein determining attributes of the multi-path signal profile comprises determining a number of antennas at a transmitter.
- 12. The method of claim 11 wherein determining attributes of the multi-path signal profile comprises determining a delay length of the multi-path signal profile if said number of antennas is equal to one.
- 13. The method of claim 12 wherein determining attributes of the multi-path signal profile comprises determining an amount of energy in a single sub-signal of the multi-path signal profile if the length of the multi-path signal profile is less than a maximum number of taps of a single adaptive equalizer.
- 14. The method of claim 13 wherein determining attributes of the multi-path signal profile comprises determining an amount of energy capturable by a two-stage adaptive equalizer if said length of the multi-path signal profile requires more than the maximum number of taps of a single adaptive equalizer.
- 15. The method of claim 14 wherein determining attributes of the signal comprises determining a number of energy clusters of the multi-path signal profile if the amount of energy capturable by a two-stage adaptive equalizer is less than around ninety-five percent of total energy of the multi-path signal profile.
- 16. The method of claim 10 further comprising disabling at least one selected from the group:
adaptive equalizer; operational block; and computational resource.
- 17. A system comprising:
two or more adaptive equalizers; a plurality of operational blocks; means for selectively interconnecting the two or more adaptive equalizers and the plurality of operational blocks; and means for configuring the two or more adaptive equalizers and operational blocks according to attributes of the signal profile.
- 18. The system of claim 17, wherein said means for selectively interconnecting the two or more adaptive equalizers and the plurality of operational blocks comprises a plurality of multiplexers.
- 19. The system of claim 17 further comprising means for disabling at least one of the plurality of operational blocks according to said attributes of the signal profile.
- 20. The system of claim 17 further comprising means for disabling a computational resource of at least one of the two or more adaptive equalizers according to said attributes of the signal profile.
- 21. The system of claim 17 further comprising means for sharing computational resources of the two or more adaptive equalizers.
- 22. The system of claim 17, wherein the attributes of the signal profile comprise at least one selected from the group consisting of:
a number of antennas that transmitted the multi-path signal; a length of the multi-path signal profile; an amount of energy in a single sub-signal of the multi-path signal; an amount of capturable energy by a number of adaptive equalizers; and a number of energy clusters.
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims priority to U.S. Provisional Application No. 60/435,529 filed Dec. 20, 2002 and entitled “Chip Level Equalizer,” incorporated herein by reference.
Provisional Applications (1)
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Number |
Date |
Country |
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60435529 |
Dec 2002 |
US |