Patent Grant
10434771
The aspect of the embodiments relates to a recording apparatus and a recording method.
Recording apparatuses which record an image on a recording medium by using a recording head including a plurality of discharge ports for discharging ink are known. Among such recording apparatuses, ones using a recording head in which discharge ports are arranged for a range wider than the width of the recording medium have also been known recently.
Arranging the discharge ports in a row over a wide range can increase manufacturing costs and facilitate the occurrence of manufacturing errors of the discharge ports. In view of this, a recording head including a plurality of discharge port arrays in which discharge ports are arranged in a somewhat narrow range and which is arranged in the width direction of the recording medium can be used. Recording heads including a plurality of discharge port arrays arranged in the width direction with overlapping portions, in which discharge ports at widthwise ends of two adjoining discharge port arrays are located at the same positions in the width direction, are also known to be used. A drop in image quality due to differences in discharge characteristics between discharge port arrays can be suppressed by using such a recording head and performing recording in the overlapping portions in a shared manner by two discharge port arrays.
Suppose that recording elements in the discharge ports are time-divisionally driven, i.e., divided into a plurality of driving blocks and driven at different timings driving block by driving block. Such time-divisional driving may fail to provide satisfactory image quality even if the foregoing recording head with overlapping portions is used. If the recording elements in the discharge ports of the overlapping portion of two adjoining discharge port arrays differ in the order of driving, the impact positions of dots discharged from the discharge ports located at the same positions in the width direction deviate from each other in a direction crossing the width direction, whereby the image quality is impaired. Japanese Patent Application Laid-Open No. 2006-334899 discusses making the driving order of the recording elements different between the discharge port arrays so that the recording elements corresponding to the overlapping portion of two adjoining discharge port arrays are driven in the same order.
A recording head in which discharge port arrays are arranged at a predetermined tilt with respect to the width direction of the recording medium can be used to record high-resolution images because the widthwise distances between dots impacting on the recording medium can be made smaller than the arrangement pitches of the discharge ports in the discharge port arrays. However, if such a recording head including the discharge port arrays arranged at a predetermined tilt is used, the impact positions of the dots deviate according to the tilt, in a direction different from the width direction. Consequently, even if the technique discussed in Japanese Patent Application Laid-Open No. 2006-334899 is used, the impact positions of the dots in the overlapping portion can be different between the discharge port arrays and an image of satisfactory image quality may fail to be obtained.
The aspect of the embodiments is directed to suppressing a drop in the image quality of recording in overlapping portions in the case where a recording head including discharge port arrays obliquely arranged with respect to the width direction of the recording medium is used.
According to an aspect of the embodiments, a recording apparatus includes a recording head including a first discharge port array and a second discharge port array each including a plurality of recording elements configured to generate energy for discharging ink and a plurality of discharge ports provided to correspond to the recording elements, the first and second discharge port arrays being shifted and arranged in a first direction so that part of the discharge ports arranged at an end portion of the first discharge port array in the first direction and part of the discharge ports arranged at an end portion of the second discharge port array in the first direction are located at the same positions in the first direction, a moving unit configured to move at least either the recording head or a recording medium in a second direction crossing the first direction, and a control unit configured to control timing of discharge from the second discharge port array, wherein the plurality of discharge ports in each of the first and second discharge port arrays is obliquely arranged at a predetermined tilt with respect to the first direction, and wherein the control unit is configured to adjust the timing of discharge from the second discharge port array by a first adjustment amount according to the predetermined tilt so that the part of the discharge ports of the first discharge port array and the part of the discharge ports of the second discharge port discharge the ink to the same positions in the second direction on the recording medium.
Further features of the disclosure will become apparent from the following description of exemplary embodiments with reference to the attached drawings.
A first exemplary embodiment will be described below.
A recording medium P fed from a feeding unit 101 is sandwiched between conveyance roller pairs 103 and 104 and conveyed at a predetermined speed in a positive X direction (conveyance direction, crossing direction), and discharged to a discharge unit 102. Recording heads 105 to 108 are arranged along the conveyance direction between the upstream-side conveyance roller pair 103 and the downstream-side conveyance roller pair 104, and discharge ink in a positive Z direction according to recording data. The recording heads 105, 106, 107, and 108 discharge cyan, magenta, yellow, and black inks, respectively.
As employed herein, the recording data is data generated by performing various types of processing, such as color conversion processing and quantization processing, on image data that is expressed in red, green, and blue (RGB) values corresponding to an image to be recorded on the recording medium P. The recording data includes information defined pixel by pixel about whether to discharge ink for each pixel on the recording medium P.
In the present exemplary embodiment, the recording medium P may be a continuous sheet of paper which is held in a roll form in the feeding unit 101, or a cut sheet of paper which is cut in a standard size in advance. In the case of a continuous sheet, the recording medium P is cut in a predetermined length by a cutter 109 after the recording operation by the recording heads 105 to 108 ends. The discharge unit 102 sorts out recording media P by size onto respective discharge trays.
The recording head 105 includes four chips CH0 to CH3 each including a discharge port array. The chips CH0 to CH3 include eight discharge ports seg0 to seg7 each. Recording elements (electrothermal conversion elements) are arranged at positions opposed to the respective discharge ports seg0 to seg7 of the chips CH0 to CH3 (inside the recording head 105). The recording elements are driven to generate energy and perform ink discharge operations. In the following description, for the sake of simplicity, the discharge ports and the recording elements inside may hereinafter be referred to collectively as discharge ports seg. For the sake of simplicity, the numerals of the discharge ports seg0 to seg7 may hereinafter be referred to as seg numbers.
In each of the chips CH0 to CH3, the discharge ports seg0 to seg7 are obliquely arranged at an angle of θ with respect to a Y direction (width direction of the recording medium P). Due to the tilt of θ in angle, the discharge ports seg0 to seg7 in the same discharge port array are located at different positions in the X direction (conveyance direction). For the sake of simplicity, a distance between the discharge ports seg0 and seg4 in each of the chips CH0 to CH3 in the X direction will hereinafter be denoted by d. In the present exemplary embodiment, the distance d corresponds to one pixel on the recording medium P (d=1).
In the recording head 105, the discharge port arrays are arranged so that some of the discharge ports of two discharge port arrays adjoining in the Y direction are located at the same positions in the Y direction to form an overlapping portion. For example, between the chips CH0 and CH1, the discharge ports seg6 and seg7 at the end of the chip CH0 in the positive Y direction and the discharge ports seg0 and seg1 at the end of the chip CH1 in the negative Y direction are located at the same positions to form an overlapping portion between the chips CH0 and CH1. Overlapping portions are similarly formed between the chips CH1 and CH2 and between the chips CH2 and CH3. For the sake of simplicity, the following description deals only with the overlapping portion between the chips CH0 and CH1.
(Impact Position Deviations of Dots and Adjustment Thereof)
Impaction position deviations of dots and an adjustment method according to the present exemplary embodiment will be described in detail below.
In the following description, for the sake of simplicity, the position of impact of a dot discharged from the discharge port seg0 of the chip CH0 in the X direction will be referred to as a reference position. A displacement of an impact position from the reference position in the X direction will be referred to as an impact position deviation amount.
1. Impact Position Deviations of Dots by Time-Divisional Driving
In the present exemplary embodiment, the discharge ports seg0 to seg7 belonging to the same chip is divided into a plurality of driving blocks and driven at respectively different timings for time-divisional driving so that the recording elements in the discharge ports seg0 to seg7 are not simultaneously driven. Here, the discharge ports seg0 to seg7 are described to constitute a single driving block each. The time-divisional driving suppresses simultaneous driving of the recording elements at the same timing, whereby the occurrence of excessive current can be suppressed.
If the time-divisional driving is performed, the impact positions of the dots from the discharge ports seg0 to seg7 deviate from each other.
Suppose that the discharge ports seg0, seg2, seg4, seg6, seg1, seg3, seg5, and seg7 are driven in such order. In other words, the order of driving of the discharge ports seg0 to seg7 is such that the discharge port seg0 is “1”, the discharge port seg1 “5”, the discharge port seg2 “2”, the discharge port seg3 “6”, the discharge port seg4 “3”, the discharge port seg5 “7”, the discharge port seg6 “4”, and the discharge port seg7 “8”. In the following description, the transition of the order of driving as the seg number increases one by one will be referred to as driving order. In the foregoing case, the driving order of the discharge ports seg0 to seg7 is 1, 5, 2, 6, 3, 7, 4, and 8.
If the discharge ports seg0 to seg7 are driven in the foregoing driving order, as illustrated in
The recording medium P is being conveyed in the positive X direction even while the discharge ports seg0 to seg7 are sequentially driven. Since the time-divisional driving shifts the driving timing for each discharge port, the dots discharged from the respective discharge port seg0 to seg7 deviate in the X direction by distances according to the conveyance speed of the recording medium P. In the following description, the conveyance speed is described to be such that a distance of separation between dots in the X direction is 1/8×d(=0.125) if the driving timing is shifted by one.
If the time-divisional driving is performed, a dot thus impacts on a position deviated by 1/8×d(=0.125) in the positive X direction each time the driving timing is delayed by one.
2. Impact Position Deviations of Dots Due to Tilt of Discharge Port Array
As described with reference to
As described above, in the present exemplary embodiment, the distance between the discharge ports seg0 and seg4 in the X direction is d(=1) (
If such a tilted discharge port array is used, a dot thus impacts on a position deviated by 1/4×d(=0.25) in the positive X direction each time the seg number increases.
3. Adjustment of Chip-to-Chip Impact Position Deviations by Offsetting of Driving Order
If there occur dot impact position deviations due to the foregoing time-divisional driving and the tilt of the discharge port arrays, image quality drops in the overlapping portion between the chips. Then, in the present exemplary embodiment, the driving order in either one of the chips is offset so that the discharge ports that form the same overlapping portion between the chips are driven in the same order. The effect of the dot impact position deviations due to the time-divisional driving in the overlapping portion can be cancelled by such control.
As illustrated in
By offsetting the driving order of the chip CH0 to obtain the driving order of the chip CH1, the order of driving of the discharge ports seg6 and seg7 of the chip CH0 and that of the discharge ports seg0 and seg1 of the chip CH1 forming the overlapping portion can be made the same, i.e., the fourth and eighth. This can reduce the impact position deviations of the dots between the chips CH0 and CH1 due to the time-divisional driving in the overlapping portion.
4. Adjustment of Chip-to-Chip Impact Position Deviations by Chip-to-Chip Pulse Delay
As described above, the driving order can be offset to suppress the impact position deviations of the dots due to the time-divisional driving in the overlapping portion between two chips, but not the impact position deviations of the dots due to the tilt of the discharge port arrays.
For example, the amounts of deviation of the discharge ports seg6 and seg7 of the chip CH0 forming one side of the overlapping portion, due to the tilt of the discharge port array are respectively 6/4×d(=1.5) and 7/4×d(=1.75) in the positive X direction from the reference position. The amounts of deviation of the discharge ports seg0 and seg1 of the chip CH1 forming the other side of the overlapping portion, due to the tilt of the discharge port array are respectively 0/4×d(=0) and 1/4×d(=0.25) in the positive X direction from the reference position. In other words, impact position deviation of 1.5(=1.5−0, and =1.75−0.25) occur between the chips CH0 and CH1 due to the tilt of the discharge port arrays.
In view of the foregoing, in the present exemplary embodiment, the timing to apply the driving pulses to the chip CH1 is delayed by a time equivalent to 1.5 pixels, compared to the timing to apply the driving pulses to the chip CH0. In the following description, this will be referred to as a pulse delay control.
The amount of delay (pulse delay amount) by the pulse delay control can be set to various values as appropriate. In the present exemplary embodiment, the timing is delayed by the time equivalent to 1.5 pixels. However, for example, the timing may be delayed by a time equivalent to 0.5 pixel or a time equivalent to 3.0 pixels. The pulse delay amount is not limited to integer multiples of the pixel size of the recording data (such as 3.0 pixels), and may be set to amounts other than integer multiples of the pixel size of the recording data (such as 1.5 pixels and 0.5 pixel). The timing not only can be delayed, but may be advanced.
In the pulse delay control in one embodiment, all the discharge ports belonging to the same chip (discharge port array) are to be delayed by the same amount. The reason for such a limitation is that the signal for delaying is transmitted to the plurality of recording elements in the discharge ports belonging to the same chip via common wiring, and the pulse delay amount is thus unable to be changed for each recording element.
As illustrated in
If the chips CH0 and CH1 are provided at the same position in the X direction, as illustrated in
In the present exemplary embodiment, the foregoing pulse delay control is performed to reduce the impact position deviations of the dots due to the tilt of the discharge port arrays in the overlapping portion.
5. Chip-to-Chip Impact Positions According to First Exemplary Embodiment
In the following description, for the sake of simplicity, coordinates are set and described according to the positions of the discharge ports forming the respective dots in the Y direction. The coordinate is described to increase as the position moves in the positive Y direction. More specifically, the coordinate of the dot formed by the discharge port seg0 of the chip CH0 is “0”. Similarly, the coordinates of the dots formed by the discharge ports seg1 to seg5 of the chip CH0 are “1” to “5”, respectively. The coordinates of the dots formed by the discharge port seg6 of the chip CH0 and the discharge port seg0 of the chip CH1 are “6” since the discharge ports are located at the same position in the Y direction. The coordinates of the dots formed by the discharge port seg7 of the chip CH0 and the discharge port seg1 of the chip CH1 are “7” since the discharge ports are located at the same position in the Y direction. The coordinates of the dots formed by the discharge ports seg2 to seg7 of the chip CH1 are “8” to “13”, respectively.
The chip CH0 will initially be described.
As described above, the amount of impact position deviation due to the time-divisional driving (hereinafter, also referred to as driving deviation amount) increases by 1/8×d(=0.125) each time the order of driving increases by one. The discharge ports seg0 to seg7 are driven in the driving order of 1, 5, 2, 6, 3, 7, 4, and 8. A “driving deviation amount” field of
As described above, the amount of deviation due to the tilt of the discharge port array (hereinafter, also referred to as a tilt deviation amount) increases by 1/4×d(=0.25) each time the seg number increases by one. A “tilt deviation amount” field of
The amounts of deviation (dot impact positions) from the reference position in the chip CH0 are the sums of the driving deviation amounts and the tilt deviation amounts of the respective discharge ports seg0 to seg7 in the chip CH0. Specifically, a “total deviation amount” field of
Next, the chip CH1 will be described.
As described above, the discharge ports seg0 to seg7 of the chip CH1 are driven in the driving order of 4, 8, 1, 5, 2, 6, 3, and 7. The “driving deviation amount” field of
Since the discharge port arrays of the chips CH0 and CH1 have the same tilt, the tilt deviation amounts of the chip CH1 are the same as those of the chip CH0 as illustrated in the “tilt deviation amount” field of
In the present exemplary embodiment, the pulse delay control is performed on the chip CH1 as described above. Here, the application timing of the driving pulses is shifted so that the impact positions of the dots from the chip CH1 are shifted by 1.5 pixels in the positive X direction from those of the chip CH0 as described above. The impact positions of the dots of the chip CH1 thus deviate as much as the “driving deviation amounts” and the “tilt deviation amounts” plus the “pulse delay amounts” of
Focusing attention on the discharge ports seg6 and seg7 of the chip CH0 and the discharge ports seg0 and seg1 of the chip CH1 which form the overlapping portion, the impact positions of the dots from the discharge ports will be described in detail.
The discharge ports seg6 and seg7 of the chip CH0 are driven by the time-divisional driving so that the discharge port seg6 is the fourth and the discharge port seg7 the eighth in the driving order. The discharge port seg6 thus has a driving deviation amount of 3/8×d(=0.375), and the discharge port seg7 a driving deviation amount of 7/8×d(=0.875). The discharge port seg6 has a tilt deviation amount of 6/4×d(=1.5), and the discharge port seg7 a tilt deviation amount of 7/4×d(=1.75).
Consequently, as illustrated in the “total amount of deviation” field of
The discharge ports seg0 and seg1 of the chip CH1 are driven by the time-divisional driving so that the discharge port seg0 is the fourth and the discharge port seg1 the eighth in the driving order. The discharge port seg0 has a driving deviation amount of 3/8×d(=0.375), and the discharge port seg1 a driving deviation amount of 7/8×d(=0.875). The discharge port seg0 has a tilt deviation amount of 0/4×d(=0), and the discharge port seg1 a tilt deviation amount of 1/4×d(=0.25). As described above, the pulse delay control is also performed on the chip CH1. The amount of deviation by the pulse delay control is 1.5 for both the discharge ports seg0 and seg1.
Consequently, as illustrated in the “total amount of deviation” field of
In summary, the dot impact positions of both the discharge port seg6 of the chip CH0 and the discharge port seg0 of the chip CH1 are 1.875. The dot impact positions of both the discharge port seg7 of the chip CH0 and the discharge port seg1 of the chip CH1 are 2.625. Since the impact positions of the dots of the chips CH0 and CH1 forming the overlapping portion can be made the same, a drop in the image quality in the overlapping portion can be suppressed.
As can be seen from
Next, a first comparative embodiment which is a comparative example of the first exemplary embodiment will be described. A description of parts similar to those of the first exemplary embodiment will be omitted.
In the first comparative embodiment, neither the offsetting of the driving order nor the chip-to-chip pulse delay control is performed.
The chip CH0 will initially be described.
In the first comparative embodiment, like the first exemplary embodiment, neither the offsetting of the driving order nor the chip-to-chip pulse delay control is performed on the chip CH0. As illustrated in
Next, the chip CH1 will be described.
Unlike the first exemplary embodiment, the offsetting of the driving order is not performed on the chip CH1. The discharge ports seg0 to seg7 are therefore driven in the driving order of 1, 5, 2, 6, 3, 7, 4, and 8, as with the chip CH0. The “driving deviation amount” field of
The discharge port arrays of the chips CH0 and CH1 have the same tilt. As illustrated in the “tilt deviation amount” field of
In the present comparative embodiment, the chip-to-chip pulse delay control is not performed. The total amounts of deviation are therefore the sums of the driving deviation amounts and the tilt deviation amounts of the respective discharge ports seg0 to seg7 in the chip CH1. The “total amount of deviation” field of
Next, focusing attention on the discharge ports seg6 and seg7 of the chip CH0 and the discharge ports seg0 and seg1 of the chip CH1 which form an overlapping portion, the impact positions of the dots from the discharge ports will be described in detail.
The discharge ports seg6 and seg7 of the chip CH0 are driven by the time-divisional driving so that the discharge port seg6 is the fourth and the discharge port seg7 the eighth in the driving order. The discharge port seg6 thus has a driving deviation amount of 3/8×d(=0.375), and the discharge port seg7 a driving deviation amount of 7/8×d(=0.875). The discharge port seg6 has a tilt deviation amount of 6/4×d(=1.5), and the discharge port seg7 a tilt deviation amount of 7/4×d(=1.75).
As illustrated in the “total amount of deviation” field of
The discharge ports seg0 and seg1 of the chip CH1 are driven by the time-divisional driving so that the discharge port seg0 is the first and the discharge port seg1 the fifth in the driving order. The discharge port seg0 thus has a driving deviation amount of 0/8×d(=0), and the discharge port seg1 a driving deviation amount of 4/8×d(=0.5). The discharge port seg0 has a tilt discharge amount of 0/4×d(=0), and the discharge port seg1 a tilt discharge amount of 1/4×d(=0.25).
As illustrated in the “total amount of deviation” field of
In other words, in the overlapping portion, the discharge port seg6 of the chip CH0 has a dot impact position of 1.875 and the discharge port seg0 of the chip CH1 a dot impact position of 0. Although corresponding to the discharge ports located at the same position in the Y direction, the dots are formed at different positions in the X direction. The discharge port seg7 of chip CH0 has a dot impact position of 2.625, and the discharge port seg0 of the chip CH1 a dot impact position of 0.75. Again, although corresponding to the discharge ports located at the same position in the Y direction, the dots are formed at different positions in the X direction. The first comparative embodiment is therefore not able to make the impact positions of the dots the same between the chips CH0 and CH1 forming the overlapping portion. This causes a drop in the image quality.
As can be seen from
Next, a second comparative embodiment which is a comparative example of the first exemplary embodiment will be described. A description of parts similar to those of the first comparative embodiment will be omitted.
In the second comparative embodiment, the offsetting of the driving order is performed as in the first exemplary embodiment, but not the chip-to-chip pulse delay control.
The chip CH0 will initially be described.
In the second comparative embodiment, like the first exemplary embodiment and the first comparative embodiment, neither the offsetting of the driving order nor the chip-to-chip pulse delay control is performed on the chip CH0. As illustrated in
Next, the chip CH1 will be described.
Like the first exemplary embodiment, the offsetting of the driving order is performed on the chip CH1 so that the discharge ports seg0 and seg1 of the chip CH1 are driven in the same order as that of the discharge ports seg6 and seg7 of the chip CH0. Specifically, the driving order of the chip CH1 is 4, 8, 1, 5, 2, 6, 3, and 7, which is the driving order of the chip CH0 offset backward by two. The “driving deviation amount” field of
The discharge port arrays of the chips CH0 and CH1 have the same tilt. As illustrated in the “tilt deviation amount” field of
Since the chip-to-chip pulse delay control is not performed in the present comparative embodiment, the total amounts of deviation are the sums of the driving deviation amounts and the tilt deviation amounts of the respective discharge ports seg0 to seg7 in the chip CH1. The “total amount of deviation” field of
Next, focusing attention on the discharge ports seg6 and seg7 of the chip CH0 and the discharge ports seg0 and seg1 of the chip CH1 which form the overlapping portion, the impact positions of the dots from the discharge ports will be described in detail.
The discharge ports seg6 and seg7 of the chip CH0 are driven by the time-divisional driving so that the discharge port seg6 is the fourth and the discharge port seg7 the eighth in the driving order. The discharge port seg6 thus has a driving deviation amount of 3/8×d(=0.375), and the discharge port seg7 a driving deviation amount of 7/8×d(=0.875). The discharge port seg6 has a tilt deviation amount of 6/4×d(=1.5), and the discharge port seg7 a tilt deviation amount of 7/4×d(=1.75).
Consequently, as illustrated in the “total amount of deviation” field of
The discharge ports seg0 and seg1 of the chip CH1 on which the offsetting of the driving order is performed are driven by the time-divisional driving so that the discharge port seg0 is the fourth and the discharge port seg1 the eighth in the driving order. The discharge port seg0 thus has a driving deviation amount of 3/8×d(=0.375), and the discharge port seg1 a driving deviation amount of 7/8×d(=0.875). The discharge port seg0 has a tilt deviation amount of 0/4×d(=0), and the discharge port seg1 a tilt deviation amount of 1/4×d(=0.25).
Consequently, as illustrated in the “total amount of deviation” field of
In summary, in the overlapping portion, the discharge port seg6 of the chip CH0 has a dot impact position of 1.875 and the discharge port seg0 of the chip CH1 a dot impact position of 0.375. Although corresponding to the discharge ports located at the same position in the Y direction, the dots are formed at different positions in the X direction. The discharge port seg7 of the chip CH0 has a dot impact position of 2.625, and the discharge port seg0 of the chip CH1 a dot impact position of 1.125. Again, although corresponding to the discharge ports located at the same position in the Y direction, the dots are formed at different positions in the X direction. The second comparative embodiment is thus also unable to make the impact positions of the dots the same between the chips CH0 and CH1 forming the overlapping portion. This causes a drop in the image quality.
As can be seen from
From the foregoing comparisons with the first and second comparative embodiments, it can be seen that a drop in the image quality in the overlapping portion can be suppressed by performing the offsetting of the driving order and the chip-to-chip pulse delay control as described in the first exemplary embodiment.
A second exemplary embodiment will be described below. In the foregoing first exemplary embodiment, a mode in which the offsetting of the driving order and the pulse delay control are performed has been described.
The present exemplary embodiment describes a mode in which a tilt adjustment to the discharge port arrays in the chips (for the sake of simplicity, may hereinafter be referred to as a rough adjustment) is further made in addition to the offsetting of the driving order and the pulse delay control.
A description of parts similar to those of the foregoing first exemplary embodiment will be omitted.
1. In-Chip Tilt Adjustment (Rough Adjustment)
An in-chip tilt adjustment (rough adjustment) to be made in the present exemplary embodiment will initially be described.
As described above, if the discharge port arrays are obliquely arranged at a predetermined angle of θ with respect to the Y direction, the impact position in each chip deviates by 0.25 in the positive X direction each time the seg number increases by one.
In view of this, in the present exemplary embodiment, the plurality of discharge ports in each discharge port array is divided into a plurality of sections along the direction of arrangement, and a tilt adjustment is made to the sections with respectively different amounts of adjustment. Specifically, the discharge ports seg0 to seg7 are initially divided between a section including the discharge ports seg0 to seg3 and a section including the discharge ports seg4 to seg7. Then, only the pieces of recording data corresponding to the discharge ports seg4 to seg7 among the pieces of recording data corresponding to the discharge ports seg0 to seg7 for recording are shifted by one pixel to the negative X direction side. The reason is that since the impact positions of the dots from the discharge ports seg4 to seg7 deviate by one pixel or more to the positive X direction side due to the tilt of the discharge port array, the pieces of recording data are shifted to the negative X direction side to some extent cancel out the effect of the tilt. In the following description, this will be referred to as a tilt adjustment (rough adjustment).
The tilt adjustment can shift the pieces of recording data by different amounts according to the discharge ports, even if the discharge ports belong to the same chip (discharge port array). More specifically, the pieces of recording data corresponding to the discharge ports seg4 to seg7 among the discharge ports seg0 to seg7 of the chip CH0 can be shifted by one pixel to the negative X direction side while the pieces of recording data corresponding to the discharge ports seg0 to seg3 are left unshifted.
The tilt adjustment is processing for shifting the pieces of recording data that defines whether to record or not pixel by pixel. The shift amount (rough adjustment amount) can thus be set to only integer multiples of the pixel size. In other words, the shift amount (rough adjustment amount) by the tilt adjustment is unable to be set to an amount other than integer multiples of the pixel size. For example, recording data corresponding to a certain discharge port can be shifted by one pixel or two pixels, but not 1.5 pixels.
As described above, the tilt adjustment shifts the pieces of recording data corresponding to the discharge ports seg4 to seg7, among the discharge ports seg0 to seg7, to the negative X direction side. The discharge ports seg4 to seg7 are the discharge ports of which the impact positions of the dots deviate by one pixel or more if the tilt adjustment is not performed.
2. Chip-to-Chip Impact Position Deviation Adjustment by Chip-to-Chip Pulse Delay Control
In the present exemplary embodiment, similarly to the first exemplary embodiment, a chip-to-chip impact position deviation adjustment is performed by pulse delay control. Unlike the first exemplary embodiment, the present exemplary embodiment includes performing in-chip tilt adjustment. In the present exemplary embodiment, the pulse delay amount by the pulse delay control is determined in consideration of the effect of the in-chip tilt adjustment.
For example, the discharge ports seg6 and seg7 of the chip CH0 forming one side of the overlapping portion have a deviation amount of 6/4×d(=1.5) and 7/4×d(=1.75), respectively, in the positive X direction from the reference position due to the tilt of the discharge port array.
As described above, an in-chip tilt adjustment of one pixel in the negative X direction is made to the recording data corresponding to the discharge ports seg4 to seg7. The deviation amount of −1 in the positive X direction (=deviation amount of 1 in the negative X direction) by the in-chip tilt adjustment is thus added to the deviation amounts of the discharge ports seg6 and seg7 in the chip CH0.
In consideration of the amount to be cancelled out by the tilt adjustment, the discharge port seg6 has a deviation amount of 0.5(=1.5−1) and the discharge port seg7 a deviation amount of 0.75(=1.75−1) due to the tilt of the discharge port array of the chip CH0.
Meanwhile, the discharge ports seg0 and seg1 of the chip CH1 forming the other side of the overlapping portion have a deviation amount of 0/4×d(=0) and 1/4×d(=0.25), respectively, in the positive X direction from the reference position due to the tilt of the discharge port array. No in-chip tilt adjustment is made to the discharge ports seg0 and seg1.
As a result, there occurs a difference of 0.5(=0.5−0, and =0.75−0.25) between the impact position deviations of the chips CH0 and CH1 due to the tilt of the discharge port arrays.
In view of this, in the present exemplary embodiment, the pulse delay amount is set to 0.5 pixel. This can cancel out the difference between the impact position deviations of the chips CH0 and CH1 in the overlapping portion due to the tilt of the discharge port arrays.
3. Chip-to-Chip Impact Positions According to Second Exemplary Embodiment
The chip CH0 will initially be described.
Similarly to the first exemplary embodiment, the driving deviation amount increases by 1/8×d(=0.125) each time the driving order increases by one. The discharge ports seg0 to seg7 are driven in the driving order of 1, 5, 2, 6, 3, 7, 4, and 8, respectively. The “driving deviation amount” field of
Similarly to the first exemplary embodiment, the tilt deviation amount also increases by 1/4×d(=0.25) each time the seg number increases by one. The “tilt deviation amount” field of
The recording data corresponding to the discharge ports seg4 to seg7 is shifted by one pixel in the negative X direction by the tilt adjustment. The adjustment amount by the tilt adjustment (hereinafter, also referred to as a rough adjustment amount) of −1 is therefore added to the deviation amounts of the discharge ports seg4 to seg7 (“rough adjustment amount” field of
The deviation amounts (dot impact positions) from the reference position in the chip CH0 are the sums of the driving deviation amounts, the tilt deviation amounts, and the rough adjustment amounts of the respective discharge ports seg0 to seg7 in the chip CH0. Specifically, the “total amount of deviation” field of
Next, the chip CH1 will be described.
Similarly to the first exemplary embodiment, the offsetting of the driving order is performed on the discharge ports seg0 to seg7 of the chip CH1. The discharge ports seg0 to seg7 are thus driven in the driving order of 4, 8, 1, 5, 2, 6, 3, and 7, respectively. The “driving deviation amount” field of
The discharge port arrays of the chips CH0 and CH1 have the same tilt. As illustrated in the “tilt deviation amount” field of
The tilt adjustment is performed on the chip CH1 in a similar manner to that on the chip CH0. As illustrated in the “rough adjustment amount” field of
In the present exemplary embodiment, the pulse delay control is performed on the chip CH1 as described above. Here, the application timing of the driving pulses is shifted so that the impact positions of the dots from the chip CH1 are shifted by 0.5 pixel to the positive X direction side from those of the chip CH0 as described above. In the chip CH1, the impact position of each dot therefore deviates as much as the sum of the “driving deviation amount”, the “tilt deviation amount”, the “rough adjustment amount”, and the “pulse delay amount”. The “total amount of deviation” field of
Focusing attention on the discharge ports seg6 and seg7 of the chip CH0 and the discharge ports seg0 and seg1 of the chip CH1 which form the overlapping portion, the impact positions of the dots from the discharge ports will be described in detail.
The discharge ports seg6 and seg7 of the chip CH0 are driven by the time-divisional driving so that the discharge port seg6 is the fourth and the discharge port seg7 the eighth in the driving order. The discharge port seg6 thus has a driving deviation amount of 3/8×d(=0.375), and the discharge port seg7 a driving deviation amount of 7/8×d(=0.875). The discharge port seg6 has a tilt deviation amount of 6/4×d(=1.5), and the discharge port seg7 a tilt deviation amount of 7/4×d(=1.75). The discharge ports seg6 and seg7 both have a rough adjustment amount of −1.
Consequently, as illustrated in the “total amount of deviation” field of
The discharge ports seg0 and seg1 of the chip CH1 are driven by the time-divisional driving so that the discharge port seg0 is the fourth and the discharge port seg1 the eighth in the driving order. The discharge port seg0 thus has a driving deviation amount of 3/8×d(=0.375), and the discharge port seg1 a driving deviation amount of 7/8×d(=0.875). The discharge port seg0 has a tilt deviation amount of 0/4×d(=0), and the discharge port seg1 a tilt deviation amount of 1/4×d(=0.25). The discharge ports seg0 and seg1 both have a pulse delay amount of 0.5. The discharge ports seg0 and seg1 both have a rough adjustment amount of 0.
Consequently, as illustrated in the “total amount of deviation” field of
In summary, the dot impact positions of both the discharge port seg6 of the chip CH0 and the discharge port seg0 of the chip CH1 are 0.875. The dot impact positions of both the discharge port seg7 of the chip CH0 and the discharge port seg1 of the chip CH1 are 1.625. Since the impact positions of the dots of the chips CH0 and CH1 forming the overlapping portion can be made the same, a drop in the image quality in the overlapping portion can be suppressed.
As can be seen from
A comparison between
In the first exemplary embodiment illustrated in
By contrast, in the present exemplary embodiment illustrated in
A third exemplary embodiment will be described below. In the foregoing second exemplary embodiment, the offsetting of the driving order, the pulse delay control, and the tilt adjustment are described to be performed.
In the present exemplary embodiment, a control for shifting a start position of the tilt adjustment (hereinafter, also referred to as a rough adjustment start position) is performed in addition to the foregoing controls according to the second exemplary embodiment.
A description of parts similar to those of the foregoing second exemplary embodiment will be omitted.
1. Shifting of Rough Adjustment Start Position
In the second exemplary embodiment, a pulse delay control of 0.5 pixel is performed on the discharge ports seg0 to seg7 of the chip CH1. The value of 0.5 pixel is an amount needed to cancel out the effect of the tilt deviation amounts and the rough adjustment amounts of the discharge ports seg6 and seg7 of the chip CH0 on the discharge ports seg0 and seg1 of the chip CH1 and align the impact positions of the discharge ports seg6 and seg7 of the chip CH0 and those of the discharge ports seg0 and seg1 of the chip CH1.
The discharge ports of the chip CH1 that do not constitute an overlapping portion with another chip, such as the discharge ports seg2 and seg3, will not discharge ink to the same positions in the Y direction in a shared manner with discharge ports of other chips. Such discharge ports originally do not need a pulse delay of 0.5 pixel.
As described above, the pulse delay control has the limitation that the application timing of the driving pulses to all the discharge ports belonging to the same chip (discharge port array) is to be delayed by the same amounts. For that reason, pulse delay of 0.5 pixel is performed on the discharge ports seg2 and seg3 of which the application timing does not even need to be delayed. In other words, in the second exemplary embodiment, the impact positions of the dots from the discharge ports seg2 and seg3 are unnecessarily shifted by 0.5 pixel in the positive X direction.
In view of this, in the present exemplary embodiment, the rough adjustment start position of the chip CH1 is advanced, compared to that of the chip CH0.
In the second exemplary embodiment, no rough adjustment is made to the discharge ports seg0 to seg3 of both the chips CH0 and CH1. A rough adjustment with a rough adjustment amount of −1 is made to the discharge ports seg4 to seg7 of both the chips CH0 and CH1. In other words, the rough adjustment start position (discharge port at which a rough adjustment is started) is the discharge port seg4.
By contrast, in the present exemplary embodiment, the rough adjustment start position of the chip CH1 is shifted by two discharge ports to the discharge port seg2.
Specifically, no rough adjustment is made to the discharge ports seg0 to seg1 of the chip CH1. A rough adjustment with a rough adjustment amount of −1 is made to the discharge ports seg2 to seg5. A rough adjustment with a rough adjustment amount of −2 is made to the discharge ports seg6 and seg7.
That is, while no rough adjustment is made to the discharge ports seg2 and seg3 of the chip CH1 in the second exemplary embodiment, a rough adjustment of −1 is made to the discharge ports seg2 and seg3 of the chip CH1 in the present exemplary embodiment. This can cancel out unneeded deviations in the impact positions of the dots from the discharge ports seg2 and seg3 of the chip CH1 due to the foregoing pulse delay control as much as possible.
2. Chip-to-Chip Impact Positions According to Third Exemplary Embodiment
The chip CH0 will initially be described.
The “driving deviation amounts”, the “tilt deviation amounts”, and the “rough adjustment amounts” of the discharge ports seg0 to seg7 of the chip CH0 are the same as those of the second exemplary embodiment. As illustrated in the “total amount of deviation” field of
Next, the chip CH1 will be described.
The “driving deviation amounts”, the “tilt deviation amounts”, and the “pulse delay amounts” of the discharge ports seg0 to seg7 of the chip CH1 are the same as those of the second exemplary embodiment.
Unlike the second exemplary embodiment, the rough adjustment amounts are subjected to the foregoing shift of the rough adjustment start position. The “rough adjustment amount” field of
The deviation amounts of the respective discharge ports seg0 to seg7 of the chip CH1 from the reference position are the sums of the “driving deviation amounts”, the “tilt deviation amounts”, the “rough adjustment amounts”, and the “pulse delay amounts”. Specifically, the “total amount of deviation” field of
Focusing attention on the discharge ports seg6 and seg7 of the chip CH0 and the discharge ports seg0 and seg1 of the chip CH1 which form an overlapping portion, the impact positions of the dots from the discharge ports will be described in detail.
The discharge ports seg6 and seg7 of the chip CH0 are driven by the time-divisional driving so that the discharge port seg6 is the fourth and the discharge port seg7 the eighth in the driving order. The discharge port seg6 thus has a driving deviation amount of 3/8×d(=0.375), and the discharge port seg7 a driving deviation amount of 7/8×d(=0.875). The discharge port seg6 has a tilt deviation amount of 6/4×d=(1.5), and the discharge port seg7 a tilt deviation amount of 7/4×d(=1.75). The discharge ports seg6 and seg7 both have a rough adjustment amount of −1.
Consequently, as illustrated in the “total amount of deviation” field of
The discharge ports seg0 and seg1 of the chip CH1 are driven by the time-divisional driving so that the discharge port seg0 is the fourth and the discharge port seg1 the eighth in the driving order. The discharge port seg0 thus has a driving deviation amount of 3/8×d(=0.375), and the discharge port seg1 a driving deviation amount of 7/8×d(=0.875). The discharge port seg0 has a tilt deviation amount of 0/4×d(=0), and the discharge port seg1 a tilt deviation amount of 1/4×d(=0.25). The discharge ports seg0 and seg1 both have a pulse delay amount of 0.5. The discharge ports seg0 and seg1 both have a rough adjustment amount of 0.
Consequently, as illustrated in the “total amount of deviation” field of
In summary, the dot impact positions of both the discharge port seg6 of the chip CH0 and the discharge port seg0 of the chip CH1 are 0.875. The dot impact positions of both the discharge port seg7 of the chip CH0 and the discharge port seg1 of the chip CH1 are 1.625. Since the impact positions of the dots of the chips CH0 and CH1 forming the overlapping portion can be made the same, a drop in the image quality in the overlapping portion can be suppressed.
In the overlapping portion, the dot impact positions of both the chips CH0 and CH1 are the same as in the second exemplary embodiment.
As can be seen from
A comparison between
In the second exemplary embodiment illustrated in
By contrast, in the present exemplary embodiment illustrated in
A fourth exemplary embodiment will be described below. In the foregoing third exemplary embodiment, the offsetting of the driving order, the pulse delay control, the tilt adjustment (rough adjustment), and the shift of the rough adjustment start position are described to be performed.
In the present exemplary embodiment, if the impact position of each discharge port does not fall within a predetermined range (within a reference range), an adjustment specific to the discharge port (hereinafter, may be referred to as a fine adjustment) is made in addition to the foregoing controls according to the second exemplary embodiment. The fine adjustment is made to shift the recording data of the discharge port so that the dot impacts within the reference range.
A description of parts similar to those of the foregoing third exemplary embodiment will be omitted.
1. Impact Adjustment Specific to Each Discharge Port (Fine Adjustment)
An impact adjustment specific to each discharge port (fine adjustment) to be made in the present exemplary embodiment will be described.
In the present exemplary embodiment, the recording data of a discharge port of which the sum of the driving deviation amount, the tilt deviation amount, the rough adjustment amount, and the pulse delay amount is one pixel or more is shifted in the negative X direction after the controls of the third exemplary embodiment are performed. The amount of shift here is set to an integer multiple of the pixel size so that the shifted impact position becomes less than one pixel.
Details will be described. As illustrated in
By the impact adjustment specific to each discharge port (fine adjustment) according to the present exemplary embodiment, the pieces of recording data corresponding to the discharge ports seg3 and seg7 of the chip CH0 and the discharge ports seg1 and seg5 of the chip CH1 mentioned above are adjusted with a fine adjustment amount of −1. In other words, the pieces of recording data corresponding to the discharge ports seg3 and seg7 of the chip CH0 and the discharge ports seg1 and seg5 of the chip CH1 are shifted by one pixel in the negative X direction.
By such a fine adjustment, all the dots from the discharge ports seg0 to seg7 of the chips CH0 and CH1 can be controlled within the range of one pixel or less. This can reduce variations in the impact positions of the dots from the discharge ports seg0 to seg7 to suppress a drop in image quality.
2. Chip-to-Chip Impact Positions According to Fourth Exemplary Embodiment
The chip CH0 will initially be described.
The “driving deviation amounts”, the “tilt deviation amounts”, and the “rough adjustment amounts” of the discharge ports seg0 to seg7 of the chip CH0 are the same as those of the third exemplary embodiment.
As illustrated in the “fine adjustment amount” field of
The deviation amounts of the respective discharge ports seg0 to seg7 of the chip CH0 from the reference position are the sums of the “driving deviation amounts”, the “tilt deviation amounts”, the “rough adjustment amounts”, and the “fine adjustment amounts”. Specifically, the “total amount of deviation” field of
Next, the chip CH1 will be described.
The “driving deviation amounts”, the “tilt deviation amounts”, the “rough adjustment amounts”, and the “pulse delay amounts” of the discharge ports seg0 to seg7 of the chip CH1 are the same as in the third exemplary embodiment.
As illustrated in the “fine adjustment amount” field of
The deviation amounts of the respective discharge ports seg0 to seg7 of the chip CH1 from the reference position are the sums of the “driving deviation amounts”, the “tilt deviation amounts”, the “rough adjustment amounts”, the “fine adjustment amounts”, and the “pulse delay amounts”. Specifically, the “total amount of deviation” field of
Focusing attention on the discharge ports seg6 and seg7 of the chip CH0 and the discharge ports seg0 and seg1 of the chip CH1 which form an overlapping portion, the impact positions of the dots from the discharge ports will be described in detail.
The discharge ports seg6 and seg7 of the chip CH0 are driven by the time-divisional driving so that the discharge port seg6 is the fourth and the discharge port seg7 the eighth in the driving order. The discharge port seg6 thus has a driving deviation amount of 3/8×d(=0.375), and the discharge port seg7 a driving deviation amount of 7/8×d(=0.875). The discharge port seg6 has a tilt deviation amount of 6/4×d(=1.5), and the discharge port seg7 a tilt deviation amount of 7/4×d(=1.75). The discharge ports seg6 and seg7 both have a rough adjustment amount of −1. The discharge port seg6 has a fine adjustment amount of 0, and the discharge port seg7 a fine adjustment amount of −1.
Consequently, as illustrated in the “total amount of deviation” field of
The discharge ports seg0 and seg1 of the chip CH1 are driven by the time-divisional driving so that the discharge port seg0 is the fourth and the discharge port seg1 the eighth in the driving order. The discharge port seg0 thus has a driving deviation amount of 3/8×d(=0.375), and the discharge port seg1 a driving deviation amount of 7/8×d(=0.875). The discharge port seg0 has a tilt deviation amount of 0/4×d(=0), and the discharge port seg1 a tilt deviation amount of 1/4×d=(0.25). The discharge ports seg0 and seg1 both have a pulse delay amount of 0.5. The discharge ports seg0 and seg1 both have a rough adjustment amount of 0. The discharge port seg0 has a fine adjustment amount of 0, and the discharge port seg1 a fine adjustment amount of −1.
Consequently, as illustrated in the “total amount of deviation” field of
In summary, the dot impact positions of both the discharge port seg6 of the chip CH0 and the discharge port seg0 of the chip CH1 are 0.875. The dot impact positions of both the discharge port seg7 of the chip CH0 and the discharge port seg1 of the chip CH1 are 0.625. Since the impact positions of the dots of the chips CH0 and CH1 forming the overlapping portion can be made the same, a drop in the image quality in the overlapping portion can be suppressed.
As can be seen from
A comparison between
In the third exemplary embodiment illustrated in
By contrast, in the present exemplary embodiment illustrated in
A fifth exemplary embodiment will be described below. In the foregoing exemplary embodiments, the time-divisional driving is described to be performed.
By contrast, the present exemplary embodiment describes a case in which the plurality of discharge ports in a discharge port array is driven at the same time, i.e., simultaneous driving is performed. Specifically, only the tilt adjustment and the chip-to-chip pulse delay control are performed among the foregoing controls.
A description of parts similar to those of the foregoing exemplary embodiments will be omitted.
1. Chip-to-Chip Impact Positions According to Fifth Exemplary Embodiment
The chip CH0 will initially be described.
In the present exemplary embodiment, there occurs no driving deviation (the driving deviation amount is 0) since the simultaneous driving is performed.
Similarly to the foregoing exemplary embodiments, the tilt deviation amount increases by 1/4×d(=0.25) each time the seg number increases by one. The “tilt deviation amount” field of
Similarly to the second exemplary embodiment, the tilt adjustment (rough adjustment) is made to the discharge ports seg4 to seg7. The rough adjustment amounts of the discharge ports seg4 to seg7 are −1. The rough adjustment amounts of the discharge ports seg0 to seg3 are 0.
The deviation amounts (dot impact positions) from the reference position in the chip CH0 are the sums of the tilt deviation amounts and the rough adjustment amounts of the respective discharge ports seg0 to seg7 in the chip CH0. Specifically, the “total amount of deviation” field of
Next, the chip CH1 will be described.
For the chip CH1, there occurs no driving deviation (the driving deviation amount is 0), either, since the simultaneous driving is performed.
The discharge port arrays of the chips CH0 and CH1 have the same tilt. As illustrated in the “tilt deviation amount” field of
The tilt adjustment of the chip CH1 is performed in a similar manner to that of the chip CH0. As illustrated in the “rough adjustment amount” field of
The chip CH1 is subjected to the pulse delay control. Here, the application timing of the driving pulses is shifted so that the impact positions of the dots from the chip CH1 are shifted by 0.5 pixel to the positive X direction side with respect to those of the chip CH0.
In the chip CH1, the impact position of a dot therefore deviates as much as the sum of the “tilt deviation amount”, the “rough adjustment amount”, and the “pulse delay amount”. The “total amount of deviation” field of
Focusing attention on the discharge ports seg6 and seg7 of the chip CH0 and the discharge ports seg0 and seg1 of the chip CH1 which form an overlapping portion, the impact positions of the dots from the discharge ports will be described in detail.
The tilt deviation amounts of the discharge ports seg6 and seg7 of the chip CH0 are 6/4×d(=1.5) for the discharge port seg6 and 7/4×d(=1.75) for the discharge port seg7. The discharge ports seg6 and seg7 both have a rough adjustment amount of −1.
Consequently, as illustrated in the “total amount of deviation” field of
The tilt deviation amounts of the discharge ports seg0 and seg1 of the chip CH1 are 0/4×d(=0) for the discharge port seg0 and 1/4×d(=0.25) for the discharge port seg1. The discharge ports seg0 and seg1 both have a pulse delay amount of 0.5. The discharge ports seg0 and seg1 both have a rough adjustment amount of 0.
Consequently, as illustrated in the “total amount of deviation” field of
In summary, the dot impact positions of both the discharge port seg6 of the chip CH0 and the discharge port seg0 of the chip CH1 are 0.5. The dot impact positions of both the discharge port seg7 of the chip CH0 and the discharge port seg1 of the chip CH1 are 0.75. Since the impact positions of the dots of the chips CH0 and CH1 forming the overlapping portion can be made the same, a drop in the image quality in the overlapping portion can be suppressed.
As can be seen from
(Other Exemplary Embodiments)
In the foregoing exemplary embodiments, cyan, magenta, yellow, and black inks are described to be discharged from the different recording heads 105 to 108. However, other exemplary embodiments are also possible. In one exemplary embodiment, cyan, magenta, yellow, and black inks may be discharged from one recording head. Discharge port arrays for discharging cyan, magenta, yellow, and black inks may be provided in the same heater board.
In the foregoing exemplary embodiments, the chip-to-chip pulse delay control is described to be performed on the chip CH1 of the chips CH0 and CH1 so that ink can be discharged to the same positions in the overlapping portion between the chips CH0 and CH1. However, other exemplary embodiments are also possible. An adjustment may be made to advance the discharge timing (the application timing of the driving pulses) of the chip CH0. Both an adjustment to advance the discharge timing of the chip CH0 and an adjustment to delay the discharge timing of the chip CH1 may be made.
In the second to fifth exemplary embodiments, the discharge port arrays are tilted at an angle of θ with respect to the Y direction, and the tilt adjustment (rough adjustment) is made so that the rough adjustment amount decreases by one (the absolute value of the rough adjustment amount increases by one) to reduce the effect of the tilt of the discharge port arrays each time the seg number increases by four. The rough adjustment amount can be set to different values depending on the tilt angle of the discharge port arrays. For example, if the discharge port arrays are tilted at an angle of 2θ with respect to the Y direction, the effect of the tilt can be reduced by reducing the rough adjustment amount by one (increasing the absolute value of the rough adjustment amount by one) each time the seg number increases by two. The rough adjustment amount itself may be doubled when the angle is 2θ, compared to when the angle is θ.
In the foregoing exemplary embodiments, the recording heads longer than the width of the recording medium P are described to be used to perform recording while the recording medium P is being conveyed. However, other exemplary embodiments are also possible. For example, in one exemplary embodiment, a recording operation for discharging ink while scanning a recording head in a direction crossing the direction of arrangement of discharge ports and a conveyance operation for conveying the recording medium in the direction of arrangement between one scan and another may be repeated to complete recording on the recording medium by a plurality of scans (movements).
A recording apparatus according to an exemplary embodiment of the disclosure can suppress a drop in the image quality of recording in overlapping portions between discharge port arrays in a case where a recording head including discharge port arrays obliquely arranged with respect to the width direction of a recording medium is used.
While the disclosure has been described with reference to exemplary embodiments, it is to be understood that the disclosure is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.
This application claims the benefit of Japanese Patent Application No. 2017-127996, filed Jun. 29, 2017, which is hereby incorporated by reference herein in its entirety.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2017-127996 | Jun 2017 | JP | national |
| Number | Name | Date | Kind |
|---|---|---|---|
| 20100309242 | Chikuma | Dec 2010 | A1 |
| Number | Date | Country |
|---|---|---|
| 2006-334899 | Dec 2006 | JP |
| Entry |
|---|
| IP.com search (Year: 2019). |
| Number | Date | Country | |
|---|---|---|---|
| 20190001669 A1 | Jan 2019 | US |
