Patent Application
20250162308
The present invention relates to a recording element substrate and a recording apparatus.
An inkjet recording head (recording head) for ejecting ink to form a desired image on a recording medium and an inkjet recording apparatus (recording apparatus) including the inkjet recording head have been known. In general, a recording element substrate to be mounted to the inkjet recording head has a heat generating resistive element for generating ink ejection energy. To form an image on a recording medium, an electric pulse is continuously applied to the heat generating resistive element such that ink is ejected. It is known that time-related deterioration due to the repeated ink ejection or due to the application of the electric pulse while there is no ink may cause change in resistance value of the heat generating resistive element and disconnection of electric wiring including the heat generating resistive element.
Meanwhile, in recent years, products and manufacturing methods that do not affect environments as little as possible have been sought after. By reusing and recycling used inkjet recording heads, resources can be effectively used to reduce environmental loads. In a step of regenerating a used head, a used head is collected from a house and the used head is first pre-checked in a recycling factory. As a result of the check, if there is abnormality in a heat generating resistive element inside a recording element substrate, the head is difficult to reuse, and is to be recycled.
In this case, if the above-mentioned pre-check of the recording head can be implemented not at a recycling factory but by a household inkjet recording apparatus, the pre-check can be implemented in a house before collecting a used head, and only a reusable recording head can be selected and delivered to a recycling factory. As a result, not all used heads are required to be collected, and cost for collection can be reduced.
Thus, in order to detect resistance value change or disconnection of a heat generating resistive element in a recording element substrate mounted to a recording head, a method in which detection wiring for detecting current flowing through the heat generating resistive element is formed inside the recording element substrate has been studied.
Japanese Patent Application Publication No. 2001-121703 discloses a configuration in which detection wiring is additionally provided so as to be adjacent to wiring of a heat generating resistive element in a recording element substrate. The wiring of the heat generating resistive element and the detection wiring are adjacent to each other, and hence there is parasitic capacitance between the wirings. Thus, if a wiring current value of the heat generating resistive element has changed, a voltage value of a resistor terminal that is ground-connected to the detection wiring changes through the parasitic capacitance due to electrostatic induction. In this method, the voltage value is compared with a threshold set in advance, and when a voltage value exceeding the threshold is detected, it is determined that the heat generating resistive element wiring has been disconnected.
However, in Japanese Patent Application Publication No. 2001-121703, the heat generating resistive element wiring and the detection wiring are not directly connected, and hence the method is a current observation method by indirect electrostatic induction. Thus, a large change in current value flowing through the heat generating resistive element wiring can be ascertained, but detailed measurement of the current value cannot be performed. Accordingly, although the presence/absence of disconnection of the heat generating resistive element wiring can be detected, it is extremely difficult to detect detailed deterioration states caused by change in resistance value of the heat generating resistive element.
The present invention has been made in view of the above-mentioned problem. It is an object of the present invention to provide a technology for detecting detailed states of a heat generating resistive element provided in a recording element substrate for a recording head.
The present invention provides a recording element substrate, comprising:
The present invention also provides a recording apparatus, comprising:
According to the present invention, the technology for detecting detailed states of a heat generating resistive element provided in a recording element substrate for a recording head can be provided.
Further features of the present invention will become apparent from the following description of exemplary embodiments with reference to the attached drawings.
Referring to the drawings, preferred embodiments of the present invention are exemplarily described in detail below. However, the dimensions, materials, shapes, and relative arrangements of components described in the embodiments are not intended to limit the scope of the present invention to only the ones unless otherwise described. In the following description, the materials and shapes of members described once are the same in the subsequent description as in the first description unless otherwise described again. For configurations and steps that are not particularly illustrated or described, well-known technologies or publicly known technologies in the technical field can be applied. Overlapping descriptions are sometimes omitted.
Hereinafter, a recording element substrate to be mounted to an inkjet recording head, an inkjet recording head, and a recording apparatus according to the present invention are described with reference to the drawings.
A first embodiment is described with reference to
In the recording head 200 in the present embodiment, two recording element substrates 400 for ejecting liquid are formed. The recording element substrate 400 has a heater (not shown) for heating ink. By energizing and heating the heater, air bubbles are generated in ink, and liquid is ejected from ejection ports in a plurality of rows. Note that the ejection ports are divided into even-numbered rows and odd-numbered rows, and control system circuits and power supply system circuits are also present separately.
A circuit formed in the recording element substrate is described with reference to
The recording element substrate 400 is provided with a first voltage application terminal that is connected to the power supply voltage VH1 and forms a circuit for providing the current detection circuit 108 between the heat generating resistive element Rh and the power supply voltage VH1. The recording element substrate 400 is further provided with a second voltage application terminal that is connected to a power supply voltage VH3 and forms a circuit for preventing the current detection circuit 108 from being located between the heat generating resistive element Rh and the power supply voltage VH3 (an ejection circuit for applying voltage for ejection to the heat generating resistive element Rh). When any one of the current detection circuit and the ejection circuit is selected in accordance with a switch signal from a signal line 107, operations are switched between the state detection of the heat generating resistive element Rh and the ejection of liquid from the ejection module 104.
The ejection module 104 has a heat generating resistive element Rh for generating energy for ejecting liquid from ejection ports in even-numbered rows formed in the recording element substrate 400, a drive element MD1 for driving the heat generating resistive element Rh, and a logic circuit AND1. The drive element MD1 is a MOS transistor in the present embodiment. The MOS transistor has a role of a switch for determining whether to add voltage to the heat generating resistive element Rh. The logic circuit AND1 is an AND circuit for driving the drive element MD1 on the basis of signals from the control data supply circuit 101, and performs logical operations of a plurality of signals. When the drive element MD1 drives the heat generating resistive element Rh (that is, the heat generating resistive element Rh is energized to generate heat such that air bubbles are generated in ink), liquid can be ejected from ejection ports to enable recording. The heat generating resistive element Rh is supplied with the power supply voltage VH1 (for example, 24 V) through the current detection circuit 108. On the other hand, a ground voltage GNDH1 is supplied to the source side of the drive element MD1, which is a MOS transistor.
The memory module 106 has an anti-fuse element Ca, a parallel resistor Rp (resistive element) connected in parallel to the anti-fuse element Ca, a drive element MD2 for writing information in the anti-fuse element Ca, and a logic circuit AND2. The anti-fuse element Ca fixedly holds information by being supplied with overvoltage. In other words, the anti-fuse element Ca functions as an OTP (One Time Programmable) ROM, which is a memory that can be programmed only once. The anti-fuse element Ca is in an insulated state before overvoltage is supplied, and when overvoltage is supplied, the anti-fuse element Ca becomes a resistive element and enters an energized state. Thus, for example, 0 is determined when the anti-fuse element Ca is in the insulated state while 1 is determined when the anti-fuse element Ca is in the energized state, thus exhibiting a memory function.
The parallel resistor Rp is used to prevent overvoltage from a power supply voltage VID from being applied across the anti-fuse element Ca such that information is erroneously written in the anti-fuse element Ca although the drive element MD2 is in the non-conductive state. The drive element MD2 is, for example, a transistor. In the case of recording information of 1 in the anti-fuse element Ca, the drive element MD2 is driven to apply voltage to the anti-fuse element Ca, so that the anti-fuse element Ca becomes an energized state due to the applied voltage and information of 1 is stored.
The anti-fuse element Ca is supplied with the power supply voltage VID (for example, 24 V), and a ground voltage GNDH is supplied to the source side of the drive element MD2 that is a MOS transistor.
Note that the power supply voltage VID and the power supply voltage VH1 are independent power supply lines, but in the case where a minimum value of voltage required for writing in the anti-fuse element is equal to or less than the power supply voltage VH1, for example, the power supply voltage VH1 may be used together with a step-down circuit.
The current detection circuit 108 has a shunt resistor Rs that is a current detection resistor connected in series to the power supply voltage VH1, a voltage detector AMP, a drive element MD3 that functions as a switch for causing current to flow through the shunt resistor Rs, a drive element MD4 that is connected in series to the power supply voltage VH1 and the heat generating resistive element Rh and functions as a switch for causing current therethrough, and a logic circuit element NOT1.
The drive elements MD3 and MD4 in the present embodiment are MOS transistors. The drain side of MD3 is connected to the shunt resistor Rs, and the source side thereof is connected to the heat generating resistive element Rh. The drain side of MD4 is connected to the power supply voltage VH1, and the source side thereof is connected to the heat generating resistive element Rh. The logic circuit element NOT1 is a NOT circuit for driving the drive element MD4 on the basis of input of a switch signal through the signal line 107 from the control data supply circuit 101.
The switch signal from the signal line 107 is connected to both the drive element MD3 and the drive element MD4, and holds the state of 0 (Low) or 1 (Hi) such that only one of the drive element MD3 and the drive element MD4 becomes an ON state. The voltage detector AMP inputs potentials of both terminals of the shunt resistor Rs, and outputs a differential voltage value of the terminals of the shunt resistor Rs as VOUT1.
The control data supply circuit 101 is a circuit for driving the drive elements MD1, MD2, MD3, and MD4, and is configured by, for example, a shift register (not shown) or a latch circuit (not shown). A clock signal (CLK), a data signal (DATA), a latch signal (LT), and a heat enable signal (HE) from the outside of the recording element substrate are input to the control data supply circuit 101 through terminals of the recording element substrate. The data signal (DATA) includes information for selecting the ejection module 104, the memory module 106, and the drive elements MD3 and MD4. The data signal (DATA) is input in a serial form on the basis of the clock signal (CLK).
The control data supply circuit 101 receives the data signal (DATA), and generates a block selection signal, a group selection signal, an AND switch signal, and a NOT switch signal on the basis of information included in the data signal (DATA).
The ejection modules 104 in even-numbered rows, the memory module 106, and the drive elements MD3 and MD4 are selected and driven on the basis of the signals. The control data supply circuit 101 supplies the logic circuits (AND1 to AND2) with the block selection signal through a signal line 102, the group selection signal through a signal line 103, and the AND switch signal through a signal line 105. Furthermore, the control data supply circuit 101 supplies the NOT circuit (NOT1) with the NOT switch signal through a signal line 107.
To drive the ejection modules 104 and the memory modules 106 in a time-division manner, as illustrated in
The group selection signal is a signal for selecting which group is driven when a plurality of ejection modules 104 are divided into a plurality of groups. The block selection signal is a signal for selecting which of a plurality of heat generating resistive elements Rh in the same group is driven. For the drive element MD1, a DMOS transistor (Double-diffused MOSFET), which is a MOS transistor that can withstand high voltage, is used.
Note that, as an example, the plurality of ejection modules 104 are divided into eight groups (G1, . . . , G8) each including three ejection modules, but the present embodiment is not limited thereto. For example, the ejection modules 104 may be divided into eight groups each including 16 ejection modules.
The memory module 106 can drive the anti-fuse element Ca by using the signal line 102 and the signal line 103. In this case, the case where the anti-fuse element Ca is driven and the case where the ejection module 104 is driven are switched on the basis of the AND switch signal from the signal line 105.
To the memory module logic circuit AND2, the block selection signal, the group selection signal, and the switch signal from the signal line 105 are input. Then, when a signal corresponding to the input signals is input from the AND2 to the gate side of the memory module drive element MD2 such that the drive element MD2 is driven, current flows through the anti-fuse element Ca, and the anti-fuse element Ca is changed from an insulated state to an energized state. For the memory module drive element MD2, a DMOS transistor is used similarly to the ejection module drive element MD1.
Referring to
In the first embodiment, in the current detection circuit 108, 5 V is applied as a power supply voltage VH3 dedicated for current detection, and a ground voltage GNDH1 is connected. The voltage detector AMP is a differential amplifier for amplifying a minute differential voltage between two input terminals several tens of times, and outputting the resultant.
In the case of detecting the value of current flowing through the heat generating resistive element Rh, when the drive elements MD3 and MD1 are driven, the current flows from the power supply voltage VH3 to the ground voltage GNDH1 through the shunt resistor Rs, the drive element MD3, the heat generating resistive element Rh, and the drive element MD1. When VH3 is 5 V, the shunt resistor Rs is 5Ω, and a design resistance value of the heat generating resistive element Rh is 370Ω, the flowing current value is 13.3 mA according to Ohm's law. In this case, the potential difference at each end of the shunt resistor is 0.07 V. When the voltage amplification factor of the differential amplifier is 20, the output voltage VOUT1 is 1.40 V. In this manner, in the case of detecting deterioration of the heat generating resistive element Rh, the voltage amplification factor and the values of the shunt resistor Rs are known design values, and hence if the output voltage VOUT1 can be detected, the current value flowing through the heat generating resistive element Rh and the resistance value thereof can be calculated by Ohm's law. Note that a calculation unit for performing such calculation processing is not limited as long as the calculation unit is a circuit having an arithmetic function. In the present embodiment, a determination unit 503 included in a recording apparatus 501 is used as the calculation unit, but an arithmetic circuit may be provided in a recording head.
On the other hand, in the case where current detection operation is performed after the recording head 200 is used for a given period of time, VH3 is 5 V, the shunt resistor Rs is 5Ω, and the differential voltage at each end of the shunt resistor is 0.025 V, which means that the output voltage of the voltage detector AMP is 0.50 V due to the multiplication of 20. Thus, the current flowing through the heat generating resistive element Rh is 5.00 mA, and the resistance value can be calculated to 1,000Ω.
In this manner, by comparing the resistance value 370Ω (detected current: 13.3 mA) of the heat generating resistive element Rh before the recording head 200 is used with the resistance value 1,000Ω (detected current: 5.00 mA) of the deteriorated heat generating resistive element Rh, the degree of deterioration of the heat generating resistive element Rh can be detected. Thus, the use application of the recording head 200 can be classified to reusing or recycling.
Note that the resistance value of the shunt resistor Rs and the amplification factor of the differential amplifier need to be designed as appropriate in consideration of change amounts of the resistance value of the mounted heat generating resistive element Rh and the output voltage VOUT1.
The input signals include LT, CLK, and DATA_EVEN. DATA_EVEN includes block selection for even-numbered rows, group selection, and NOT circuit switch signal information. DATA_EVEN is a signal that becomes a Hi state at the rising of CLK and becomes a Low state at the falling of CLK. When the contents of the signal are DATA0 and BE0, drive elements MD in a group 1 and a block 1 are selected. Next, when the contents of the signal are DATA0 and BE1, drive elements MD in a group 1 and a block 2 are selected. In
On the other hand,
Referring to
Furthermore, the control unit 502 controls the switching of SW1. When SW1 is connected to a terminal C, a path between a current detection power source (for example, 5 V) and the heat generating resistive element Rh is established. When SW1 is connected to a terminal D, a path between an ejection power source (for example, 24 V) and the heat generating resistive element Rh is established.
Furthermore, the control unit 502 generates control data to be transmitted to the internal control data supply circuit 101 through the CLK terminal, the LT terminal, the HE terminal, the DATAODD terminal, and the DATA_EVEN terminal of the recording element substrate 400. The control data includes a clock signal (CLK), a latch signal (LT), a heat enable signal (HE), and data signals (DATA_ODD, DATA_EVEN). The control data is used to control driving of the drive elements MD1, MD3, and MD4.
The data signal DATAEVEN controls an ejection module and a current detection circuit that correspond to ejection ports in even-numbered rows formed in the recording element substrate 400, and the data signal DATAODD controls an ejection module and a current detection circuit that correspond to ejection ports in odd-numbered rows. The clock signal, the latch signal, and the heat enable signal are common to even-numbered rows and odd-numbered rows.
As described above, in the conventional method using indirect electrostatic induction in the state detection of the heat generating resistive element Rh provided in the recording element substrate 400 used for the recording head 200, a large change in current value flowing through the heat generating resistive element wiring can be grasped, but detailed measurement of the current value cannot be performed. Accordingly, although the presence/absence of disconnection of the heat generating resistive element wiring can be detected, it is difficult to detect detailed deterioration states caused by change in resistance value of the heat generating resistive element Rh.
In the present invention, on the other hand, the detection circuit is connected in series to the heat generating resistive element wiring by wiring to measure the value of current flowing through the heat generating resistive element wiring. For example, a circuit capable of measuring all values of currents each flowing through each heat generating resistive element Rh can be provided inside the recording element substrate 400. Furthermore, the current detection circuit 108 that connects the heat generating resistive element wiring in series to the current detection shunt resistor Rs by wiring can be formed such that the value of current flowing through the heat generating resistive element can be calculated from the voltage value at each end of the shunt resistor and the shunt resistance value. Accordingly, the value of current flowing through each heat generating resistive element Rh can be measured from the calculated current value, and hence not only the disconnected state of the heat generating resistive element Rh but also the detailed deterioration state can be detected.
A second embodiment is described with reference to
In the present embodiment, the current detection operation is performed similarly to the first embodiment, but the present embodiment is preferred for the case where a high voltage power supply common to an ejection power supply is used without using a power supply dedicated for current detection as the power supply voltage VH4. The current detection operation may be executed while there is no ink in the recording head 200, and is driving without the ejection of ink. Thus, there is a risk in that breakdown of elements around the heat generating resistive element Rh may be caused due to idle ejection and long-term high voltage application. Thus, in the present embodiment, a voltage obtained by decreasing the power supply voltage VH4, which is high voltage, by the step-down resistor Rd is applied to the heat generating resistive element Rh.
For example, the step-down resistor Rd is 5 kΩ, the power supply voltage VH4 is 24 V, the shunt resistor Rs is 5Ω, and a design resistance value of the heat generating resistive element Rh is 370Ω. In this case, a flowing current value is 4.43 mA according to Ohm's law, and the value of voltage applied to an upstream terminal of the shunt resistor Rs is reduced to be as low as 1.85 V.
In this manner, by inserting the step-down resistor Rd, the application voltage of the power supply voltage VH4 for ink ejection and the application voltage of the power supply voltage VH4 for current detection operation can be the same. As a result, a low voltage value dedicated for current value detection is not required to be input from the outside of a head, and hence a dedicated power supply on the inkjet recording apparatus side is unnecessary, and design loads and apparatus cost can be reduced.
A third embodiment is described with reference to
The comparator circuit 700 in the present embodiment includes two comparators 701 and 702. One input terminal of the comparator 701 is connected to the output of the voltage detector AMP, and the other input terminal is connected between reference voltage generating resistors R1 and R2. Similarly, one terminal of the comparator 702 is connected to the output of the voltage detector AMP, and the other terminal is connected between reference voltage generating resistors R3 and R4.
The comparator 701 uses a divided voltage value of a voltage VDD between R1 and R2 with reference to GNDH1 as a reference voltage, and compares the reference voltage with the output voltage of the voltage detector AMP. When the value of the output voltage is larger, DOUT1 becomes Hi, and on the other hand, when the value of the output voltage is smaller, DOUT1 becomes Low. The comparator 702 performs similar operation. When the value of the output voltage is larger than a reference voltage, DOUT2 becomes Hi, and on the other hand, when the value of the output voltage is smaller, DOUT2 becomes Low. In this case, when two kinds of different values are used for the reference voltages input to the comparators 701 and 702, the output voltage value of the voltage detector AMP can be classified into 2-bit information (four kinds). This circuit has an effect of simplifying a voltage reading circuit by converting the output voltage of the voltage detector AMP into Hi voltage and Low voltage.
While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.
This application claims the benefit of Japanese Patent Application No. 2023-195108, filed on Nov. 16, 2023, which is hereby incorporated by reference wherein in its entirety.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2023-195108 | Nov 2023 | JP | national |
