1. Technical Field
The present disclosure relates to voltage rectifying technologies, and more particularly to a rectifier circuit having a power factor correction function and an electronic device using the same.
2. Description of Related Art
The components in the drawings are not necessarily drawn to scale, the emphasis instead placed upon clearly illustrating the principles of at least one embodiment. In the drawings, like reference numerals designate corresponding parts throughout the various views, and all the views are schematic.
The disclosure, including the accompanying drawings, is illustrated by way of example and not by way of limitation. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean “at least one.”
The three-phase AC power supply 20 includes a first AC voltage output terminal 23, a second AC voltage output terminal 25, a third AC voltage 27 and a common terminal 29. The common terminal 29 is grounded. The three-phase AC power supply 20 generates a first AC voltage, a second AC voltage and a third AC voltage. The first AC voltage, the second AC voltage and the third AC voltage have a same frequency. The first AC voltage and the second AC voltage, the second AC voltage and the third AC voltage, the third AC voltage and the first AC voltage have a same phase difference. The phase difference is sixty degrees, in one example. The first AC voltage is output via the first AC voltage output terminal 23 and the common terminal 29. The second AC voltage is output via the second AC voltage output terminal 25 and the common terminal 29. The third AC voltage is output via the third AC output terminal 27 and the common terminal 29. Each of the first AC voltage, the second AC voltage and the third AC voltage is a periodical and sinusoidal waveform. The sinusoidal waveform includes a positive period and a negative period. The voltage value of the AC voltage is greater than zero in the positive period and less than zero in the negative period.
The first rectifier unit 30 receives the first AC voltage and converts the first AC voltage into a first DC voltage. The first DC voltage serves as a driving voltage of the first load 400. The second rectifier unit 50 receives the second AC voltage and converts the second AC voltage into a second DC voltage. The second DC voltage serves as a driving voltage of the second load 500. The third rectifier unit 70 receives the third AC voltage and converts the third AC voltage into a third DC voltage. The third DC voltage serves as a driving voltage of the third load 700.
The first rectifier unit 30 includes a first receiving terminal 31, a second receiving terminal 32, a rectifier sub-unit 33, a first output terminal 34 and a second output terminal 35. The first receiving terminal 31 and the second receiving terminal 32 are electronically coupled to the first AC voltage output terminal 23 and the common terminal 29 respectively. The second rectifier unit 50 and the third rectifier unit 70 include a rectifier sub-unit 33. The rectifier sub-unit 33 of the second rectifier unit 50 and the rectifier sub-unit 33 of the third rectifier unit 70 have same electronic components and connections with the rectifier sub-unit 33 of the first rectifier unit 30. Hereafter, the rectifier sub-unit 33 of the first rectifier unit 30 will be described.
The rectifier sub-unit 33 of the first rectifier unit 30 includes a first voltage input terminal 331, a second voltage input terminal 332, a first switch 333, an energy storing circuit 334, a first unidirectional circuit 335, a second unidirectional circuit 336, a second switch 337, a smoothing circuit 338, a signal generating circuit 339, a first DC voltage output terminal “a” and a second DC voltage output terminal “b.”
The first voltage input terminal 331 and the second voltage input terminal 332 are electronically coupled to the first receiving terminal 31 and the second receiving terminal 32.
The signal generating circuit 339 includes a first terminal 3391 and a second terminal 3392. The signal generating circuit 339 generates a first control signal and a second control signal, outputs the first control signal via the first terminal 3391, and outputs the second control signal via the second terminal 3392. The first control signal and the second control signal are pulse width modulation (PWM) signals.
The first switch 333 includes a first control terminal 3331, a second control terminal 3332 and a third control terminal 3333. The first control terminal 3331 is electronically coupled to the first terminal 3391. The first switch 333 receives the first control signal being output from the first terminal 3391 and switches on or switches off under the control of the first control signal. In detail, the first control terminal 3331 controls the second control terminal 3332 and the third control terminal 3333 to turn on or turn off under the control of the first control signal. When the second control terminal 3332 and the third control terminal 3333 are turned on, the first switch 333 switches on. When the second control terminal 3332 and the third control terminal 3333 are turned off, the first switch 333 switches off. In one embodiment, the first switch 333 is a n-channel metal oxide semiconductor (NMOS) field effect transistor (FET). The first control terminal 3331 is a grid of the NMOSFET, the second control terminal 3332 is a drain of the NMOSFET, and the third control terminal 3333 is a source of the NMOSFET.
The second switch 337 includes a fourth control terminal 3371, a fifth control terminal 3372 and a sixth control terminal 3373. The second switch 337 receives the second control signal being output from the second terminal 3392 and switches on or switches off under the control of the second control signal. In detail, the fourth control terminal turns on or turns off the fifth control terminal 3372 and the six control terminal 3373 under the control of the second control signal. When the fifth control terminal 3372 and the sixth control terminal 3373 are turned on, the second switch 337 switches off. When the fifth control terminal 3372 and the sixth control terminal 3373 are turned off, the second switch 337 switches off. In one embodiment, the second switch 337 is an NMOS FET. The fourth control terminal 3371 is a grid of the NMOS FET, the fifth control terminal 3372 is a drain of the NMOS FET, and the sixth control terminal 3373 is a source of the NMOS FET.
The first unidirectional circuit 335 includes an anode 3351 and a cathode 3352. The anode 3351 is electrically coupled to a node between the energy storing circuit 334 and the sixth control terminal 3373 of the second switch 337. The cathode 3352 is electrically coupled to the first DC voltage output terminal “a.” The first unidirectional circuit 335 turns on when the voltage value of the anode 3351 is greater than voltage value of the cathode 3352, and turns off when the voltage value of the anode 3352 is less than voltage value of the cathode 3352. In an embodiment, the first unidirectional circuit 335 is a diode. The anode 3351 is an anode of the diode, and the cathode 3352 is a cathode of the diode.
The second unidirectional circuit 336 includes an anode terminal 3361 and a cathode terminal 3362. The anode 3361 is electrically coupled to a node formed between the third control terminal 3333 of the first switch 333 and the energy storing circuit 334. The cathode 3362 is electronically coupled to the first DC voltage output terminal “a.” The second unidirectional circuit 336 turns on when the voltage value of the anode 3361 is greater than that of the cathode 3362, and turns off when the voltage value of the anode 3362 is less than that of the cathode 3362. In an embodiment, the second unidirectional circuit 336 is a diode. The anode terminal 3361 is an anode of the diode, and the cathode terminal 3362 is a cathode of the diode.
The energy storing circuit 334, such as a inductor, is electronically coupled between the third control terminal 3333 and the sixth control terminal 3373. The energy storing circuit 334 works with the first unidirectional circuit 335 and the second unidirectional circuit 336 in converting the first AC voltage into the second DC voltage
The smoothing circuit 338 is electronically coupled between the first DC voltage output terminal “a” and the second DC voltage output terminal “b.” The smoothing circuit 338 smoothes the first DC voltage. In one embodiment, the smoothing circuit 338 is a smoothing capacitor.
The conversion of the first AC voltage into the first DC voltage is described below. In the positive period of the first AC voltage, the first switch 333 is switched on under the control of the signal generating circuit 339. The second switch 337 is switched on in a first sub-period of the positive period and switched off in a second sub-period of the positive period. When both of the first switch 333 and the second switch 337 are switched on in the first sub-period of the positive period, the energy storing circuit 334 stores energy distributed by the first AC voltage. When the first switch 333 is switched on and the second switch 337 is switched off in the second sub-period of the positive period, the energy storing circuit 334 is discharged to the first DC voltage output terminal “a” via the first unidirectional circuit 335.
In the negative period of the first AC voltage, the second switch 337 is switched on under the control of the signal generating circuit 339. The first switch 333 is switched on in a first sub-period of the negative period, and is switched off in a second sub-period of the negative period. When both of the first switch 333 and the second switch 337 are switched on in the first sub-period of the negative period, the energy storing circuit 334 stores energy distributed by the first AC voltage. When the first switch 333 is switched off and the second switch 337 is switched on in the second sub-period of the negative period, the energy storing circuit 334 is discharged to the first DC voltage output terminal “a” via the second unidirectional circuit 336.
The second rectifier unit 50 includes a third receiving terminal 51, a fourth receiving terminal 52, a rectifier sub-unit 33, a third output terminal 54 and a fourth output terminal 55. The third receiving terminal 51 is electronically coupled to the second AC voltage output terminal 25. The fourth receiving terminal 52 is electronically coupled to the common terminal 29. The rectifier sub-unit 33 of the second rectifier unit 50 receives the second AC voltage via the third receiving terminal 51 and the fourth receiving terminal 52, converts the second AC voltage into the second DC voltage, and outputs the second DC voltage via the third output terminal 54 and the fourth output terminal 55.
The third rectifier unit 70 includes a fifth receiving terminal 71, a sixth receiving terminal 72, a rectifier sub-unit 33, a fifth output terminal 74 and a sixth output terminal 75. The fifth receiving terminal 71 is electronically coupled to third AC voltage output terminal 27. The sixth receiving terminal 72 is electronically coupled to the common terminal 29. The rectifier sub-unit 33 of the third rectifier unit 70 receives the third AC voltage via the fifth receiving terminal 71 and the sixth receiving terminal 72, converts the third AC voltage into the third DC voltage, and outputs the third DC voltage via the fifth output terminal 74 and the sixth output terminal 75.
In this embodiment, the common terminal 29, the second output terminal 35 of the first rectifier 30, the fourth output terminal 55 of the second rectifier 50, and the sixth output terminal 75 of the third rectifier 70 may be electronically connected to each other by using a common grounded wire. This reduces the number of conductive wires being grounded. The first DC voltage, the second DC voltage and the third DC voltage converted by the rectifier circuit 200 can independently drive their separate loads, and a transformer is not needed in the rectifier circuit 200.
Although certain embodiments of the present disclosure have been specifically described, the present disclosure is not to be construed as being limited thereto. Various changes or modifications may be made to the present disclosure without departing from the scope and spirit of the present disclosure.
Number | Date | Country | Kind |
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101126546 | Jul 2012 | TW | national |