Recursive phase estimation for a phase-shift-keying receiver

Information

  • Patent Application
  • 20080008268
  • Publication Number
    20080008268
  • Date Filed
    July 07, 2006
    18 years ago
  • Date Published
    January 10, 2008
    16 years ago
Abstract
In one embodiment, a receiver of the invention has a detector coupled to a digital processor. The detector is adapted to mix the received PSK signal with a local oscillator (LO) signal having a time-varying phase offset with respect to the carrier frequency of the PSK signal to produce a digital measure of the PSK signal. The digital processor is adapted to: (i) estimate a frequency offset between the carrier frequency of the PSK signal and the LO signal; (ii) remove from an angular component of the digital measure a component corresponding to the frequency offset to generate a frequency-offset-adjusted signal; (iii) for each time slot of the PSK signal, estimate the phase of a respective PSK constellation symbol based on an angular component of the frequency-offset-adjusted signal and an angular component of a recursive function; (iv) estimate a phase differential for a PSK-symbol transition based on two consecutive phase estimates; (v) map each estimated phase differential onto a phase increment corresponding to a symbol transition in the PSK constellation; and (vi) recover a data sequence encoded in the PSK signal based on the mapping results.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

Other aspects, features, and benefits of the present invention will become more fully apparent from the following detailed description, the appended claims, and the accompanying drawings in which:



FIG. 1 graphically shows a representative quadrature-phase-shift-keying (QPSK) constellation that can be used in various embodiments of the invention;



FIG. 2 shows a block diagram of a communication system according to one embodiment of the invention;



FIG. 3 shows a block diagram of a digital processor (DP) that can be used in the communication system of FIG. 2 according to one embodiment of the invention;



FIG. 4 shows a block diagram of a frequency offset estimator (FOE) that can be used in the DP of FIG. 3 according to one embodiment of the invention;



FIG. 5 shows a flowchart of a signal processing method that can be used in the DP of FIG. 3 to decode PSK signals according to one embodiment of the invention;



FIG. 6 shows a flowchart of a signal processing method that can be used in the DP of FIG. 3 to determine an optimal value of the recursive memory factor for a given set of operating conditions according to one embodiment of the invention;



FIG. 7 graphically illustrates the performance of the system of FIG. 2 using two different phase-estimation algorithms; and



FIG. 8 graphically illustrates the performance of the system of FIG. 2 using the methods of FIGS. 5 and 6.





DETAILED DESCRIPTION


FIG. 1 graphically shows a representative quadrature-phase-shift-keying (QPSK) constellation that can be used in various embodiments of the invention. Symbol set A4 of the QPSK constellation has four symbols labeled (0) through (3) that are described by Eq. (1):






A
4=±1,±j   (1)


where symbols (0) and (2) lie on the real (Re) axis of the complex plane, and symbols (1) and (3) lie on the imaginary (Im) axis of the complex plane. Using the constellation of FIG. 1, data are encoded in a differential manner by assigning a particular two-bit value to each transition between the constellation symbols. The arrows in FIG. 1 illustratively show four possible transitions that involve symbol (0) as a start state, with the assigned binary values indicated next to the respective arrows. For example, the (0)→(1) transition is assigned a binary value of 00. Similarly, the (0)→(2) and (0)→(3) transitions are assigned binary values of 10 and 11, respectively. Finally, the (0)→(0) transition is assigned a binary value of 01. A transition diagram for transitions that originate at any one of symbols (1), (2), and (3) can be obtained by simply rotating the shown transition diagram.



FIG. 2 shows a block diagram of a communication system 200 according to one embodiment of the invention. System 200 has a transmitter 210 and a receiver 230 coupled via an optical communication link 220. Transmitter 210 has an optical source (e.g., a laser) 212 coupled to an optical modulator (OM) 214, which is controlled by a driver 216. Driver 216 receives a binary input sequence X(n), transforms it into a sequence of constellation symbols, e.g., using the constellation shown in FIG. 1, and generates a control signal that is applied to OM 214 to produce an optical signal 218 that carries that symbol sequence.


After propagating through link 220, signal 218 is received at receiver 230 as signal 228, which is then split into first and second copies in a splitter 236a. A local oscillator (LO) signal 234, which is produced at receiver 230 by an optical source (e.g., a laser) 232, is similarly split into first and second copies in a splitter 236b. The first copy of signal 228 and the first copy of signal 234 are then applied to an optical mixer 240a. The second copy of signal 228 and a phase-shifted copy of signal 234 are similarly applied to an optical mixer 240b, with the phase-shifted copy of signal 234 obtained from the second copy of signal 234 (produced by splitter 234b) by passing that copy through an optical phase shifter (OPS) 238. In a typical configuration, OPS 238 is configured to introduce a π/2 (i.e., 90-degree) phase shift. It is desirable for the phase shift introduced by OPS 238 to fall between 45 and 135 degrees, and it is preferred that said phase shift is between 75 and 105 degrees.


Each of optical mixers 240a-b is designed to combine its input signals to produce two interference signals, each having an intensity that is: (i) proportional to the intensities of the input signals and (ii) related to an instant phase offset between those input signals. More specifically, the interference signals produced by optical mixer 240 are such that the intensity difference between these interference signals is proportional to cos(Δφ), where Ad is the instant phase offset. A pair of balanced photodetectors 242 coupled to a respective one of differential amplifiers 244a-b continuously measures the intensity difference for the interference signals produced by the respective one of optical mixers 240a-b and applies the measurement results to a respective one of synchronized analog-to-digital converters (ADCs) 246a-b. Using these measurement results, each of ADCs 246a-b produces a respective one of digital signals 248a-b, both of which are applied to a digital processor (DP) 250.


Note that the above-described signal processing implemented in receiver 230 substantially causes digital signal 248a to be proportional to I228 cos(Δγ), where I228 is the instant intensity of signal 228 and Δγ is the instant phase offset between signals 228 and 234. Note also that, if OPS 238 introduces a π/2 phase shift, then the signal processing implemented in receiver 230 causes digital signal 248b to be substantially proportional to I228 sin(Δγ). Thus, the signal processing implemented in receiver 230 substantially provides, in the form of digital signals 248a-b, instant measures of the real and imaginary components, respectively, of signal 228 in the complex plane defined with respect to LO signal 234.


The absence of a phase-lock between the carrier frequency (wavelength) of signal 228 and LO signal 234 generally manifests itself by different instances of the same symbol carried by signal 228 falling onto different portions of the complex plane defined with respect to LO signal 234. More specifically, if a sufficiently large number of instances of the same symbol are received and mapped onto the complex plane, those instances form a substantially continuous circular band centered at the center of coordinates and having a radius corresponding to the distance between the center of coordinates and the symbol position in the constellation. For example, repetitive transmission of symbol (0) of the QPSK constellation (see FIG. 1) will produce a circular band having a radius of one. Similarly, repetitive transmission of symbol (2) of the QPSK constellation will produce a circular band having a radius of one, which circular band will overlap with the circular band corresponding to symbol (0). Repetitive transmission of symbols (1) and (3) of the QPSK constellation will produce two additional overlapping circular bands having a radius of one. One consequence of this band overlapping is that the direct mapping, using digital signals 248a-b, of the received symbols onto the complex plane defined with respect to (not phase-locked) LO signal 234 does not enable appropriate symbol recognition and/or data extraction. As described in more detail below, DP 250 processes digital signals 248a-b such that, even in the absence of a phase-lock between signals 228 and 234, symbol transitions in communication signal 228 are ascertained to enable substantial reconstruction of the original binary sequence X(n). In certain embodiments of receiver 230, DP 250 is optionally configured to generate a control signal 252 and apply that control signal to optical source 232 for the purpose of loosely controlling the frequency (ωLO) of that optical source. In one embodiment, based on control signal 252, optical source 232 is configured to adjust its frequency, e.g., so that |ωLO−ωS|≦Δω0, where ΔS is the carrier frequency of communication signal 228, and Δω0 is a selected maximum frequency mismatch value. Keeping the frequency mismatch between signals 228 and 234 within certain bounds might be advantageous because, in the presence of a relatively large frequency mismatch, the magnitudes of the signals generated by photodetectors 242 become relatively low. As such, control signal 252 can help to maintain optimal performance of photodetectors 242. Note, however, that the feedback loop that provides control signal 252 is not designed to phase-lock optical source 232 to the carrier frequency of communication signal 228 (as would be the case in a PLL).



FIG. 3 shows a block diagram of a digital processor (DP) 350 that can be used as DP 250 (FIG. 2) according to one embodiment of the invention. DP 350 is configured to receive a complex digital input signal 348, which is a bus signal having signals 248a-b (see FIG. 2). In one implementation, signal 348 carries the real and imaginary parts of communication signal 228 and can be expressed as follows:






y
348(t)=EB(t)ej(ΦW+Δωt)+N(t)   (2)


where: y348(t) is the complex value of signal 348 at time t;









E
B



(
t
)


=



n





A
B



(
n
)




p


(

t
-
nT

)





,




where AB(n) is the respective constellation symbol (e.g., from constellation A4 of FIG. 1) in the n-th time slot, p(t) is the waveform envelope associated with each constellation symbol, and T is the symbol period (time-slot duration); ΦWSLO, where ΦS is the linewidth-related phase noise in the communication signal (e.g., signal 228) and ΦLO is the linewidth-related phase noise in the LO signal (e.g., signal 234); Δω=ωLO−ωS, and N(t) is the additive complex Gaussian noise composed of optical, thermal, and shot noise of various system components.


Signal 348 is applied to a frequency offset adjustor (FOA) 310 and a frequency offset estimator (FOE) 320. FOE 320 is configured to compute and track the value of Δω, e.g., as described in more detail below, and provide the computed value to FOA 310. Based on the value of Δω received from FOE 320, FOA 310 adjusts the phase of signal 348 by multiplying it by exp(−jΔωt) and generates a frequency-offset-adjusted signal 312, which, using Eq. (2), can be expressed as follows:





y312(t)=EB(t)eφW+N′(t)   (3)


where: y312(t) is the complex value of signal 312 at time t. Taking into account that, for QPSK, EB(n)=r0 exp jθB(n), where θB=kπ/2, k=0, 1, 2, 3; r0 is the signal magnitude; and n is the index corresponding to the time slot number, and changing the notation from time t to index n, Eq. (3) can be transformed into:






y(n)≡y312(nT)=r0ij[θB(n)+ΦW(n)]+N(n)   (4)


To correctly decode the data encoded in signal 312, the subsequent processing of that signal in DP 350 aims at extracting phase increment Δθ(n), which is expressed as follows:





Δθ(n)=θB(n)−θB(n−1)   (5)


A phase estimator (PE) 330, which receives signal 312, is configured to estimate, for each symbol period, the value of θB(n) as described in more detail below. The estimated value of θB(n) is then applied to a slicer 340, which is configured to map each received estimate onto one of the phases of the symbols on the constellation map (see FIG. 1). Slicer 340 can use conventional mapping techniques to accomplish this mapping.


The stream of mapping results generated by slicer 340 is applied to a decoder 360, which is configured to recover from that stream the original bit sequence X(n) (see also FIG. 2). More specifically, decoder 360 uses the received mapping results to determine Δθ(n) in accordance with Eq. (5). Decoder 360 then converts the determined value of Δθ(n) into a corresponding binary value assigned to a set of symbol transitions of the QPSK constellation shown in FIG. 1 having the requisite phase increment value. Note that the differential nature of the encoding algorithm makes it unnecessary to determine the exact QPSK symbols carried by the communication signal because the encoded data can unequivocally be recovered by correctly ascertaining only the respective phase increments for each QPSK-symbol pair, and not the exact QPSK-symbol pair that produced those increments.


Turning now to the processing implemented in PE 330, we note first that the two sources of noise in signal 312, i.e., linewidth-related phase noise ΦW(n) and additive noise N(n), affect that signal in different ways (see Eq. (4)). Since the relative contributions of the linewidth-related phase noise and the additive noise into the total phase noise may vary, communication system 200 may need to use two or more different phase-estimation algorithms to adequately handle that variability. For example, U.S. patent application Ser. No. 11/204,607, filed on Aug. 15, 2005, which is incorporated herein by reference in its entirety, discloses a phase-estimation algorithm that works relatively well for a system whose phase noise is dominated by the linewidth-related phase noise. However, for a system whose phase noise is dominated by the additive noise, that algorithm might be inferior to some other algorithms in terms of the obtained bit error rate (BER). To address this problem, PE 330 utilizes an algorithm that can be adjusted to provide good system performance for different and/or variable phase-noise conditions corresponding to different relative contributions into the total phase noise of the linewidth-related phase noise and the additive noise.


For each time slot, PE 330 is configured to calculate function s(n) recursively defined as follows:






s(n)=y4(n)+αs(n−1)   (6)


where y(n) is defined in Eq. (4) and α is a recursive memory factor, which can have any selected value between 0 and 1. After calculating s(n), PE 330 calculates the angular component ψ(n) of s(n), which can be expressed as follows:





ψ(n)≡∠s(n)=4ΦW(n)−2l(n)π+ξ(n)+ξ′(n)   (7)


where l(n) is an integer, and ξ(n) and ξ(n) are expressed by Eqs. (8a-b):










ξ


(
n
)


=


tan

-
1




{


4







β
N



(
n
)




sin


[



δ
N



(
n
)


-


Φ
W



(
n
)


-


θ
B



(
n
)



]




1
+

4







β
N



(
n
)




cos


[



δ
N



(
n
)


-


Φ
W



(
n
)


-


θ
B



(
n
)



]





}






(

8

a

)








ξ




(
n
)


=


tan

-
1




{



κ


(
n
)




sin


[


ψ


(

n
-
1

)


-

4







Φ
W



(
n
)



-

ξ


(
n
)



]




1
+


κ


(
n
)




cos


[


ψ


(

n
-
1

)


-

4







Φ
W



(
n
)



-

ξ


(
n
)



]





}






(

8

b

)







with βN(n) and δN(n) being the amplitude and phase, respectively, of the additive noise defined by Eq. (8a-i):






N(n)=βN(n)eN(n)   (8a-i)


and κ(n) defined by Eq. (8b-i):





κ(n)=α|s(n−1)|/r04   (8b-i)


After calculating ψ(n), PE 330 estimates the value of θB(n) as follows:





{circumflex over (θ)}(R)(n)=∠y(n)−ψ(n)/4   (9)


where {circumflex over (θ)}(R)(n) is the estimated value of θB(n), and ∠y(n) denotes the angular component of y(n). Finally, PE 330 applies the value of {circumflex over (θ)}(R)(n) as output signal 332 to slicer 340.


Given the above described processing carried out in PE 330, the error probability for the n-th symbol transition (Pe(R)(n)), i.e., the probability of decoding signal 312 to incorrectly determine the corresponding symbol transition in signal 218 (see FIG. 2), equals the probability for value ρ(n) to be greater than π/4 as expressed by Eq. (10):





Pe(R)(n)=Pr{ρ(n)>π/4}  (10)


where Pr{argument} denotes a function returning the probability value for the “argument” to be true, and ρ(n)≡|[{circumflex over (θ)}(R)(n)−θB(n)]−[{circumflex over (θ)}(R)(n−1)−θB(n−1)]|. Using Eqs. (4) and (6-9), Eq. (10) can be transformed into Eq. (11):






P
e
(R)(n)=Pr{|round{2φ′(n)/π+fa(n)|}−fa(n)|>1/2}  (11)


where round{argument} denotes a function that rounds a real value of the “argument” to the nearest integer value, and φ′(n) and fa(n) are expressed by Eqs. (12a-b):





φ′(n)=φ(n)+|ξ(n−1)|/4   (12a)






f
a(n)=(ξ′(n)−ξ′(n−1))/(2π)   (12b)


with φ(n) defined by Eq. (12a-i):






r
0
e


B

(n)=1+β0(n)ejφ(n)   (12a-i)


Inspection of Eq. (11) and its constituents reveals that error probability Pe(R)(n) is a function of α and the above-specified noise sources, which are ultimately represented in Eq. (11) by ΦW(n), βN(n), and δN(n). Assuming that, for a given set of operating conditions, the latter three values are substantially fixed, it follows then that the value of Pe(R)(n) can be minimized by appropriately adjusting the value of α. For example, when the phase noise is substantially dominated by the linewidth-related phase noise, the minimum of Pe(R)(n) corresponds to a relatively small value of α, e.g., |α|<0.2. In one extreme case, when α=0, the above-described recursive phase estimation approach is similar to the single-sample phase estimation approach described, e.g., in “Data Communications Principles,” by Gitlin, R. D., Hayes, J. F., and Weinstein, S. B., Plenum Press, 1992, New York., and “Simulation of Communication Systems,” by Jeruchim, M. C., Balaban, P., and Shanmugan, K. S., Plenum Press, 1992, New York. Alternatively, when the phase noise is substantially dominated by the additive-noise related phase noise, the minimum of Pe(R)(n) corresponds to a relatively large value of α, e.g., |α|>0.8. Thus, system 200 having DP 350 is capable of optimizing its performance (e.g., minimizing the BER) under different operating conditions by selecting an appropriate value of α. As such, unlike the prior-art systems employing two or more different phase-estimation algorithms, with each algorithm adapted for providing good performance only over a specific relatively narrow range of operating conditions, system 200 having DP 350 can advantageously maintain optimal performance using a single phase-estimation algorithm.



FIG. 4 shows a block diagram of a frequency offset estimator (FOE) 420 that can be used as FOE 320 according to one embodiment of the invention. FOE 420 has a phase extractor 422 that is configured to compute, for each symbol period, the phase of signal 348, e.g., by (i) presenting the received value of y348 in the form given by Eq. (13):





y348(t) =r(t) exp(jγ(t))   (13)


and (ii) extracting the value of γ(t). The extracted value of γ(t) is then applied to a delay element (Z−1) 424 and an adder 426. Delay element 424 delays the value of γ(t) by one symbol period T, multiplies the delayed value by −1, and applies the result to adder 426. Adder 426 then sums the current value γ(t) and the negative delayed value γ(t−T), thereby computing a phase differential, dγ(n)=γ(n)−γ(n−1), for each symbol transition in signal 348.


The output produced by adder 426 is applied to a signal analyzer 428, which is configured to compute and track the value of Δω. The speed at which signal analyzer 428 computes and updates the value of Δω is determined by the frequency offset drift rate, dΔω/dt. More specifically, signal analyzer 428 is configured to accumulate a statistically sufficient number (determined by the frequency offset drift rate) of phase differentials dω(n) and determine the value of Δω under the assumption that, for a sufficiently long pseudo-random bit sequence, the center of the distribution curve for dΔ(n) is located at ΔωT. As such, signal analyzer 428 determines the location of the distribution curve accumulated over an appropriately long time interval and then computes the value of Δω by dividing the coordinate of the curve's center of mass by T.


When DP 350 is initially brought online, FOE 420 is normally able to produce a first estimate of Δω after a certain induction period, during which the FOE accumulates the phase-differential statistics. After that initial induction period, FOE 420 can be configured to update the value of Δω as often as each symbol period using, e.g., a known sliding-window averaging method, in which a fixed number of most-recent phase differentials is used to construct the distribution curve.


In an alternative embodiment, DP 350 can employ an FOE configured to use any other suitable method for the computation of Δω. For example, several suitable methods that can be used to implement FOE 320 can be found in chapter 8 of “Digital Communication Receivers—Synchronization, Channel Estimation, and Signal Processing,” by H. Meyr, M. Moeneclaey, and S. A. Fechtel, New York: John Wiley & Sons, 1998. Another suitable method, known by the acronym MUSIC (multiple signal classification), is described, e.g., in “Adaptive Filter Theory,” by S. Haykin, 2nd edition, Englewood Cliffs, N.J.: Prentice-Hall, 1991.



FIG. 5 shows a flowchart of a signal processing method 500 that can be used in DP 350 to decode PSK signals according to one embodiment of the invention. Method 500 is initialized in step 502, where the value of s(0) is set to zero. The next step of method 500, i.e., step 504, signifies advancement of time to the next time slot. In step 506, the corresponding value of signal y348(t) is processed, e.g., to remove the frequency offset and obtain the value of y(n), e.g., as described above in the context of Eqs. (2-4). The obtained value of y(n) is a complex value, the angular component of which is calculated in step 508. In step 510, the value of s(n) is calculated, e.g., using Eq. (6). Similar to y(n), s(n) is a complex value, the angular component of which is calculated in step 512. In step 514, the value of PSK phase θB(n) is estimated, e.g., using Eq. (9). In step 516, phase increment Δθ(n) is estimated in accordance with Eq. (5). In step 518, the estimated phase increment is mapped onto the corresponding PSK constellation, e.g., the constellation of FIG. 1, to determine the corresponding symbol transition. Finally, in step 520, a binary value corresponding to the determined symbol transition is generated for the respective segment of the decoded data sequence. The processing of steps 506-520 is then repeated for the next time slot, as indicated by the arrow returning the processing of method 500 from step 520 to step 504.



FIG. 6 shows a flowchart of a signal processing method 600 that can be used in DP 350 to determine an optimal value of the recursive memory factor α for a given set of operating conditions according to one embodiment of the invention. In step 602, a value of α is chosen for evaluating the performance of DP 350 at that value. In step 604, method 500 of FIG. 5 is run using the value of α chosen in step 602 for processing the signals resulting from the transmission of a training sequence X(n) having N0 symbols (see also FIGS. 2 and 3). In step 606, the decoded sequence produced in step 604 is compared with the training sequence to determine the BER corresponding to the chosen value of α. If it is determined in step 608 that further performance evaluation is desired for a different value of α, then the processing of method 600 is returned to step 602, where another value of α is selected and set for use in the following step 604. This different value of α can be selected, e.g., based on a sequence of values implementing a scan of a targeted range of values for α. Alternatively, if it is determined in step 608 that further performance evaluation is not desired, then the processing of method 600 is directed to step 610, where the previously obtained BER values are sorted to find a value of α corresponding to the lowest BER. The found value of α is deemed to be optimal for the given set of operating conditions. DP 350 is then configured to use that value for decoding further communication signals, which carry unknown (as opposed to known training) data sequences. In one configuration, DP 350 runs method 600 on a periodic basis to select a value of α that is optimal for the current set of operating conditions.


Although signal processing in system 200 is described above with reference to QPSK modulation, one skilled in the art will appreciate that embodiments of the invention are not so limited. More specifically, the above-described phase estimation algorithm can be modified, for example, as follows to apply to general M-th order PSK (M-PSK) modulation.


An M-PSK constellation has M symbols Ai described by Eq. (14):






A
i=exp(2πji/M)   (14)


where i=0, 1, . . . M−1. The value of M is usually chosen to be 2K, where K is an integer. Description of several M-PSK constellations that can be used in system 200 can be found, e.g., in the above-cited U.S. patent application Ser. No. 11/204,607. Note that the QPSK constellation of FIG. 1 corresponds to M=4 (or K=2). For general M-PSK, instead of function s(n) recursively defined by Eq. (6), PE 330 is configured to calculate function s(n) recursively defined by Eq. (15):






s(n)=yM(n)+αs(n−1)   (15)


With this substitution, PE 330 can then be configured to run methods 500 and 600 substantially as described above to process M-PSK communication signals.


FIG. 7 graphically illustrates the performance of system 200 configured to transmit QPSK signals at a data transmission rate of 10 GBaud while using two different phase-estimation algorithms. More specifically, the first algorithm (denoted in the figure legend as DIFF) is similar to that disclosed in the above-cited U.S. patent application Ser. No. 11/204,607, and the second algorithm (denoted in the figure legend as FFPE) is that corresponding to methods 500 and 600 (see FIGS. 5 and 6). Under the operating conditions corresponding to FIG. 7, the additive noise is dominated by shot noise (which is a particular component of the additive noise). The horizontal axis in FIG. 7 represents the number of quantization bits at BER=10−3, and the vertical axis represents the shot-noise limited sensitivity at that BER. The performance of system 200 employing the two above-specified algorithms is compared at four different laser-linewidth values (0.1, 1, 10, and 20 MHz), which are indicated in the figure legend. The a values used in the second algorithm are given in the figure legend in parentheses, with each of these a values being an optimal value determined using method 600. As evident from the data of FIG. 7, the second algorithm consistently outperforms the first algorithm by providing better sensitivity for any given number of quantization bits within the range covered by FIG. 7. (Note that, in FIG. 7, lower sensitivity values are advantageous and, as such, represent better sensitivity.)



FIG. 8 graphically illustrates the performance of system 200 configured to transmit QPSK signals at a data transmission rate of 10 GBaud while using methods 500 and 600. The horizontal axis in FIG. 8 represents α, and the vertical axis represents the signal-to-noise ratio (SNR) at BER=10−3. Of the two values given in the figure legend for each curve, the first value represents the laser linewidth, and the second value represents the frequency offset Δω=ωLO−ωS. First, the data of FIG. 8 clearly show that method 500 appropriately performs frequency-offset correction because the SNR values substantially do not depend on the frequency offset, with all other parameters being fixed. In addition, the data of FIG. 8 show that an optimal value of a can generally be found for each given linewidth value. For example, for a linewidth value of 20 MHz, an optimal value of a lies in the range between about 0.3 and 0.5. Similarly, for a linewidth value of 1 MHz, an optimal value of α is about 0.9.


While this invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Although certain embodiments of the invention have been described in reference to optical PSK signals, they can similarly be used for electrical and/or wireless radio-frequency PSK signals. Various modifications of the described embodiments, as well as other embodiments of the invention, which are apparent to persons skilled in the art to which the invention pertains are deemed to lie within the principle and scope of the invention as expressed in the following claims.


Reference herein to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments necessarily mutually exclusive of other embodiments. The same applies to the term “implementation.”


Embodiments of the present invention may be implemented as circuit-based processes, including possible implementation on a single integrated circuit. As would be apparent to one skilled in the art, various functions of circuit elements may also be implemented as processing steps in a software program. Such software may be employed in, for example, a programmable digital signal processor, micro-controller, or general-purpose computer.


Unless explicitly stated otherwise, each numerical value and range should be interpreted as being approximate as if the word “about” or “approximately” preceded the value of the value or range.


It will be further understood that various changes in the details, materials, and arrangements of the parts which have been described and illustrated in order to explain the nature of this invention may be made by those skilled in the art without departing from the scope of the invention as expressed in the following claims.


It should be understood that the steps of the exemplary methods set forth herein are not necessarily required to be performed in the order described, and the order of the steps of such methods should be understood to be merely exemplary. Likewise, additional steps may be included in such methods, and certain steps may be omitted or combined, in methods consistent with various embodiments of the present invention.

Claims
  • 1. A receiver for a phase-shift-keying (PSK) signal, comprising: a detector adapted to mix said PSK signal with a local oscillator (LO) signal to produce a digital measure of the PSK signal; anda digital processor being coupled to receive the digital measure from the detector and being adapted to process the digital measure to recover data encoded in the PSK signal by measuring time-varying phase offset between a carrier frequency of the PSK signal and the LO signal, wherein:for each time slot of the PSK signal, the digital processor is adapted to estimate the phase of a respective PSK constellation symbol based on (i) an angular component of the digital measure and (ii) an angular component of a recursive function, said recursive function having a first component calculated based on the digital measure for the current time slot and a second component calculated based on the digital measure for a preceding time slot.
  • 2. The invention of claim 1, wherein the digital processor is adapted to recover data encoded using transitions between symbols of a PSK constellation.
  • 3. The invention of claim 1, wherein: the digital processor is adapted to estimate a frequency offset corresponding to the time-varying phase offset and substantially remove from the angular component of the digital measure a component corresponding to the frequency offset to generate a frequency-offset-adjusted signal.
  • 4. The invention of claim 3, wherein: for each time slot of the PSK signal, the digital processor is adapted to estimate the phase of the respective PSK constellation symbol based on an angular component of the frequency-offset-adjusted signal, wherein the first component is calculated based on the frequency-offset-adjusted signal for the current time slot and the second component is calculated based on the frequency-offset-adjusted signal for the preceding time slot.
  • 5. The invention of claim 4, wherein: the second component is weighted by a recursive memory factor;the digital processor is further adapted to select a value of the recursive memory factor corresponding to an optimal bit error rate (BER).
  • 6. The invention of claim 4, wherein the recursive function, s(n), is calculated as: s(n)=yM(n)+αs(n−1)
  • 7. The invention of claim 1, wherein the digital processor comprises: a frequency offset adjustor (FOA) adapted to substantially remove from the angular component of the digital measure a component corresponding to a frequency offset between the carrier frequency of the PSK signal and the LO signal to generate a frequency-offset-adjusted signal;a phase estimator operationally coupled to the FOE and adapted to estimate the phase of the respective PSK constellation symbol based on (i) an angular component of the frequency-offset-adjusted signal and (ii) the angular component of the recursive function, wherein the first component is calculated based on the frequency-offset-adjusted signal for the current time slot and the second component is calculated based on the frequency-offset-adjusted signal for the time slot immediately preceding the current time slot;a differentiator circuit operationally coupled to the phase estimator and adapted to estimate a phase differential for a PSK-symbol transition based on two different phase estimates generated by the phase estimator; anda decoding circuit operationally coupled to the differentiator circuit and adapted to (i) map each estimated phase differential onto a phase increment corresponding to a symbol transition in the PSK constellation and (ii) recover a bit sequence encoded in the PSK signal based on the mapping results.
  • 8. The invention of claim 7, wherein the digital processor further comprises: a frequency offset estimator (FOE) operationally coupled to the FOA and adapted to estimate the frequency offset based on phase statistics of the digital measure.
  • 9. The invention of claim 1, wherein the detector comprises: a first optical mixer adapted to mix a first copy of the PSK signal with a first copy of the LO signal to produce at least a first interference signal;a second optical mixer adapted to mix a second copy of the PSK signal with a second copy of the LO signal to produce at least a second interference signal, wherein the detector is adapted to produce the first and second copies of the LO signal such that said first and second copies are phase-shifted with respect to each other;a first signal detector coupled to the first mixer and adapted to measure an intensity of the first interference signal;a second signal detector coupled to the second mixer and adapted to measure an intensity of the second interference signal;a first analog-to-digital converter (ADC) coupled to at least the first signal detector and adapted to convert the measurement results produced by at least said first signal detector into a first component of the digital measure; anda second ADC coupled to at least the second signal detector and adapted to convert the measurement results produced by at least said second signal detector into the second component of the digital measure.
  • 10. The invention of claim 1, wherein the PSK signal and the LO signal are optical signals.
  • 11. A method of processing a phase-shift-keying (PSK) signal, comprising: (A) mixing said PSK signal with a local oscillator (LO) signal to produce a digital measure of the PSK signal; and(B) processing the digital measure to measure time-varying phase offset between a carrier frequency of the PSK signal and the LO signal and recover data encoded in the PSK signal, wherein said processing comprises: for each time slot of the PSK signal, estimating the phase of a respective PSK constellation symbol based on (i) an angular component of the digital measure and (ii) an angular component of a recursive function, said recursive function having a first component calculated based on the digital measure for the current time slot and a second component calculated based on the digital measure for a preceding time slot.
  • 12. The invention of claim 11, wherein the step of processing comprises recovering data encoded using transitions between symbols of a PSK constellation.
  • 13. The invention of claim 11, wherein the step of processing comprises: estimating a frequency offset corresponding to the time-varying phase offset; andsubstantially removing from the angular component of the digital measure a component corresponding to the frequency offset to generate a frequency-offset-adjusted signal.
  • 14. The invention of claim 13, wherein the step of processing comprises: for each time slot of the PSK signal, estimating the phase of the respective PSK constellation symbol based on an angular component of the frequency-offset-adjusted signal, wherein the first component is calculated based on the frequency-offset-adjusted signal for the current time slot and the second component is calculated based on the frequency-offset-adjusted signal for the immediately preceding time slot.
  • 15. The invention of claim 14, wherein the step of processing comprises: weighting the second component by a recursive memory factor.
  • 16. The invention of claim 15, wherein the step of processing further comprises: recovering data from the PSK signal using a first selected value of the recursive memory factor, wherein said recovered data correspond to a training data sequence;determining a BER for the recovered data;repeating the steps of recovering and determining for one or more other selected values of the recursive memory factor; andsorting the determined BERs corresponding to different selected values of the recursive memory factor to determine the value corresponding to the optimal BER.
  • 17. The invention of claim 14, wherein the step of processing comprises calculating the recursive function, s(n), as: s(n)=yM(n)+αs(n−1)
  • 18. The invention of claim 11, wherein the step of processing comprises: removing from the angular component of the digital measure a component corresponding to a frequency offset between the carrier frequency of the PSK signal and the LO signal to generate a frequency-offset-adjusted signal;estimating the phase of the respective PSK constellation symbol based on (i) an angular component of the frequency-offset-adjusted signal and (ii) the angular component of the recursive function, wherein the first component is calculated based on the frequency-offset-adjusted signal for a current time slot and the second component is calculated based on the frequency-offset-adjusted signal for the time slot immediately preceding the current time slot;estimating a phase differential for a PSK-symbol transition based on two consecutive phase estimates;mapping each estimated phase differential onto one of phase increments corresponding to symbol transitions in the PSK constellation; andrecovering a bit sequence encoded in the PSK signal based on the mapping results.
  • 19. The invention of claim 11, wherein the PSK signal and the LO signal are optical signals.