Reduced offset voltage comparator system

Information

  • Patent Application
  • 20070152717
  • Publication Number
    20070152717
  • Date Filed
    November 24, 2006
    18 years ago
  • Date Published
    July 05, 2007
    17 years ago
Abstract
A method for comparing two signal with increased accuracy by using a reduced offset voltage comparator that has a offset zero mode and amplify mode. Additional comparators are used to indicate when the two signal are close in value. When the signal are close the reduced offset voltage comparator operation is changed from offset zero mode to amplify mode and the two signal are compared.
Description

BRIEF DESCRIPTION OF DRAWINGS


FIG. 1 is a schematic representation of a Reduced Offset Voltage Comparator System 100 in accordance with one embodiment of the present invention.



FIG. 2 is a schematic representation of Amplifier System 50A in accordance with one embodiment of the present invention.



FIG. 3 is a diagram illustrating various Reduced Offset Voltage Comparator System 100 circuit waveforms.


Claims
  • 1. A comparator system for sensing an analog input signal and for producing a digital output signal comprising: means for providing a reference level,amplifier means for amplifying the difference in signal level between said input signal and said reference level,comparator means for producing a digital output signal dependant on said amplifier means output level,further comparator means for indicating said input signal level being not close to the said reference level, andcircuit means responsive to said further comparator means for suppressing the offset voltage of the said amplifier means, whereby the said comparator system has reduced offset voltage.
  • 2. A comparator system as defined in claim 1, wherein said further comparator means includes two comparator means each having two inputs and one output, and each of such comparator means has one of its inputs connected directly to said analog input signal, and has its other input connected to supplemental reference level means, whereby the respective output signals of said two comparator means are not produced until after said input signal has crossed over said reference level by predetermined levels in positive and negative going directions, respectively.
  • 3. A comparator system as defined in claim 2, wherein said amplifier means has an offset zero mode and amplify mode, and said amplifier means is in amplify mode until said further comparator means output indicates input signal has crossed over said reference level by predetermined levels in positive and negative going directions, respectively causing said amplifier means to be in offset zero mode.
Provisional Applications (1)
Number Date Country
60755115 Dec 2005 US