Claims
- 1. A method of reducing dark current during the operation of a two phase buried channel CCD having a repeating series of two gate pixels with the first pixel gate being connected to a phase line O.sub.1 and the second pixel gate to a phase line O.sub.2, the method comprising the step of:
- simultaneously applying appropriate voltages to both phase lines O.sub.1 and O.sub.2 so as to attract holes to the buried channel.
- 2. A method of reducing dark current during the operation of a two phase, buried channel CCD having a repeating series of two gate pixels with the first pixel gate being connected to a phase line O.sub.1 and the second pixel gate being connected to a phase line O.sub.2, each CCD buried channel gate having transfer and storage regions sequentially formed under each gate, the method comprising the step of:
- simultaneously applying voltages to both phase lines O.sub.1 and O.sub.2 so as to attract holes to the buried channel with the difference in channel potentials of the transfer regions so chosen that a given pixel signal is not mixed with signals contained in adjacent pixels.
- 3. A method of reducing dark current during the operation of a true two phase, buried channel CCD having a p-type substrate and an n-buried channel, with such CCD having a repeating series of two gate pixels with the first pixel gate being connected to a phase line O.sub.1, and the second pixel gate to a phase line O.sub.2, each CCD buried channel gate having transfer and storage regions sequentially formed under each gate, the method comprising the step of:
- simultaneously applying voltages to both phase lines O.sub.1 and O.sub.2 so as to attract holes to the buried channel with the difference in channel potentials of the transfer regions so chosen that a given pixel signal is not mixed with signals contained in adjacent pixels.
- 4. The method of claim 3 wherein charge is transferred from one pixel to another.
- 5. A method of reducing dark current during the operation of a true two phase, buried channel CCD having a p-type substrate and an n-buried channel, with such CCD having a repeating series of two gate pixels with the first pixel gate being connected to a phase line O.sub.1, and the second pixel gate to a phase line O.sub.2, each CCD buried channel gate having transfer and storage doping regions sequentially formed under each gate, and wherein the transfer regions are more lightly doped (n--) than the storage regions (n-) so that a given pixel signal is not mixed with signals contained in adjacent pixels, comprising simultaneously applying voltages to both phase lines O.sub.1 and O.sub.2 so as to attract holes to the buried channel such that the difference in the channel potentials of the two transfer regions is so chosen that a given pixel signal is not mixed with signal contained in adjacent pixels.
- 6. The method of claim 5 wherein charge is transferred from one pixel to another.
Parent Case Info
This is a continuation of application Ser. No. 402,735, filed Sept. 5, 1989, now abandoned.
US Referenced Citations (6)
Non-Patent Literature Citations (1)
Entry |
Sze, Physics of Semiconductor Devices, 1st Edition, John Wiley, N.Y. 1969, pp. 38-39, 426-429. |
Continuations (1)
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Number |
Date |
Country |
Parent |
402735 |
Sep 1989 |
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