Patent Application
20240176380
The disclosure relates to a reference current generation circuit that generates a reference current based on a second reference resistor of a different type from a first-type resistor.
Conventionally, there are many circuit blocks in an analog semiconductor integrated circuit. In these circuit blocks, it may be desirable to operate based on the same reference current. Therefore, from a reference current which is generated using one reference resistor, a copy thereof is generated, and the copy thereof is used as a reference current of each circuit block.
Here, due to the difference in the type of resistors or the like in the circuit block, it may be desirable to utilize a reference current using a reference resistor having a different characteristic (for example, temperature characteristic).
In this case, it is sufficient to arrange a circuit that generates a reference current based on a reference resistor having a different characteristic, but an independent reference current generation circuit is therefore required.
A reference current generation circuit related to the disclosure includes:
According to the disclosure, a second reference current using a reference resistor of the second type can be generated by utilizing a first reference current using a reference resistor of the first type without providing an independent reference current generation circuit.
Hereinafter, embodiments of the disclosure are described with reference to the drawings. Note that, the following embodiments do not limit the scope of the disclosure, and configurations obtained by selectively combining multiple examples are also included in the disclosure.
One end of a current source CS1 is connected to a power supply line, and a current Iin generated by another reference current generation circuit is made to flow through the current source CS1. Note that, the current source CS1 may also be a reference current generation circuit. The current Iin is referred to as the first reference current.
The current Iin is supplied to a transistor M1, which is an input side of a current mirror CM1. To note on the transistor M1, the transistor M1 is N-type, there is a short (diode connection) between the gate and the drain, and the current Iin is made to directly flow. The source of the transistor M1 is connected to ground (or a low-voltage power supply). Note that, the current mirror CM1 is referred to as the first current mirror.
The gates of two N-type transistors M2 and M3 are commonly connected to the gate of the transistor M1. The sources of the transistors M2 and M3 are connected to the same ground as the source of the transistor M1. Thus, the transistor M1 and the transistors M2 and M3 constitute the current mirror CM1. Therefore, the transistors M2 and M3 copy the current of the transistor M1, and the current Iin is made to flow through the transistors M2 and M3.
The drain of the transistor M2 is connected to a power supply via a transistor M6. To note on the transistor M6, the transistor M6 is P-type, there is a short between the drain and the gate, and the source of which is connected to the power supply. Therefore, the current Iin is also made to flow through the resistor M6. The gates of transistors M7 and M8 are connected to the gate of the transistor M6, the transistors M7 and M8 being also P-type and the sources of the transistors M7 and M8 being also connected to the power supply. The transistor M6 and the transistors M7 and M8 constitute a current mirror CM4. Thus, the transistors M7 and M8 copy the current of the transistor M6, and the current Iin is made to flow through the transistors M7 and M8. Note that, the current mirror CM4 is referred to as the fourth current mirror.
The drain of an N-type transistor M4 is connected to the drain of the transistor M7. To note on the transistor M4, there is a short between the drain and the gate. Furthermore, the source of the transistor M4 is connected to the ground via a reference resistor of the first type Rtype1.
The drain of an N-type transistor M5 is connected to the drain of the transistor M8. The gate of the transistor M5 is connected to the gate of the transistor M4. Furthermore, the source of the transistor M5 is connected to the ground via a reference resistor of the second type Rtype2.
Thus, the transistors M4 and M5 and the reference resistors Rtype1 and Rtype2 constitute a current mirror CM3. Therefore, the transistor M5 copies the current of the transistor M4. Note that, the current mirror CM3 is referred to as the third current mirror.
In addition, to note on a P-type transistor M9, the source of which is connected to the power supply and there is a short between the gate and the drain, and the P-type transistor M9 is connected to the drain of the transistor M8. The gate of a transistor M10 which is also P-type is connected to the gate of the transistor M9. The source of the transistor M10 is connected to the power supply, and the drain of the transistor M10 is connected to the drain of the transistor M8. The gates of transistors M11 and M12 which are also P-type are also connected to the gate of the transistor M9. The sources of the transistors M11 and M12 are also connected to the power supply. Thus, the transistor M9 and the transistors M10, M11, and M12 constitute a current mirror CM2. The transistors M10, M11, and M13 copy the current of the transistor M9. When the current flowing through the transistor M9 is set to a current Iout, the current Iout also flows through the transistors M10, M11, and M12. Note that, the current mirror CM2 is referred to as the second current mirror, and the current Iout is referred to as the second reference current.
The drain of an N-type transistor M14 is connected to the drain of the transistor M11. To note on the transistor M14, there is a short between the drain and the gate, and the source of which is connected to the ground. The gate of a transistor M13 is connected to the gate of the transistor M14. The source of the transistor M13 is connected to the ground, and the transistor M13 and the transistor M14 constitute a current mirror CM5. Thus, the transistor M13 copies the current of the transistor M14, and the current Iout flows through the transistor M13. Note that, the current mirror CM5 is referred to as the fifth current mirror.
The drain of the transistor M13 is connected to a connection point between the source of the transistor M4 and the reference resistor Rtype1. In addition, the drain of the transistor M3 is connected to a connection point between the source of the transistor M5 and the reference resistor Rtype2.
The current Iin flows through the transistors M7 and M8, and the current Iout flows through the transistors M10 and M9, and thus a current Iin+Iout flows through the transistors M4 and M5. In addition, the current Iout flowing through the transistor M13 is subtracted from the current Iin+Iout flowing through the transistor M4, and thus the current Iin flows through the reference resistor Rtype1.
On the other hand, the current Iin flowing through the transistor M3 is subtracted from the current Iin+Iout flowing through the transistor M5, and thus the current Iout flows through the reference resistor Rtype2.
Here, the gates of the transistor M4 and the transistor M5 are commonly connected, and the source voltages of the transistor M4 and the transistor M5 are the same. Thus, a voltage drop Iin*Rtype1 at the reference resistor Rtype1 and a voltage drop iout*Rtype2 at the reference resistor Rtype2 are the same in reference voltage Vref.
That is,
The gate of the P-type transistor 12 is connected to the gate of the transistor M9, and the source of the transistor M12 is connected to the power supply. Therefore, the current Iout flows from the drain of the transistor M12, and is used as a reference current based on the reference resistor Rtype2 in a predetermined circuit block.
In this way, according to the reference current generation circuit according to the embodiment, the reference current Iout based on the reference resistor Rtype2 having a different characteristic with the reference resistor Rtype1 can be generated by utilizing the reference current Iin based on the reference resistor Rtype1, and a reference current based on the reference resistor Rtype2 can be generated by a relatively simple circuit.
By the current mirror CM3, the voltage drops at the reference resistor of the first type Rtype1 and the reference resistor of the second type Rtype2 are made the same, and the second reference current can be set to be inversely proportional to the resistance value of the reference resistor of the second type Rtype2.
That is, for the current mirror CM1 including the N-type transistors M1, M2, and M3, N-type transistors M1c, M2c, and M3c are added to an upstream side thereof. The drain of the transistor M1c on an input side and the gate of the transistor M1 are shorted, a voltage vcn2 is supplied to the gates of the transistors M1c, M2c, and M3c to turn on the transistors M1c, M2c, and M3c. As a result, the drain voltages of the transistors M1, M2, and M3 are set to a same voltage, and the accuracy of the current mirror can be improved.
For the current mirror CM4 including the P-type transistors M6 and M7, the current mirror CM3 including the N-type transistors M4 and M5, the current mirror CM2 including the P-type transistors M9, M10, M11, and M12, and the current mirror CM5 including the N-type transistors M14 and M13, transistors M6c, M7c, M4c, M5c, M9c, M10c, M11c, M12c, M14c, and M13c are added to cause the current mirrors to be of cascode type.
Accordingly, by causing the current mirrors to be of cascode type, the gate-source voltage of the transistors constituting the current mirror can be made the same on an input side and an output side, and the accuracy thereof can be improved.
Moreover, even the P-type and the N-type of the transistors in the embodiments of
In addition, in this current mirror, the sizes of the transistors on the input side and the output side are made to be the same, and a same current is made to flow on the input side and the output side. However, the sizes of the transistors on the input side and the output side can also be made different. However, in this case, it is also required to use only Iin and Iout as the currents flowing through the reference resistors Rtype1 and Rtype2.
| Number | Date | Country | Kind |
|---|---|---|---|
| 202211513676.1 | Nov 2022 | CN | national |
