The embodiments disclosed herein relate to a sampling filter process for scalable video coding. More specifically, the disclosed embodiments relate to re-sampling using video data obtained from an encoder or decoder process, where the encoder or decoder process can be MPEG-4 Advanced Video Coding (AVC) or High Efficiency Video Coding (HEVC). Further, the current embodiments specifically relate to Scalable HEVC (SHVC) that includes a two layer video coding system.
Scalable video coding (SVC) refers to video coding in which a base layer (BL), sometimes referred to as a reference layer, and one or more scalable enhancement layers (EL) are used. For SVC, the base layer can carry video data with a base level of quality. The one or more enhancement layers can carry additional video data to support higher spatial, temporal, and/or signal-to-noise SNR levels. Enhancement layers may be defined relative to a previously coded layer.
The base layer and enhancement layers can have different resolutions. Upsampling filtering, sometimes referred to as resampling filtering, may be applied to the base layer in order to match a spatial aspect ratio or resolution of an enhancement layer. This process may be called spatial scalability. An upsampling filter set can be applied to the base layer, and one filter can be chosen from the set based on a phase (sometimes referred to as a fractional pixel shift). The phase may be calculated based on the ratio between base layer and enhancement layer picture resolutions.
Embodiments of the present invention provide methods, devices and systems for the upsampling process from BL resolution to EL resolution to implement the upsampling of
Further details of the present invention are explained with the help of the attached drawings in which:
An example of a scalable video coding system using two layers is shown in
The cross-layer CL information provided from the BL to the FR layer shown in
The upsampling block 200 works by interpolating from the BL data to recreate what is modified from the FR data. For instance, if every other pixel is dropped from the FR in block 108 to create the lower resolution BL data, the dropped pixels can be recreated using the upsampling block 200 by interpolation or other techniques to generate the EL resolution output y′ from upsampling block 200. The data y′ is then used to make encoding and decoding of the EL data more efficient.
In module 300, a set of input samples in a video signal x is first selected. In general, the samples can be a two-dimensional subset of samples in x, and a two-dimensional filter can be applied to the samples. The module 302 receives the data samples in x from module 300 and identifies the position of each sample from the data it receives, enabling module 302 to select an appropriate filter to direct the samples toward a subsequent filter module 304. The filter in module 304 is selected to filter the input samples, where the selected filter is chosen or configured to have a phase corresponding to the particular output sample location desired.
The filter input samples module 304 can include separate row and column filters. The selection of filters is represented herein as filters h[n; p], where the filters can be separable along each row or column, and p denotes a phase index selection for the filter. The output of the filtering process using the selected filter h[n; p] on the selected input samples produces output value y′.
In
In order to accommodate for offset and phase shift differences between the BL and EL samples, phase offset adjustment parameters can be signaled. Let a sample location relative to the top-left sample in the current EL picture be (xP, yP), and a sample location in the BL reference layer in units of 1/16-th sample relative to the top-left sample of the BL be (xRef16, yRef16). In J. Chen, J. Boyce, Y. Ye, M. Hannuksela, G. Sullivan, Y. Wang, “High efficiency video coding (HEVC) scalable extension Draft 5,” JCTVC-P1008_v4, January 2014, the relationship between (xRef16, yRef16) and (xP, yP) is given as follows:
xRef16=(((xP−offsetX)*ScaleFactorX+addX+(1<<11))>>12)−(phaseX<<2)
yRef16=(((yP−offsetY)*ScaleFactorY+addY+(1<<11))>>12)−(phaseY<<2)
The sample position (xRef16, yRef16) is used to select the input samples and the filters used in computing the output sample values as specified in J. Chen, J. Boyce, Y. Ye, M. Hannuksela, G. Sullivan, Y. Wang, “High efficiency video coding (HEVC) scalable extension Draft 5,” JCTVC-P1008_v4, January 2014.
The variables offsetX, addX, offsetY, and addY specify scaled reference layer offset and phase parameters in the horizontal and vertical directions, variables phaseX and phaseY specify reference layer phase offset parameters in the horizontal and vertical directions, and variables ScaleFactorX and ScaleFactorY are computed based on the ratio of the reference layer to the scaled reference layer width and height. These variables are computed based upon phase offset parameters specified in J. Chen, J. Boyce, Y. Ye, M. Hannuksela, G. Sullivan, Y. Wang, “High efficiency video coding (HEVC) scalable extension Draft 5,” JCTVC-P1008_v4, January 2014.
In order to accommodate other applications such as interlace/progressive scalability and to increase the resolution for BL and EL alignment, it was previously described in U.S. patent application Ser. No. 14/661,867 filed on Mar. 18, 2015 and incorporated by reference in its entirety, that the phase offset adjustment parameters in Tables 1 and 2 be signaled.
In a previously-proposed method, the scaled reference layer offset parameters are signaled at the PPS level. In Table 1, the pps_multilayer_extension syntax is parsed if a pps_extension_type_flag[1] (e.g. pps_multilayer_extension_flag) is set. Table 2 shows the scaled_ref_layer_id, scaled_ref_layer_left_offset, scaled_ref_layer_top_offset, scaled_ref_layer_right_offset and scaled_ref_layer_bottom_offset syntax elements signaled in the pps_multilayer_extension.
The resolution of the scaled reference layer offset can be increased from 2-integer pel. The original coarser resolution allows for selection of a region in the scaled reference layer, while the additional proposed finer resolution allows for finer local phase offset adjustment between layers. Table 2 shows an example of the signaling of the previously-proposed additional phase offset parameters:
The additional syntax elements are used to provide finer alignment between the layers. One example of the use of the syntax is as follows:
phaseX=(cIdx==0)?(ScaledRefLayerLeftPhase<<2):(ScaledRefLayerLeftPhase<<1+scaled_ref_layer_left_phase_chroma)
phaseY=(cIdx==0)?(ScaledRefLayerTopPhase<<2):(ScaledRefLayerTopPhase<<1+scaled_ref_layer_top_phase_chroma)
deltaX=(cIdx==0)?(RefLayerHorizontalDelta<<1):(RefLayerHorizontalDelta+RefLayerHorizontalDeltaChroma<<1)
deltaY=(cIdx==0)?(RefLayerVerticalDelta<<1)(RefLayerVerticalDelta+RefLayerVerticalDeltaChroma<<1)
addX=(ScaleFactorX*phaseX+4)>>3 (1)
addY=(ScaleFactorY*phaseY+4)>>3 (2)
xRef16=(((xP−offsetX)*ScaleFactorX+addX+(1<<11))>>12)−deltaX (3)
yRef16=(((yP−offsetY)*ScaleFactorY+addY+(1<<11))>>12)−deltaY (4)
The scaled reference layer phase offset parameters scaled_ref_layer_left_phase, scaled_ref_layer_left_phase_chroma, scaled_ref_layer_top_phase, and scaled_ref_layer_top_phase_chroma provide additional independent finer level or resolution over the previous scaled reference layer phase offset parameters scaled_ref_layer_left_offset, scaled_ref_layer_top_offset, scaled_ref_layer_right_offset and scaled_ref_layer_bottom_offset. In addition, the reference layer phase offset parameters ref_layer_horizontal_delta, ref_layer_vertical_delta, ref_layer_horizontal_delta_chroma and ref_layer_vertical_delta_chroma provide finer reference layer phase offset resolution.
A previously-proposed syntax allows for interlace to progressive scalability and finer alignment between layers. Example syntax was given to illustrate how additional phase offset parameters in both scaled reference layer and the reference layer can be used for alignment between layers.
A general formulation of the mapping between EL and BL can by illustrated as in
In
xRef=(xP+α)*s−β. (5)
In one example, if a has a resolution of ½ pixel, β has a resolution of ¼ pixel, and the scale factor s has a 16-bit resolution, then this equation can be written as
xRef=((xP+α>>1)*s+(1<<15))>>16−(β>>2).
For 1/16 pixel resolution, this becomes
xRef16=((xP+α>>1)*s+(1<<11))>>12−(β<<2). (6)
This equation is similar to Equation (3) except that the offset and phase values (e.g. offsetX and phaseX) are effectively combined into a. The scaled reference layer offset and phase values in Equation (3) may represent a coarser and finer offset precision, respectively, while Equation (6) combines these values into a single parameter α. Alternatively, a single scaled reference layer parameter α can be decomposed into a coarser offset and finer phase components. This also illustrates that different values for the scaled reference layer offset and phase values in Equation (3) and (1) can achieve the same effective offset as far as the computation of xRef16 is concerned. For arbitrary pixel resolution, and using Equation (1), Equation (3) can be expressed as
xRef=((xP−offsetX+phaseX)*ScaleFactorX)−deltaX (7)
Comparing Equation (7) with Equation (5) yields
It is important to note that both α and β are in general necessary to maintain sample position accuracy, as their precision together with the scale factor value s determines the BL sample position accuracy. These offset values can be signaled to the decoder, for example, per dimension and per color component, and they can be signaled at the PPS level (or its extensions), SPS, VPS, slice level, etc.
If it is desired to only signal one offset parameter, then the following can be considered
xRef=xP*s+(α*s−β),
where an offset parameter in the BL domain can be signaled to represent (α*s−β). However, for a given resolution in the offset parameter, it may not be possible to accurately signal (α*s−β), depending on the resolution of α, β, and the scale factor s. If it is desired to signal one offset parameter in the EL domain, then in
xRef=(xP+(α−β/s))*s,
it may not be possible to accurately signal (α−β/s), depending on the resolution of α, β, and the scale factor s along with the division operation. Also note that this offset is also further scaled by s.
In an alternative formulation, the BL reference sample position can be written as
xRef=(xP*s)+(γ/ScaledW)
γ=(α*W−β*ScaledW).
If s′ is defined, for example, such that
s′=(1<<16+ScaledW>>1)/ScaledW
then
xRef=(xP*s+(γ>>2)*s′+(1<<15))>>16
xRef16=(xP*s+(γ>>2)*s′+(1<<11))>>12.
In this formulation, two parameters (W, γ) are required for accurate sample position calculation, similar to the case where two parameters (α,β) were required for accurate sample position calculation in the original formulation. Note in this case that it is possible to define
ScaledW=Width+α−ScaledRefRightOffset,
W=RefWidth+β−RefRightOffset.
Also, for transmission of s=W/ScaledW, it is possible to transmit integers N and D, where s=W/ScaledW=N/D.
Beginning at block 620, start with EL position xP, scale factor s, and scaled reference layer offset α and reference layer offset β.
At block 622, determine the reference layer offset δ=α*s−β.
Finally at block 624, determine BL position xRef=xP*s+δ.
At block 650, start with EL position xP, scale factor s, and scaled reference layer offset α and reference layer offset β. At block 652, determine scaled reference layer offset σ−α−β/s.
Finally, at block 654, determine BL position xRef=(xP+σ)*s.
As shown in
Destination device 14 may receive encoded video data from source device 12 via a channel 16. Channel 16 may comprise a type of medium or device capable of moving the encoded video data from source device 12 to destination device 14. In one example, channel 16 may comprise a communication medium that enables source device 12 to transmit encoded video data directly to destination device 14 in real-time.
In this example, source device 12 may modulate the encoded video data according to a communication standard, such as a wireless communication protocol, and may transmit the modulated video data to destination device 14. The communication medium may comprise a wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide-area network, or a global network such as the Internet. The communication medium may include routers, switches, base stations, or other equipment that facilitates communication from source device 12 to destination device 14. In another example, channel 16 may correspond to a storage medium that stores the encoded video data generated by source device 12.
In the example of
Video encoder 20 may encode the captured, pre-captured, or computer-generated video data. The encoded video data may be transmitted directly to destination device 14 via output interface 22 of source device 12. The encoded video data may also be stored onto a storage medium or a file server for later access by destination device 14 for decoding and/or playback.
In the example of
Display device 32 may be integrated with or may be external to destination device 14. In some examples, destination device 14 may include an integrated display device and may also be configured to interface with an external display device. In other examples, destination device 14 may be a display device. In general, display device 32 displays the decoded video data to a user.
Video encoder 20 includes a resampling module 25 which may be configured to code (e.g., encode) video data in a scalable video coding scheme that defines at least one base layer and at least one enhancement layer. Resampling module 25 may resample at least some video data as part of an encoding process, wherein resampling may be performed in an adaptive manner using resampling filters. Likewise, video decoder 30 may also include a resampling module 35 similar to the resampling module 25 employed in the video encoder 20.
Video encoder 20 and video decoder 30 may operate according to a video compression standard, such as the High Efficiency Video Coding (HEVC) standard. The HEVC standard is being developed by the Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T Video Coding Experts Group (VCEG) and ISO/IEC Motion Picture Experts Group (MPEG). A recent draft of the HEVC standard is described in the Recommendation ITU-T H.265 | International Standard ISO/IEC 23008-2, High efficiency video coding, version 2, October 2014.
Additionally or alternatively, video encoder 20 and video decoder 30 may operate according to other proprietary or industry standards, such as the ITU-T H.264 standard, alternatively referred to as MPEG-4, Part 10, Advanced Video Coding (AVC), or extensions of such standards. The techniques of this disclosure, however, are not limited to any particular coding standard or technique. Other examples of video compression standards and techniques include MPEG-2, ITU-T H.263 and proprietary or open source compression formats and related formats.
Video encoder 20 and video decoder 30 may be implemented in hardware, software, firmware or any combination thereof. For example, the video encoder 20 and decoder 30 may employ one or more processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, or any combinations thereof. When the video encoder 20 and decoder 30 are implemented partially in software, a device may store instructions for the software in a suitable, non-transitory computer-readable storage medium and may execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Each of video encoder 20 and video decoder 30 may be included in one or more encoders or decoders, either of which may be integrated as part of a combined encoder/decoder (CODEC) in a respective device.
Aspects of the subject matter described herein may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, and so forth, which perform particular tasks or implement particular abstract data types. Aspects of the subject matter described herein may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media including memory storage devices.
Also, it is noted that some embodiments have been described as a process which is depicted as a flow diagram or block diagram. Although each may describe the operations as a sequential process, many of the operations can be performed in parallel or concurrently. In addition, the order of the operations may be rearranged. A process may have additional steps not included in the figure.
Particular embodiments may be implemented in a non-transitory computer-readable storage medium for use by or in connection with the instruction execution system, apparatus, system, or machine. The computer-readable storage medium contains instructions for controlling a computer system to perform a method described by particular embodiments. The computer system may include one or more computing devices. The instructions, when executed by one or more computer processors, may be configured to perform that which is described in particular embodiments.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above.
This application is a continuation of U.S. patent application Ser. No. 17/751,320 filed on May 23, 2023, which is a continuation of U.S. patent application Ser. No. 16/855,823 filed on Apr. 22, 2020, now U.S. Pat. No. 11,375,215, which is a continuation of U.S. patent application Ser. No. 15/960,016 filed on Apr. 23, 2018, now U.S. Pat. No. 10,652,561, which is continuation of U.S. patent application Ser. No. 14/702,007 filed on May 1, 2015, now U.S. Pat. No. 9,986,251, which claims priority under 35 U.S.C. § 119(e) from earlier filed U.S. Provisional Application Ser. No. 61/987,466 filed on May 1, 2014 each of which are incorporated herein by reference in their entirety.
Number | Date | Country | |
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61987466 | May 2014 | US |
Number | Date | Country | |
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Parent | 17751320 | May 2022 | US |
Child | 18501907 | US | |
Parent | 16855823 | Apr 2020 | US |
Child | 17751320 | US | |
Parent | 15960016 | Apr 2018 | US |
Child | 16855823 | US | |
Parent | 14702007 | May 2015 | US |
Child | 15960016 | US |