Patent Application
20150349180
Photovoltaic cells, commonly known as solar cells, are well known devices for direct conversion of solar radiation into electrical energy. Generally, solar cells are fabricated on a semiconductor wafer or substrate using semiconductor processing techniques to form a PN junction between P-type and N-type diffusion regions. Solar radiation impinging on the surface of, and entering into, the substrate of the solar cell creates electron and hole pairs in the bulk of the substrate. The electron and hole pairs migrate to P-type diffusion and N-type diffusion regions in the substrate, thereby creating a voltage differential between the diffusion regions. The diffusion regions are connected to conductive regions on the solar cell to direct an electrical current from the solar cell to an external circuit. In a backside contact solar cell, for example, both the diffusion regions and the interdigitated metal contact fingers coupled to them are on the backside of the solar cell. The contact fingers allow an external electrical circuit to be coupled to and be powered by the solar cell.
Efficiency is an important characteristic of a solar cell as it is directly related to the capability of the solar cell to generate power. Likewise, efficiency in producing solar cells is directly related to the cost effectiveness of such solar cells. Accordingly, techniques for increasing the efficiency of solar cells, or techniques for increasing the efficiency in the manufacture of solar cells, are generally desirable. Some embodiments of the present disclosure allow for increased solar cell manufacture efficiency by providing novel processes for fabricating solar cell structures. Some embodiments of the present disclosure allow for increased solar cell efficiency by providing novel solar cell structures.
The following detailed description is merely illustrative in nature and is not intended to limit the embodiments of the subject matter of the application or uses of such embodiments. As used herein, the word “exemplary” means “serving as an example, instance, or illustration.” Any implementation described herein as exemplary is not necessarily to be construed as preferred or advantageous over other implementations. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, brief summary or the following detailed description.
This specification includes references to “one embodiment” or “an embodiment.” The appearances of the phrases “in one embodiment” or “in an embodiment” do not necessarily refer to the same embodiment. Particular features, structures, or characteristics may be combined in any suitable manner consistent with this disclosure.
Terminology. The following paragraphs provide definitions and/or context for terms found in this disclosure (including the appended claims):
“Comprising.” This term is open-ended. As used in the appended claims, this term does not foreclose additional structure or steps.
“Configured To.” Various units or components may be described or claimed as “configured to” perform a task or tasks. In such contexts, “configured to” is used to connote structure by indicating that the units/components include structure that performs those task or tasks during operation. As such, the unit/component can be said to be configured to perform the task even when the specified unit/component is not currently operational (e.g., is not on/active). Reciting that a unit/circuit/component is “configured to” perform one or more tasks is expressly intended not to invoke 35 U.S.C. §112, sixth paragraph, for that unit/component.
“First,” “Second,” etc. As used herein, these terms are used as labels for nouns that they precede, and do not imply any type of ordering (e.g., spatial, temporal, logical, etc.). For example, reference to a “first” dopant source does not necessarily imply that this dopant source is the first dopant source in a sequence; instead the term “first” is used to differentiate this dopant source from another dopant source (e.g., a “second” dopant source).
“Based On.” As used herein, this term is used to describe one or more factors that affect a determination. This term does not foreclose additional factors that may affect a determination. That is, a determination may be solely based on those factors or based, at least in part, on those factors. Consider the phrase “determine A based on B.” While B may be a factor that affects the determination of A, such a phrase does not foreclose the determination of A from also being based on C. In other instances, A may be determined based solely on B.
“Coupled”—The following description refers to elements or nodes or features being “coupled” together. As used herein, unless expressly stated otherwise, “coupled” means that one element/node/feature is directly or indirectly joined to (or directly or indirectly communicates with) another element/node/feature, and not necessarily mechanically.
“Inhibit”—As used herein, inhibit is used to describe a reducing or minimizing effect. When a component or feature is described as inhibiting an action, motion, or condition it may completely prevent the result or outcome or future state completely. Additionally, “inhibit” can also refer to a reduction or lessening of the outcome, performance, and/or effect which might otherwise occur. Accordingly, when a component, element, or feature is referred to as inhibiting a result or state, it need not completely prevent or eliminate the result or state.
In addition, certain terminology may also be used in the following description for the purpose of reference only, and thus are not intended to be limiting. For example, terms such as “upper”, “lower”, “above”, and “below” refer to directions in the drawings to which reference is made. Terms such as “front”, “back”, “rear”, “side”, “outboard”, and “inboard” describe the orientation and/or location of portions of the component within a consistent but arbitrary frame of reference which is made clear by reference to the text and the associated drawings describing the component under discussion. Such terminology may include the words specifically mentioned above, derivatives thereof, and words of similar import.
Although much of the disclosure is described in terms of solar cells for ease of understanding, the disclosed techniques and structures apply equally to other semiconductor structures (e.g., silicon wafers generally).
In the following description, numerous specific details are set forth, such as specific process flow operations, in order to provide a thorough understanding of embodiments of the present disclosure. It will be apparent to one skilled in the art that embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known fabrication techniques, such as lithography techniques, are not described in detail in order to not unnecessarily obscure embodiments of the present disclosure. Furthermore, it is to be understood that the various embodiments shown in the figures are illustrative representations and are not necessarily drawn to scale.
This specification first describes an example solar cell that can include the disclosed dopant levels, followed by a more detailed explanation of various embodiments of forming dual dopant level solar cell structures. Various examples are provided throughout.
Referring to
The solar cell 100 may further include conductive contacts formed on emitter regions which are formed above the substrate 110, in accordance with an embodiment. A first electrically conductive contact such as a first metal contact finger 114 may be disposed in a first contact opening disposed in a silicon nitride layer 112 and may be coupled to the P-type diffusion polysilicon region 102. A second electrically conductive contact such as a second metal contact finger 116 may be disposed in a second contact opening disposed in the silicon nitride layer 112 and may be coupled to the N-type diffusion polysilicon region 104. The “fingers” may be made using masks and etch or according to other techniques.
In one embodiment, the P-type diffusion polysilicon region 102 and the N-type diffusion polysilicon region 104 can provide emitter regions for solar cell 100. Thus, in an embodiment, the first metal contact finger 114 and the second metal contact finger 116 are disposed on respective emitter regions. In an embodiment, the first metal contact finger 114 and the second metal contact finger 116 are back contacts for a back-contact solar cell and are situated on a surface of the solar cell opposing a light receiving surface (side 100A) of solar cell 100. Furthermore, in one embodiment, the emitter regions are formed on a thin or tunnel dielectric layer such as the dielectric layer 106.
According to some embodiments, as shown in
In a back-contact solar cell, such as the solar cell 100, with interdigitated N-type and P-type diffusions in a polysilicon layer there is the butting PN junction 109 that may be formed within the polysilicon layer at an interface between the two diffusions. The butting PN junction 109 is the area between the Boron doped (P-type) polysilicon and the Phosphorous doped (N-type) polysilicon. The butting PN junction 109 can extend into both sides of the physical interface between the P-type and N-type diffusion regions. The widths and how much it extends into each side of the physical junction depend on doping concentration levels and gradient of each side of the butting PN junction 109.
Generally, space charge recombination happens at the poly grain boundaries at the PN junction 109. Space charge recombination is a process by which mobile charge carriers (electrons and electron holes) are eliminated. It is a process by which a conduction band electron loses energy and re-occupies the energy state of an electron hole in the valence band. The poly-crystalline silicon of the polysilicon layer consists of grains. Each grain has a perfect crystalline lattice with all Si atoms lined up. However, different grains may have different orientation and between the grains there is a boundary where the crystallinity of the material is broken. This interface is called a grain boundary. Electron hole recombination has increased probability in certain areas of the material such as the grain boundary. For example metal defects increase recombination. The inventors found that the Boron at the grain boundaries is one such area where there is a higher recombination. If those areas are reduced the lifetime of the material is higher and there is a better chance of collecting the carriers.
Because the butting PN junction 109 has a high recombination in most cases it prevents reaching high device efficiencies beyond 20%. However, the inventors found that space charge recombination can depend on P-type dopant concentration levels. By lowering the dopant concentration level to ˜5E17/cm3 in the polysilicon layer the Boron atoms at the grain boundaries are few enough that recombination is suppressed to levels where high efficiency devices can be made.
Consistent with one embodiment, the P-type diffusion polysilicon region 102 may be formed by a P-type dopant source 120 having a first dopant concentration level and the N-type diffusion polysilicon region 104 may be formed by an N-type dopant source 122 having a second dopant concentration level such that the first dopant concentration level is less than the second dopant concentration level. For example, the P-type diffusion polysilicon region 102 may be formed in the polysilicon layer by a P-type dopant source that comprises Boron having a dopant concentration level less than a range 1E17/cm3-1E18/cm3 so that the P-type diffusion polysilicon region 102 has a resulting dopant concentration level less than a range ˜5E19/cm3 to ˜5E17/cm3. Likewise, an N-type dopant source that comprises Phosphorus may be used to form the N-type diffusion polysilicon region 104. A dopant source is a source of charge carrier impurity atoms for a substrate such Boron is for a silicon based substrate. For example, in one embodiment, the charge carrier impurity atoms are N-type dopants, such as but not limited to phosphorus dopants. In another embodiment, the charge carrier impurity atoms are P-type dopants, such as but not limited to boron dopants.
In one embodiment, the P-type diffusion polysilicon region 102 and N-type diffusion polysilicon region 104 are active regions. Conductive contacts may be coupled to the active regions and separated from one another by isolation regions, which may be composed of a dielectric material. In an embodiment, the solar cell is a back-contact solar cell and further includes an anti-reflective coating layer (e.g., dielectric 112) disposed on a light-receiving surface, such as on a random textured surface of the solar cell.
The first dopant concentration level of the P-type dopant source 120 may be less than the second dopant concentration level of the N-type dopant source 122 to reduce recombination at the butting PN junction 109 to an extent that a resulting device efficiency is greater than 20%. For example, an N-type dopant source that comprises Phosphorus with a dopant concentration level greater than approximately 1E19/cm3-1E20/cm3 may be used to form the N-type diffusion polysilicon region 104 in the polysilicon layer compared to the P-type dopant source of Boron with a dopant concentration level less than approximately 1E17/cm3-1E18/cm3.
By reducing the P-type dopant concentration level to a lower concentration level the recombination is lowered so high efficiency solar cells can be made. In some embodiments, there is no need to physically separate N-type and P-type diffusions with a trench in order to decrease the recombination. By reducing recombination at the butting PN junction 109 without requiring a physical trench, at least two steps can be removed in the fabrication process of the solar cell 100 thus driving down the cost.
Additional increase in lifetime may be achieved by passivation of grain boundaries using Hydrogen (H). That is, further improvement in recombination can be achieved by passivating the now vacant sites at the grain boundaries with Hydrogen (H). This can be done during forming gas anneal (“FGA”) driving H from a nearby silicon nitride layer or by plasma enhanced chemical vapor deposition (PECVD) H (e.g., prior to nitride deposition).
Lowering the Boron doping concentration level can aid the effect of H passivation. For example, with lower Boron levels, hydrogenation (e.g., H passivation of any dangling Si bonds at the surface) can result in a higher cell lifetime. In contrast, with higher Boron concentrations the Boron atoms can take up a lot of the dangling bonds. However, at lower concentrations, H is now able to reach those bonds and passivate them.
For example, in one embodiment, H passivation can be performed by forming gas anneal (FGA) with a N2 and H2 mixture. Traditionally, the H in the forming gas is the source of H but an alternate source of H is from a silicon nitride PECVD layer or film that may be deposited on top of the polysilicon layer. The silicon nitride PECVD layer or film itself can have a lot of H and can be used to diffuse to a boundary region of the butting PN junction 109 and improve passivation during the anneal resulting in a passivation region 124. As the Boron levels at the interface or the butting PN junction 109 are lowered H is now able to get to the dangling Si bonds and passivate them.
As shown in
Turning now to
As shown at 204, the P-type diffusion polysilicon region 102, as shown in
Referring to
Referring to operation 302 of the flowchart 300, and to corresponding
In an embodiment, the thin dielectric layer 402 is composed of silicon dioxide and has a thickness approximately in the range of 5-50 Angstroms (e.g., 20 Angstroms). In one embodiment, the dielectric layer 402 comprises silicon dioxide thermally grown on the surface of the substrate 400. The dielectric layer 402 may also comprise silicon nitride, for example. The thin dielectric layer 402 performs as a tunneling oxide layer. In a specific embodiment, the dielectric layer 402 is an anti-reflective coating (ARC) layer. In an embodiment, the substrate 400 is a bulk single-crystal substrate, such as an N-type doped single crystalline silicon substrate or N-type silicon wafer. However, in an alternative embodiment, the substrate 400 may include a polycrystalline silicon layer disposed on a global solar cell substrate.
Referring to operation 304 of the flowchart 300, and to corresponding
Referring to operation 306 of the flowchart 300, and to corresponding
In an embodiment, the patterning exposes a region of the polysilicon layer 404 adjacent a region of the first dopant source 408, as depicted in
In one embodiment, lower P-type doping in the polysilicon layer results by lowering the dopant amount in a BSG oxide layer (P-type dopant source). The concentration of Boron (B) in the BSG oxide layer is reduced from typical levels of ˜4% to ˜1-2%. This results in lowering the amount of P-type dopant concentration level in the polysilicon layer to ˜5E19/cm3 to ˜5E17/cm3.
Referring to operation 310 of the flowchart 300, and to corresponding
In one embodiment, forming the second dopant source 412 includes forming a layer of phosphorus silicate glass (PSG). In a specific embodiment, the PSG layer is formed by chemical vapor deposition as a uniform, blanket layer and then patterned by a lithography and etch process. In a particular such embodiment, the PSG layer is formed by a chemical vapor deposition technique such as, but not limited to, atmospheric pressure chemical vapor deposition (APCVD), plasma-enhanced chemical vapor deposition (PECVD), low-pressure chemical vapor deposition (LPCVD), or ultra-high vacuum chemical vapor deposition (UHVCVD). In one embodiment, the second dopant source 412 is a layer of film that includes N-type dopant impurity atoms and can be deposited above a substrate. In an alternate embodiment, an ion implantation approach may be used.
By using the PSG layer, in one embodiment, the range of N-type doping concentration level in the N-type diffusion region 416 of the polysilicon layer 404 can be about 10% of the N-type dopant source's dopant concentration level of, e.g., 1E19/cm3-1E20/cm3.
Referring to operation 312 of the flowchart 300, and to corresponding
In operation 312, a thermal drive-in step diffuses dopants from the first and second doped silicon dioxide layers 407, 410 to the underlying polysilicon layer 404, thereby forming P-type and N-type diffusion regions in the polysilicon layer 404, which is accordingly labeled as a P-type diffusion polysilicon region 414 and an N-type diffusion polysilicon region 416. The thermal drive-in step may be performed by heating the sample of
Referring to operation 314 of the flowchart 300, and to corresponding
Contact openings can be formed to provide exposure to the N-type diffusion polysilicon region 416 and to the P-type diffusion polysilicon region 414. In one embodiment, the contact openings are formed by laser ablation. Forming contacts for the back-contact solar cell can include forming conductive contacts in the contact openings for coupling the N-type diffusion polysilicon region 416 and the P-type diffusion polysilicon region 414. Thus, in an embodiment, conductive contacts are formed on or above a surface of a bulk N-type silicon substrate such as the substrate 400 opposing a light receiving surface of the substrate 400.
Referring to
When the P-type dopant level is dramatically reduced then a counter doping technique may be used for creating the N-type and P-type diffusion regions. Very low P-type diffusion with Boron may be used in a counter doping process for the areas where an N-type diffusion with Phosphorous is needed. To this end, an in situ doped P type film may be formed and then a patterned deposition with high levels of phosphorous may be performed. This will counter dope the initial P-type material to N-type. The non N-type doped areas will remain P-type. One possible patterned deposition technique that may be deployed is implant but others can work as well.
Referring to operation 1002 of the flowchart 1000, and to corresponding
Referring to operation 1004 of the flowchart 1000, and to corresponding
Referring to operation 1006 of the flowchart 1000, and to corresponding
Referring to operation 1008 of the flowchart 1000, and to corresponding
Referring to operation 1010 of the flowchart 1000, and to corresponding
Referring to operation 1012 of the flowchart 1000, and to corresponding
Referring to operation 1014 of the flowchart 1000, and to corresponding
Contact openings can be formed to provide exposure to the N-type diffusion polysilicon region 1116 and to the plurality of P-type diffusion polysilicon region 1114. In one embodiment, the contact openings are formed by laser ablation. Forming contacts for the back-contact solar cell can include forming conductive contacts in the contact openings for coupling the N-type diffusion polysilicon region 1116 and the P-type diffusion polysilicon region 1114. Thus, in an embodiment, conductive contacts are formed on or above a surface of a bulk N-type silicon substrate such as the substrate 1100 opposing a light receiving surface of the substrate 1100.
Referring to
Referring to operation 1702 of the flowchart 1700, and to corresponding
The substrate 1800 may comprise an N-type silicon wafer in this example, and is typically received with damaged surfaces due to the sawing process used by the wafer vendor to slice the substrate 1800 from its ingot. The substrate 1800 may be about 100 to 200 microns thick as received from the wafer vendor. In one embodiment, the damage etch step involves removal of about 10 to 20 μm from each side of the substrate 1800 using a wet etch process comprising potassium hydroxide. The damage etch step may also include cleaning of the substrate 1800 to remove metal contamination. Thin dielectric layers (not labeled) may be formed on the front side and backside surfaces of the substrate 1800. The thin dielectric layers may comprise silicon dioxide thermally grown to a thickness less than or equal to 20 Angstroms (e.g., 16 Angstroms) on both surfaces of the substrate 1800. The front side surface of the substrate 1800 and materials formed thereon are also referred to as being on the front side of the solar cell because they face the sun to receive solar radiation during normal operation. Similarly, the backside surface of the substrate 1800 and materials formed thereon are also referred to as being on the backside of the solar cell, which is opposite the front side.
Referring to operation 1704 of the flowchart 1700, and to corresponding
Referring to operation 1706 of the flowchart 1700, and to corresponding
Referring to operation 1708 of the flowchart 1700, and to corresponding
Referring to operation 1710 of the flowchart 1700, and to corresponding
Contact openings can be formed to provide exposure to the N-type diffusion polysilicon region 1816 and to the plurality of P-type diffusion polysilicon region 1814. In one embodiment, the contact openings are formed by laser ablation. Forming contacts for the back-contact solar cell can include forming conductive contacts in the contact openings for coupling the N-type diffusion polysilicon region 1816 and the P-type diffusion polysilicon region 1814. Thus, in an embodiment, conductive contacts are formed on or above a surface of a bulk N-type silicon substrate such as the substrate 1800 opposing a light receiving surface of the substrate 1800.
Although specific embodiments have been described above, these embodiments are not intended to limit the scope of the present disclosure, even where only a single embodiment is described with respect to a particular feature. Examples of features provided in the disclosure are intended to be illustrative rather than restrictive unless stated otherwise. The above description is intended to cover such alternatives, modifications, and equivalents as would be apparent to a person skilled in the art having the benefit of this disclosure.
The scope of the present disclosure includes any feature or combination of features disclosed herein (either explicitly or implicitly), or any generalization thereof, whether or not it mitigates any or all of the problems addressed herein. Accordingly, new claims may be formulated during prosecution of this application (or an application claiming priority thereto) to any such combination of features. In particular, with reference to the appended claims, features from dependent claims may be combined with those of the independent claims and features from respective independent claims may be combined in any appropriate manner and not merely in the specific combinations enumerated in the appended claims.
