Patent Application
20080158753
A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by any one of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.
The following documents are cited herein and are hereby incorporated by reference:
The following is a partial list of abbreviations and acronyms used herein:
One or more of the above discussed or other disadvantages may be overcome by an embodiment of the present invention, in which a method of operating a relay device, the method comprising the steps of: a) providing a an electrical circuit comprising first and second main circuit breakers, and a bus tie breaker connecting the first and second main circuit breakers; b) computing positive sequence first current phasor and second current phasor for the first main circuit breaker and the second main circuit breaker, respectively, and computing currents from phasor values, and the bus tie breaker; c) computing positive sequence voltage for the bus tie breaker; d) compute a correction of the positive sequence voltage for the bus tie breaker to a line to neutral phase angle reference, if there is any rotation in a potential transformer connection; e) triggering the performance of a method when at least one magnitude of at least one fault current at the first main circuit breaker exceeds a predetermined threshold, without the presence of a fault on at least one of the feeders; f) triggering the performance of a method when at least one magnitude of at least one fault current at the tie breaker exceeds a predetermined threshold, without the presence of a fault on at least one of the feeders wherein if a trigger is performed, a bus fault or a reverse fault is backfed through the bus tie breaker; g) determining whether the fault is an internal fault or an external fault by comparing the phase angle of the positive sequence current through the first main circuit breaker with the positive sequence current through the second main circuit breaker, wherein the fault is internal if the positive sequence current through the first main circuit breaker is in phase with the positive sequence current through the second main circuit breaker, and wherein if the positive sequence current through the first main circuit breaker is not in phase with the positive sequence current through the second main circuit breaker, the fault is external to the bus; h) determining whether the fault is on a first side of the tie circuit breaker or a second side of the tie circuit breaker by comparing the phase angle of the positive sequence current through the tie breaker with the positive sequence current through one of the first and second main circuit breakers, if the fault is internal; and i) locating the fault by comparing the direction of a voltage drop due to the positive sequence current through the bus tie circuit breaker with a pre-fault positive sequence voltage on the bus, if the fault is external to the bus.
In yet another embodiment of the invention a computer program product comprising: a program storage device readable by a relay device, tangibly embodying a program of instructions executable by the relay device to perform method steps for operating the relay device, the method steps comprising: a) providing a an electrical circuit comprising first and second main circuit breakers, and a bus tie breaker connecting the first and second main circuit breakers; b) computing positive sequence first current phasor and second current phasor for the first main circuit breaker and the second main circuit breaker, respectively, and computing currents from phasor values, and the bus tie breaker; c) computing positive sequence voltage for the bus tie breaker; d) compute a correction of the positive sequence voltage for the bus tie breaker to a line to neutral phase angle reference, if there is any rotation in a potential transformer connection; e) triggering the performance of a method when at least one magnitude of at least one fault current at the first main circuit breaker exceeds a predetermined threshold, without the presence of a fault on at least one of the feeders; f) triggering the performance of a method when at least one magnitude of at least one fault current at the tie breaker exceeds a predetermined threshold, without the presence of a fault on at least one of the feeders wherein if a trigger is performed, a bus fault or a reverse fault is backfed through the bus tie breaker; g) determining whether the fault is an internal fault or an external fault by comparing the phase angle of the positive sequence current through the first main circuit breaker with the positive sequence current through the second main circuit breaker, wherein the fault is internal if the positive sequence current through the first main circuit breaker is in phase with the positive sequence current through the second main circuit breaker, and wherein if the positive sequence current through the first main circuit breaker is not in phase with the positive sequence current through the second main circuit breaker, the fault is external to the bus; h) determining whether the fault is on a first side of the tie circuit breaker or a second side of the tie circuit breaker by comparing the phase angle of the positive sequence current through the tie breaker with the positive sequence current through one of the first and second main circuit breakers, if the fault is internal; and i) locating the fault by comparing the direction of a voltage drop due to the positive sequence current through the bus tie circuit breaker with a pre-fault positive sequence voltage on the bus, if the fault is external to the bus.
The above brief description sets forth rather broadly the more important features of the present invention in order that the detailed description thereof that follows may be better understood, and in order that the present contributions to the art may be better appreciated. There are, of course, additional features of the invention that will be described hereinafter and which will be for the subject matter of the claims appended hereto.
In this respect, before explaining several embodiments of the invention in detail, it is understood that the invention is not limited in its application to the details of the construction and to the arrangements of the components set forth in the following description or illustrated in the drawings. The invention is capable of other embodiments and of being practiced and carried out in various ways. Also, it is to be understood, that the phraseology and terminology employed herein are for the purpose of description and should not be regarded as limiting.
As such, those skilled in the art will appreciate that the conception, upon which disclosure is based, may readily be utilized as a basis for designing other structures, methods, and systems for carrying out the several purposes of the present invention. It is important, therefore, that the claims be regarded as including such equivalent constructions insofar as they do not depart from the spirit and scope of the present invention.
Further, the purpose of the foregoing Abstract is to enable the U.S. Patent and Trademark Office and the public generally, and especially the scientists, engineers and practitioners in the art who are not familiar with patent or legal terms or phraseology, to determine quickly from a cursory inspection the nature and essence of the technical disclosure of the application. Accordingly, the Abstract is neither intended to define the invention or the application, which only is measured by the claims, nor is it intended to be limiting as to the scope of the invention in any way.
Further, the purpose of the foregoing Paragraph Titles used in both the background and the detailed description is to enable the U.S. Patent and Trademark Office and the public generally, and especially the scientists, engineers and practitioners in the art who are not familiar with patent or legal terms or phraseology, to determine quickly from a cursory inspection the nature and essence of the technical disclosure of the application. Accordingly, the Paragraph Titles are neither intended to define the invention or the application, which only is measured by the claims, nor are they it intended to be limiting as to the scope of the invention in any way.
A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, wherein:
The present invention relates in general relays and, more particularly, to power system protective relays.
Introduction. Time-based coordination and protection is the standard basis for coordinating low-voltage power distribution systems. Enhancements, such as zone-selective-interlocking and bus-differential protection, can be used to accelerate the operation of protective devices. However, these improvements may be costly, difficult to implement, and may not function as expected using commonly available technology. Nevertheless, the potential benefit of fault clearing speed and selectivity are more valued in today's arc-flash and reliability conscious environment than ever before. Included in the description herein are some issues associated with traditional protection improvements including pitfalls and, more effective ways to implement zone-based protection to achieve fast fault protection while maintaining selectivity for a broad range of fault magnitudes, system configurations and load types.
Low-voltage power distribution systems are expected to deliver reliable power within constraints including, but not limited to, cost and size using available technology. Protective devices are chosen, installed and adjusted to quickly operate, selectively and reliably to protect the low-voltage power distribution system. Protection has traditionally been coordinated by such that for any specific value of fault current (also referred to as overload current or over-current) the downstream device closer to the fault over-current is faster than the upstream device further away from the fault over-current.
There are limitations, and risks of improper operation for these methods. that will also discussed, as well as how to mitigate those risks using the Single-Processor-Concept [1].
Zone-selective-interlocking and differential protection can improve protective device (i.e. speed up protective device operating time). Additionally, clearing speed has an effect on arc-flash energy. There are limitations, and risks of improper operation for these methods that will also discussed, as well as how to mitigate those risks using the Single-Processor-Concept [1].
Impact of Clearing Speed on Protection. Incident arc-flash energy is a technique for calculating damaging heat energy radiated into air from an arc during an arcing fault event and is described in reference [2] titled “IEEE Guide for Performing Arc-Flash Hazard Calculations” (with complete reference information provided supra.). The Guide for Performing Arc-Flash Hazard Calculations [2] reference provides formulas to estimate arcing-current and radiated incident heat energy over a range of working distances under a variety of conditions. The Guide defines arcing-current as a function of available voltage, available bolted fault current and the gap between the current carrying conductors. The calculated arcing-current is less than the available bolted fault current.
Arc Flash energy is a function of factors such as: 1) Voltage—Fixed for the system; 2) Available short circuit current—Fixed by system design and source; 3) Working distance—Arms are only so long; 4) Arc gap—Determined by equipment type; 5) Arcing fault clearing time (not short circuit clearing time)—a function of the protective device acting upon arcing current. Therefore, short circuit current is fixed, and cannot change because factors such as voltage, arms or the hot stick are only so long and cannot be changed. Hence clearing time is the only parameter than can be modified. So arcing fault clearing time is a critical factor.
The relationship of arcing-current to available bolted fault current also varies depending on the gap between electrodes. The electrodes represent the current carrying conductors.
Protective device reaction speed must be considered in relation to the arcing-current present during an arcing fault event.
Other considerations are the sources of fault current, the direction, and path of each fault current contribution. A bus with significant available short circuit current may have a portion of that current come from motor contribution. These various considerations mean the arcing fault current through the main may be surprisingly small. Consider, from Reference [1], the following example, a 62 kA, 4,000 A low-voltage switchgear bus with an estimated 10,000 A of motor contribution through feeders, and estimated 52,000 A of transformer contribution through the main circuit breaker. The potential arcing-current flowing through the main over-current device may be estimated for 480V switchgear as follows:
Hence, in a system with a significant value of prospective short circuit fault current the current through the main device for an arcing fault on the main bus may be less than 22,000. If this is a 4000 A bus, the arcing fault current could fall within the tolerance of a 5× pick rating for the main circuit breaker and below 50% the current limiting threshold of a 4000 A Class-L fuse. The main circuit breaker may not consider this a short-time fault.
Additional arcing-current variance could be introduced by incorrect utility information or conservative assumptions in the short circuit current calculations that result in higher calculated fault values than available. The impedance of conductor terminations and protective devices, for example, will introduce impedance not normally taken into account during short circuit calculations. Traditional fault current calculations used to identify the ratings of equipment and components are conservative by making sure that error results in higher, not lower, calculated fault currents. However, when calculating arc-flash incident energy, the more dangerous level of energy may happen with either lower or higher arcing fault values. Greater values of prospective current will yield greater arcing-current that will cause greater incident energy per cycle, however lower arcing fault current values may result in slower protective device operating times that also will increase incident energy.
Potential for low arcing-currents could add significant risk to an arc-flash event. Any device, whether fuses or circuit breakers, that depends on high current values to operate quickly can operate differently from expected if arcing-currents are lower than expected. For large low-voltage-power circuit breakers even short-time pick-up points set to achieve selectivity with the required short-time characteristics of loads in the system may be set above potential arcing-currents.
Impact of Arc-flash Current on Short-Time Pick-Up.
In the example of
Zone-Selective-Interlocking and Motor Contribution: Direction Matters. In zone-selective-interlocking, several levels of circuit breakers operate selectively at their minimum time delay for in-zone short-time faults.
This risk can be addressed by setting the feeder's delay to a greater value or adjusting the short-time pick-up to a greater value. In either case, some desirable protection is compromised.
In the case of a bus with no low-voltage main, the primary medium voltage transformer protective device main may be zone-interlocked with the feeders. The problem of fault contribution from motors through feeders is equally valid when the main is on the other side of a transformer, and slower than expected operation of the medium voltage device is also possible.
Referring now to the drawings, wherein like reference numerals designate identical or corresponding parts throughout the several views, one of the embodiments of the relay with integrated test capabilities of embodiments of the present invention the invention will be described. One of the advantageous aspects of an embodiment of the invention described here is a novel test features integrated into the relay of the present invention so that in test mode the relay of the present invention is a relay under test. The test features use simulated actual data from the power system to test the relay of the present invention. Waveform of present invention is generated based upon user preferences; the user designs signal(s) to inject into the relay. These and other features and advantages will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings and claims.
Within this description the expression, “functions are run substantially simultaneously” may be used. In the context of the Single-Processor-Device, the statement means that some functions are executed within the same ½ cycle processor operating time such that the result of all the functions executed within the same ½ cycle processor operating time is considered before any circuit breaker command is issued. Hence, multiple functions are processed the substantially same synchronized data and optimize their overall performance. For further elaboration on the system architecture, see U.S. Pat. No. 6,985,784 titled Configuring A Centrally Controlled Circuit Breaker Protection System, invented by Vandevanter; John S., Papallo; Thomas F., Spahr; Ellen E. and assigned to the assignee of the present application and incorporated by reference herein. In addition, the current transformers used in the single-Processor-Concept are not traditional ANSI relay class transformers. The current transformers are referred to as sensors and have secondary currents below 1 Ampere. Their characteristics are incorporated into and compensated for in the processor functions.
ZSI Applications in Multiple-Source Systems with Ties: Selectivity or Protection
In distribution systems with tie circuit breakers, ZSI schemes may be configured two different ways; with a selective tie, or with fast mains.
DZSI Theory Of Operation: 1) In an embodiment of the present invention Reverse Current uses voltage polarization to detect and trip main breakers. Reverse current will use “historic” voltage—from for example about 6 to 30 Cycles prior to the fault—for the direction comparison. In the present embodiment, this function does not operate if a main breaker 306 (i.e. main A circuit breaker of
Further, with respect to DZSI Theory Of Operation: 1) In an embodiment of the present invention DZSI operates on a Bus and Zone principle, the same as ZSI multi-point IEDs (or relays) such as, for example Entellisys™, manufactured by General Electric, the assignee of the present invention. Hence, the DZSI operates on CCPU firmware; operates using bus and zone configuration techniques of a multi-point relay; operates using HMI configuration software. A single-processor system provides the platform for current direction to be determined. The embodiment of the DZSI system calculates phasors.
Four fault conditions are detected using DZSI: 1) In zone bus fault; 2) In zone feeder fault that has not caused pickup of the zone; 3) In zone feeder fault that has caused pickup of the zone; and 4) A reverse fault on a main breaker. It should be noted that the four fault conditions are detected using DZSI are distinguished because the timing of the breaker primary and backup trip times are different for the different fault conditions. DZSI Logic is used to distinguish fault types based on several system current tests. The results of the tests determine the fault type. Each test can be determined by one of ordinary skill in the art. A state table can be created with the resulting fault type (i.e. in zone fault, out of zone fault, in zone feeder fault, no fault, in zone reverse fault, in zone bus fault) for each test.
The current tests used to determine the fault conditions for DZSI are: 1) In DZSI Zone Fault; 2) Out of DZSI Zone Fault; 3) Reverse Main Fault; 4) Feeder In Pickup; Feeder Direction.
The Partial Differential (PD) Calculation is defined as the Phasor Sum of the Main and Tie breakers. Different techniques are used to perform this calculation based on current magnitude. The logic of the DZSI Zone, simplified is: 1) Out of Zone: a) PD determine in/out of zone fault; b) Use Reverse current to distinguish between pass-through and reverse faults; and 2) In Zone: a) PD determine in/out of zone fault; b) Feeder in pickup distinguish between Bus and Feeder faults; and c) Feeder direction is used to determine that the feeder is not feeding a bus fault. In the present invention, main and tie breakers are not restrained as compared to previous protections schemes such as, for example, a ZSI protection scheme which restrains a circuit breaker.
In the selective tie configuration, the feeder circuit breakers on both sides of the tie interlock with the tie. The tie then interlocks with both mains. A fault below a feeder will properly keep the tie and mains operating at a delayed interval while the feeder should clear the fault faster. For a fault on either bus, the tie will delay the mains while it separates the buses. However separating the buses does not clear the fault. Whichever bus is faulted remains faulted until the respective main clears one time delay later. In this scenario the feeders, tie and mains are coordinated, one time delay is saved, but the fault can remain energized for two time delays via one source.
The fast main connection interlocks the feeders with the tie and both main circuit breakers. In this case bus fault will be seen by all three circuit breakers as a fault within their respective zones and all three circuit breakers will trip at a minimum time delay. Fast protection is achieved, however system reliability is sacrificed.
In an ideal system the main and tie feeding the faulted bus would clear in minimum time while the other bus remained connected to its dedicated source.
Most low-voltage power systems will be fed from a transformer via a low-voltage main circuit breaker. A fault detection and isolation problem exists when a fault occurs between the low-voltage main and the transformer secondary terminals. During closed tie operation, with sources in parallel the fault is fed from the other source through the tie and both main circuit breakers (see
In an ideal situation, the main closest to the fault should separate the fault from the other source in an about minimum time. The tie, as well, as the other main should remain closed. A medium voltage device should also operate as quickly as possible separating the fault from its primary source. To accomplish this the fault location must be known.
Normal circuit breaker trips with ZSI will not be able to differentiate a fault on the equipment bus from a fault ahead of the bus at either of the transformer terminals. In the present example, three circuit breakers (1a, 2 and 1b) of
It would be more desirable that the short time delay of the second circuit breaker of
Bus-differential protection is based on Kirchoff's node law which states that all the currents into a node (bus) must equal all the currents exiting a node. Kirchoff's node law is illustrated in
I
1
+I
2
+I
3
+I
4=0 (5)
Traditional (prior art) bus protection is performed with dedicated current transformers and a dedicated relay, as illustrated in
In low-voltage systems bus-differential is advantageous for detection of lower value high-impedance faults that may or may not exceed the short-time (ST) pickup of large main and tie circuit breakers. As fault currents increase, a zone-interlocked system (i.e., ZSI) may provide similar results as a differential system (i.e., DZSI or PDZ). Hence a combination of bus-differential protection and properly set zone selective short-time protection can provide a broad range of selective protection operating in minimum time. The desire would be to properly locate very high-impedance arcing faults to full bolted faults, selectively, and quickly.
The Single-Processor-Concept [1], for circuit protection is a system where a single processor takes pertinent system information and is able to process it substantially simultaneously for a comprehensive line up of power distribution equipment. Since current and voltage information is synchronized and available in one place at the substantially the same time, calculations may be made using substantially simultaneous single time data samples or RMS (Root Mean Square) values calculated over time. The type of data is used depends on what is optimal for the calculation.
The single-Processor-Concept allows the use of the same circuit information for a variety of protective and control calculations or systems such as bus differential without the need for single function dedicated devices. Hence, the same hardware providing normal over-current, ground fault and zone-selective-interlocking, can provide bus-differential protection substantially simultaneously.
A differential system that functions to where any current transformer in the circuit measures 10 times rated current is sufficient for low-voltage applications. The bus-differential function can be complimented by the short-time zone-selective-interlocking scheme. The combination provides fault sensing and location information over the complete expected fault range. Limiting the differential calculations to a range where the measured currents do not exceed 10 times the rated current of any CT in the system keeps the calculation within the linear range of the transformers.
For example, a 4,000 A bus with 4,000 A mains and tie would have over 40,000 A of fault current through either the main or the tie before the bus-differential system would be suspended. In a situation where a fault is below a 1,600 A feeder, fault current through the feeder must exceed 16,000 A for the bus-differential system to be disabled. In either or these situations, the current is large enough to engage the short-time (ST) pick-up of the circuit breakers in order to isolate the fault well and, to reach 10× for 1.5 cycles a forward fed fault from a significant source, not reverse-fed motor contribution, would be needed.
Method for Detection of Current Direction in Faulted Systems with Multiple Fault Current Sources: Relative Direction.
To address potential issues created by motor contribution or closed tie operation with multiple sources the zone-selective-interlocking system would need to identify relative fault current direction. Traditional implementations of zone selective operations are not able to do this. Sufficient identification of fault current direction can be achieved in the single processors system because faults currents can be compared to each other. Since the intent is to identify relative direction, the exact angle or magnitude is not used, and significant error can be accommodated without loss of key directional information. To address the problem of which side of the tie a fault is located a method similar to a partial differential calculation may be used. A partial differential calculation uses the mains and ties thereby minimizing cumulative error caused by many small current transformers associated with the feeders. Current direction may be defined as inward (+1) for current flowing towards the bus, or outward (−1) for current flowing away from the bus.
In the situation where a single feeder circuit breaker goes into short-time (ST) trip pick-up timing in addition to the main and ties the direction of that feeder's current can also be compared to the main's current direction and tie's current direction. If the current is determined as inward then the fault is in the bus. If the fault current in the feeder is opposite the current direction of the current in the main and tie then the fault is a through-fault fed by the feeder.
In case two feeders reach substantially simultaneous short-time (ST) pick-up timing both, may feeder currents be determined to be flowing in the same direction as the main and tie currents, i.e. inward; the situation indicates that the fault is in the bus. If one feeder current is flowing inward and the other feeder current is flowing outward then the fault is on the load side of the one feeder with current flowing opposite all other excessive currents.
The situation where two feeders are substantially simultaneously feeding separate faults on their load side is improbable. However, it would not result in a lack of tripping. The directional logic can identify that neither is flowing in the same inward direction as the main and tie and hence both feeders should trip.
The specific method used to determine current direction and circuit breaker trips, considers each zone a Partial Differential Zone (PDZ) using only ties and mains. Equation (1) is be used when any CB in the PDZ is identified as having current in excess of its short-time threshold.
Where Ir is the residual for the Partial Differential Zone, IM is the current for the main, IT is the current for the tie and DT is the reference direction unit vector for the tie. The reference unit vector is designated such that if the tie and main current flow towards the bus, equation (1) adds the two currents. The symbols p and q represent the number of mains and ties feeding the Partial Differential Zone, respectively. Ir is compared to a minimum threshold such as, for example, 1.5 times the largest CT in the zone (usually the main). When Ir exceeds this threshold the fault is in the zone or is fed by the zone.
In the case that one or more current readings exceed 10× their respective CTs, a test is performed to determine a large reference phasor for each phase current. Then, the other currents in short-time (ST) pick-up are compared to those large reference phasors for each phase current to determine relative direction.
In the case that the current readings are less than or is equal to 10× their respective CTs, a test is performed to determine a large reference phasor for each phase current. Then, the other currents in short-time (ST) pick-up are compared to those large reference phasors for each phase current to determine relative direction. The test uses the following equations (6) and (7):
The following relative current direction flow test can be performed for each of the breakers that evaluates to true. The test shall include breakers providing reference phases. First a difference of angles between the reference breaker and breaker under the test shall be calculated as follows:
Δθ=ang(I)*D−ang(IR)*DR (8)
Where, in equation (8) ang(I) and ang(IR) are angles of the faulty phase of breaker under the test and the reference phase respectively. Also in equation (8), where D and DR correspond to direction settings for the breaker under the test and the breaker of the reference phase respectively
For each phase, a reference current and angle is chosen, where −Iβ is the reference current and ang(Iβ) is the angle. Whether other fault currents for that phase in the Partial Differential Zone are the same is identified by first computing the angular difference between a faulted breaker in the zone and the reference faulted circuit breaker via equation (2) below. In equation (2), Iα is the phase current in the circuit being considered and Δθ is the angular difference.
Δθ=ang(Iα)−ang(Iβ) (2)
Equation (2) is calculated and once a reference phasor is found for each phase, the phasor for current in each phase of each breaker in the Partial Differential Zone that exceeds a defined current threshold is compared. The angular difference Δθ is checked evaluated to determine if the currents are flowing similarly, into the bus, where current flowing into the bus is defined as IN or INWARD and assigned a Boolean number 1 and current flowing out of the bus is defined as OUT or OUTWARD and assigned a Boolean number 0. The logic can handle significant angular error because the expected angular difference is 180° for opposing currents. If the angular difference is between ±60° from 180°, the currents are considered to be in opposite directions.
It should be noted however, that since this is a Partial Differential Zone system additional consideration is given to feeders in order to determine if the fault is in the zone or fed through the zone. To determine whether the fault is in the zone or fed through the zone, the current of feeders fed from the bus and that are in short-time pick-up, is considered. For example, if the current through the feeder is determined to exceed 10× (a value that is by design above potential motor contribution) then the fault is determined to be downstream of the feeder. If the current is in a range defined as below 10× and above the feeder's short-time pick-up then the direction of the feeder's fault current is determined to properly locate the fault. Values in the defined range yield reliable results. Note also that a reason for use of a partial differential zone (PDZ) is that the mains and feeders of the PDZ can have different ratings i.e. 5:1, 6:1, 20×Max; and the feeder breakers can have 100×Max rating. However, the feeder breakers at this rating would likely not read current accurately enough to determine direction.
As is explained above, to determine the relative direction of a feeder's fault current, the feeder fault current is compared to a reference phasor where the reference phase represents the IN current for the respective faulted Partial Differential Zone. The phasor representing each phase current for every faulted feeder fed by the faulted Partial Differential Zone is compared looking for a difference in direction that is in a range defined as between 180° and 60°. If a directional difference is determined and the difference is within the defined or predetermined range then the feeder is carrying current towards a downstream fault; however if the angular difference is outside of this range then the feeder is carrying motor contribution current towards the main bus. Once this comparison is made for the faulted feeders it can be determined if one feeder is feeding a fault in its zone of protection or if multiple feeders are carrying motor contribution current towards a bus fault.
Once the determination is made of what each CB in the zone is carrying, 1 the proper circuit breakers can be opened (tripped), (i.e. one main, a main and a tie, or several sources into a bus including motors). Proper back up circuit breakers can be identified and operated if backup suits the fault location, magnitude and system configuration at the time of the fault. This can be done in substantially the same time frame that a short-time calculation can be made for a single circuit breaker, as quickly as, for example, 1.5 cycles.
It should be noted that in an alternate embodiment of the present invention, multiple zones may be overlapped.
An example of tier matrix for tie breaker T1 in a power system as defined in
With respect to the overlapping zone configuration of
Each of outer tie breakers has a tier assignment matrix defined. The content of the table specifies the tier settings for exemplary possible system fault conditions for non-faulted zones that are adjacent to the faulted zone (zones that contain at least one outer tie). Specifying tier matrices for zones containing only outer ties is not needed since adjacent zones provide new tier values for those ties. The matrices defines reference breakers and deltas for conditions when tie breaker feeds current directly or indirectly into fault location. Each tie breaker has a maximum four different pairs of reference breakers and corresponding deltas. The number of reference breakers and corresponding deltas may be different for systems with smaller than 4 numbers of zones. Additional tier value are calculated based on the location of the fault (i.e. which zone the fault is within) and are equal to tier value of reference breaker for the faulted zone decremented by a delta value as can be determined by one of ordinary skill in the art.
Further with respect to the embodiment of
With respect to
Analysis based on relative direction of current in the source circuit breakers would yield inconclusive results. In the case of a fault on a main's line side the fault location, analysis based on relative direction of current in the source circuit breakers would be indeterminate; Neither the left nor the right bus would show the fault to be located therein. Both buses would show the tie and main with current flowing in opposite directions indicating a through-fault. See
In a single-processor-based system, present situation data may be compared to past situation data stored in the single-processor-based system. The present and past situation data provides for comparison of pre-fault voltage to pre and post-fault current after current in excess of the pick-up threshold is detected. This embodiment of the present invention compares a phase angle of fault current with the phase angle of pre-fault current, and detects a reverse current fault. A pre-fault voltage phasor maybe continuously calculated, updated and stored (whereby the prior value is discarded when it is updated (or thereafter). When current magnitude exceeding fault magnitude is exceeded, the voltage phasor from a predetermined number of prior cycles is used as a reference (i.e. 20 cycles). Reversal is indicated by an 180° shift, as well as additional lag the fault conditions might introduce. Post fault phase voltage is an unreliable source of reversal information as voltage may collapse considerably during fault conditions. In a case of substantially complete voltage collapse, the small remaining voltage would be the bus voltage (IR) drop that is in phase with current and hence would not yield phase difference information needed to make a determination of reverse current fault. For the above-explained reasons, the calculation implemented using equation (3) below is used to detect current reversal.
150°≦ang(I)−α≦250° (3)
With respect to equation (3), ang(I) is the angle of the positive-sequence current phasor and α is a pre-fault voltage positive-sequence phasor. The expected theoretical angle for a forward current is in the range of about 0° to 90° for a purely resistive to purely inductive current. A reversal in current adds 180° and ranges from about 180° to 270°. Practically, the forward angle may be in a range of about 0° to 60° for resistive to very inductive loads. A reversal of about 180° would cause the angle to shift to about 180° to 240°. The above method and equation identifies a fault shifting from load currents flowing at about 30° leading to about 70° lagging (−30°≦α≦70°). The pre-fault positive-frequency voltage phasor would be compensated for any mismatch between sampling rate and frequency. That compensation is ignored in the above formula for sake of simplicity; however compensation could be performed by one of ordinary skill in the art.
Equation (4) follows and may be performed on each phase current periodically to determine fault current.
(IRMS2)≧(PRC)2 (4)
With respect to equation (4), the reverse current pick-up equation, IRMS could be computed form ½ cycle of current samples for each phase and PRC is the reverse current protection setting chosen for the main circuit breaker being considered. Once it is determined that a current through the main has exceeded the pick-up threshold for reverse current pick-up, a series of calculations can be run comparing the angular relationship between pre-fault positive-sequence current and post fault positive-sequence current by referencing both to pre-fault positive-sequence voltage. If the current is determined to have reversed then the fault is ahead of that device. Since this reverse current setting need not be considered for forward current coordination analysis the pick-up level may be quite low and the delay only as long as required to make a reliable trip decision. Zone-selective-interlocking can provide back up levels of protection even in this reverse direction by reversing the hierarchy implemented for forward faults.
It should be noted that in this embodiment of the present invention, 1) the range of expected fault currents, CTs will be heavily saturated, leading to large differential errors; and 2) separate differential zones for each substation transformer are used to make the system trip properly.
We have re-visited the issues and have synthesized a function that will locate bus and reverse faults in paralleled double-ended systems in the face of CT saturation without requiring measurements of the substation transformer currents. The situation is depicted in
The embodiment of the system of the present invention is doubly fed by two substation transformers that are solidly grounded on the secondary side. All three breakers are closed. A problem situation is any type of solid fault at locations 1, 2, 3, 4, or 5 of
A workable method for these determinations is based upon the following observations (again, referencing
The method of an embodiment of the present invention incorporates the following steps:
Note that faults at certain points in the system=lead to conservative operation. To overcome conservative operation, two CTs for each breaker can be provided in an alternate embodiment; however, two CTs per breaker is costly. For example, consider a fault at location Rt5, the method will locate it as an internal fault to the left of the tie, with the result of tripping the TIE and one of the mains M1, M2 in a situation where simply tripping one of the mains M1, M2 (and not the TIE too) would have been enough.
The additional calculations for this method as follows. Besides the formulas for computing sequence components for voltage and current, two more equations are used to compute fault direction. First, there is a formula for deciding whether two currents are in the same or opposite direction. This can be done by taking the real part of the product of one of the currents times the complex conjugate of the current. If the real part is positive, the currents are approximately in the same direction. If the real part is negative, then the currents are approximately in the opposite direction. The formula is robust, and tolerates up to a ninety degree phase angle error between the two computed phasors.
For example, the relative direction test for the currents through the two main breakers is computed from their positive sequence phasor values in rectangular coordinates as follows in equation (9):
Real(Īmain1·Īmain2*)>0?
Īmain1=positive sequence current phasor through main 1
Īmain 2=positive sequence current phasor through main 2
* denotes complex conjugate
There is a similar test to determine whether an equivalent voltage drop attributed to a sequence current is in phase with the pre-fault positive sequence voltage. An additional step is to multiply the positive sequence fault current times an approximation to the complex impedance of the substation transformers. It is not necessary to use the correct magnitude of the impedance. Only the phase angle should be approximately correct, so an impedance with a magnitude of one could be used as follows in equation (10):
Real(Ītie·
Ītie=positive sequence current phasor though the tie
* denotes complex conjugate
The reason the pre-fault voltage is recommended rather than the actual bus voltage is that the pre-fault voltage gives a better direction indication, since it is in phase with the equivalent voltage on the primary sides of the substation transformers. Alternately, if primary voltages were available, we would use those values; however, they are not available. Hence, the pre-fault voltage provides enough accuracy for the calculation.
The use of sequence quantities rather than individual phase quantities simplifies the calculations and make the identification of fault type unnecessary. However, it is important to recognize and correct for phasor rotations that are introduced in the connections of the PTs. For example, if line-to-line voltage transformers are used, it may be necessary to rotate the computed bus voltage phasors by 60 degrees.
In an embodiment of the present invention, the system described in the patent reference disclosed supra., provides Reverse Fault function. This function is independent from the DZSI function. In an embodiment of the present invention, the Reverse Fault function is optioned per line-up basis; and there is one instance of this function per circuit breaker classified as a main breaker in the system. The intelligent electronic device (also referred to as a relay) executes a protection pass, i.e. every half cycle, every 8.333 ms for 60 Hz, and every 10.000 ms for 50 Hz system.
This protection function behaves in a similar way to the Short Time Over-current protection relay. Availability of the function is independent of a node's configuration. The Reverse Current Protection function of the IED or relay is capable of detecting a reverse current fault condition at various fault magnitudes.
The term Pick-up indicates that the current on one or more phases has reached or exceeded a threshold, or predetermined amount, for a given function. Since there are multiple fault cases, for example, −3-phase, single-phase, phase-to-neutral, positive-sequence current and voltage for the angle comparison can be used as may be determined by one of ordinary skill in the art.
For calculation of compensated pre-fault voltage phasor refer to section regarding pre-fault phasors, infra. The historical voltage phasor is the voltage phasor calculated at for example, n−40 half-cycles. Where n is the current data half-cycle that is used for calculation of current phasor. This effectively means that the relay will not operate for first, for example, 40 half cycles since the start of the system. Once all pre-fault data is populated, the relay will log a corresponding event indicating that from now on it is ready to perform protection task. Throughout the operation the relay will continue collecting pre-fault data, discarding the information for the oldest time slot with each protection pass. If the magnitude of the pre-fault voltage phasor, for example, is below 75% of nominal voltage, the phasor is considered invalid for the comparison and the second pickup condition is assumed as false. At that point, the relay does not go into pickup.
The angle between pre-fault voltage and fault current phasor is substantially continuously checked as long as the current level is above the pickup setting. If reverse condition is detected in any two out of three consecutive half-cycles, relay shall declare fault as a reverse fault and shall go into pickup. Once the relay is in pickup, it will continue heating the accumulator until the current falls below the dropout level. Dropout will not be function of pre-fault voltage and actual current angle. Once relay declares fault as a reverse current fault, event if relay drops out from pickup it will consider fault as a reverse until accumulator cools completely. This means that if current level goes above the pickup setting one more time after it was already below dropout level but before accumulator had a chance to cool, relay will not perform angle check to verify if the fault is a reverse fault. Instead, it will assume that the fault is the same fault as detected before and will go into pickup.
If a given main breaker is not in pickup, and the Reverse Current accumulator is equal to zero, the system will not modify the accumulator for that breaker. If a given main breaker is in pickup, then the system will “heat” the accumulator for that breaker. If a given main breaker is not in pickup, and the accumulator is not equal to zero, then the C/CPU will “cool” the accumulator for that breaker.
Reverse Current Protection relay will obtain frequency measurements from a known frequency method. For each voltage phasor taken, corresponding system frequency shall be obtained. Rotation adjustment can be performed by one of ordinary skill in the art. Compensation functions can be performed by one of ordinary skill in the art for values such as, for example phase angle offset.
Reverse Current Heating. The Reverse Current accumulator will increment or “heat” whenever the mean squared input current of at least one phase exceeds the Reverse Current pickup threshold regardless the result of current and voltage direction test.
The manner in which a Reverse Current accumulator will be updated depends upon the type of Reverse Current protection curve has been selected, and the value of I2RMS. The accumulator update can be determined by one of ordinary skill in the art.
When the Reverse Current function drops out of pickup, the Reverse Current accumulator will be decremented in a process called “cooling” to shorten any subsequent time to trip. The cooling time constant is fixed at for example 80 milliseconds. Other cooling constants may be determined by one of ordinary skill in the art.
Reverse current relay consists of two main building blocks. First one is very similar in functionality to Short Time protection element. It heats and cools the accumulator when current goes above pickup and drops below dropout level respectively. The relay however, is not declare to be going into and out of pickup. This decision is made only when the second part of the relay detects that current and voltage flow in opposite directions.
Second part of the relay is responsible of detecting which direction (downstream or upstream) fault current flows. If the second part of the relay does not detect current flow to be in reverse in relation to the voltage flow direction, even if the accumulator's level is greater or equal than trip threshold, the relay will not trip the breaker. In case that accumulator is above pickup level and current and voltage positive sequences are apart by a predetermined amount, the relay goes into pickup state. Once that happens relay is ready to trip a breaker whenever accumulator level reaches trip level.
Reverse Current pickup and trip time accuracy similar to other single point over-current protection relays'.
Most of the error budget is allocated to the sensors and the node electronics. There are two places where the C/CPU or system can affect accuracy, however. The first is the actual functions performed by the C/CPU or system. These equations or functions operate on fixed-point data and will not be a source of additional errors. The second way in which the C/CPU or system can affect metering accuracy is the timing on the broadcast synchronization messages to the nodes. If the broadcast messages are sent out at intervals that are significantly different than nominal (8.3333 milliseconds for 60 Hz, 10.0000 milliseconds for 50 Hz), the accuracy of the pickup calculation will be affected.
Relay will determine if system configured phase rotation corresponds to the actual. Relay will use positive sequence of voltage to complete this task. If calculated positive sequence is below 25% of nominal voltage value, relay will stop operating and a corresponding event shall be logged. Relay will start operating again as soon as positive sequence is again above 25% limit.
These comparisons plus appropriate error compensation, cooling and heating calculations can be used to provide quick reverse fault protection on any circuit breaker. This method is useful at main circuit breakers to detect reverse-fed fault current in parallel multiple-source systems or when substantial motor contribution can provide the required current to identify a fault.
Returning to Step S101 of
Based on this following set of solutions, available to the protection engineer, a zone-based protection system can be provided for multiple-source systems, or single source systems with large motor loads capable of substantial motor contribution or with multiple sources operating in parallel. The protection systems or subsystems operating substantially simultaneously are:
The instantaneous trip function is performed by any of several methods in which instantaneous tripping is obtained using digital trip apparatus and methods. If an instantaneous trip due to motor contribution to a bus fault or separate feeder fault is not desired then the instantaneous is set above the potential maximum motor contribution.
Short-time functions, including those for the circuit breaker operating substantially instantaneously can continue to function regardless of initiation of the instantaneous trip function as long as the system is designed and set to perform as stated. Such design can be performed by one of ordinary skill in the art.
The bus-differential function is performed independently of other functions and continues to function as long as a single current does not exceeded, for example, 10 times the rating of any CT within the zone. Bus-differential may be set significantly below the short-time pick-up level of any main or tie and offers the most sensitive fault protection by comparison to the other methods. Since bus-differential functions only for bus faults the setting is independent of other settings in the system that may be set for optimum selectivity or sustaining loads.
Reverse current protection at the main functions independently in the present embodiment and issues a trip signal to the proper circuit breaker when the reverse current equation or function is satisfied, including a medium voltage transformer main if provided. The same reverse current equation or function substantially simultaneously blocks action by the other short-time functions to prevent unnecessary nuisance tripping if other sources are able to continue to sustain load.
The functions of the present invention are able to reliably calculate fault information with as little as two half cycles of current data. The combination of the various functions operating substantially simultaneously can provide identification of fault location ahead, within and below a bus in a line up of switchgear with multiple sources and closed ties, regardless of motor contribution magnitude relative to the short-time settings of feeder circuit breakers. The minimum sensitivity of the bus-differential function allows faults below a bus' current rating to be located and the various short-time functions allow faults up to the short circuit rating of the equipment, if the circuit breakers allow it to be detected and located with 1 cycle of data.
Limitations in range of settings, circuits, and exact detection and clearing times depend on the specific implementation of the equations, functions and settings of embodiments of the present invention and described herein and the devices used to implement the embodiments of the present invention.
For example, the net effect of these implementation on 2500 kVA substation with a 4000 A main and tie, a 1600 A feeder and vacuum circuit breaker (CB) ahead of the transformer is shown on the time-current-curve in
The Time-Current-Curve (TCC) shows the following devices:
In addition the main CB is able to isolate the load side from any line side fault condition or if a parallel source is provided such as during a close transition transfer. This function would look like definite time function similar to how 87B is shown in
The calculated arc-flash currents downstream of the feeder are interrupted by a device operating substantially instantaneously, the main bus arcing-current is interrupted by devices operating at minimum time band yielding, for example, the following energy levels at 480V:
The above listed arc-flash energy values do not reflect the result of actual testing of these devices for arc-flash performance, which would generally result in lower incident energy values nor do they account for motor contribution decrement which could lower values further. The above listed arc-flash energy values are calculated; calculations of arc-flash energy can be performed by one of ordinary skill in the art.
This written description uses examples to disclose the invention, including the best mode, and also to enable any person skilled in the art to make and use the invention. The patentable scope of the invention is defined by the claims, and may include other examples that occur to those skilled in the art. Such other examples are intended to be within the scope of the claims if they have structural elements that do not differ from the literal language of the claims, or if they include equivalent structural elements with insubstantial differences from the literal languages of the claims.
