This application claims priority of Chinese Application No. 201210298679.8, filed on Aug. 17, 2012.
1. Field of the Invention
The invention relates to a driving device, more particularly to a driving device that is configured to drive a relay.
2. Description of the Related Art
In a conventional power converter structure (e.g., a power supply), an inrush current that occurs at the time when the power converter is activated has an undesirably large magnitude and thus is a common problem that needs to be addressed. Typically, a relay is used to suppress such inrush current. Specifically, when the power converter is activated, the relay is configured to direct the inrush current to a current suppresser such as a resistor, a thermistor or the like that is able to handle instantaneous large current. Therefore, the effect of the inrush current can be nullified. The relay is further configured to short-circuit the current suppressor after the inrush current has dissipated, allowing the power converter to operate normally for providing power.
However, the relay itself is an electrical component that consumes power during operation. Specifically, the relay needs a power to enter an activated state, and to stay in the activated state. It can be seen that when the relay is connected to the power converter, the power conversion efficiency of the power converter with the relay is reduced as compared with a power converter without the relay.
Some solutions have been proposed to alleviate reduction of the power conversion efficiency of the power converter resulting from inclusion of the relay. For example, the electrical components of the power converter and/or the relay can be replaced with ones configured for better performance. The circuitry arrangement of the power converter and/or the relay can be redesigned to achieve the similar effect. Nonetheless, the better performing electrical components can be somewhat costly, and redesign of circuitry arrangement is time-consuming.
Therefore, the object of the present invention is to provide a relay driving device that is able to reduce the power consumption of the relay, thereby increasing the power conversion efficiency of the power converter.
Accordingly, a relay driving device of the present invention is for driving a relay. The relay driving device comprises first and second power supply modules, a switching circuit, and a control module.
The first power supply module is for outputting a first voltage that has a magnitude sufficient to activate the relay. The second power supply module is for outputting a second voltage that has a magnitude lower than that of the first voltage and sufficient to maintain an activated state of the relay.
The switching circuit is coupled to the first and second power supply modules, and is to be coupled to the relay.
The control module is coupled to the switching circuit and is configured to control the switching circuit to connect the relay to the first power supply module and to disconnect the relay from the second power supply module so as to provide the first voltage to the relay for activating the relay. The control module is further configured to subsequently connect the relay to the second power supply module and to disconnect the relay from the first power supply module so as to provide the second voltage to the relay for maintaining the activated state of the relay.
Another object of the present invention is to provide a method for driving a relay. The method is to be implemented by a relay driving device electrically connected to the relay.
Accordingly, the method of this invention comprises the following steps of:
configuring the re lay driving device to output a first voltage to the relay, the first voltage having a magnitude that is sufficient to activate the relay; and
configuring the relay driving device to output a second voltage to the relay for maintaining an activated state of the relay, the second voltage having a magnitude lower than that of the first voltage.
Other features and advantages of the present invention will become apparent in the following detailed description of the preferred embodiment with reference to the accompanying drawings, of which:
As shown in
The relay driving device 100 comprises a first power supply module 10, a second power supply module 20, a switching circuit 30, and a control module 40.
The first power supply module 10 is for outputting a first voltage (Vo1) that has a magnitude sufficient to activate the relay 210. The second power supply module 20 is for outputting a second voltage (Vo2) that has a magnitude lower than that of the first voltage (Vo1) (i.e., not sufficient to activate the relay 210) and sufficient to maintain an activated state of the relay 210. It is noted that the magnitude of the second voltage (Vo2) is configured to be not less than a lowest excitation voltage of the relay 210.
The switching circuit 30 is coupled to the first and second power supply modules 10 and 20, and is to be coupled to the relay 210. In operation, the switching circuit 30 is configured to electrically interconnect one of the first and second power supply modules 10 and 20 to the relay 210. The switching circuit 30 can be implemented using mechanical components, or semiconductor components such as a metal-oxide-semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT), a diode, an insulated-gate bipolar transistor (IGBT), etc. The control module 40 is coupled to the switching circuit 30, and is for controlling operation of the same.
Referring to
In step S10, when the relay driving device 100 is activated at a time t0 (e.g., a power switch being pressed), the relay driving device 100 is configured to output the first voltage (Vo1) to the relay 210. To be more specific, at the time t0, a power-on signal (PS_ON) that is fed to the control module 40 switches from a high voltage level to a low voltage level, and the first and second power supply modules 10 and 20 respectively output the first and second voltages (Vo1) and (Vo2). The control module 40 receives the power-on signal (PS_ON) and accordingly outputs a control signal (Vd) to the switching circuit 30. In this embodiment, a low voltage level of the control signal (Vd) implies that the first power supply module 10 is electrically connected to the relay 210 through the switching circuit 30, and the second power supply module 20 is disconnected from the relay 210. As a result, the relay 210 is fed with the first voltage (Vo1) which has a magnitude sufficient to activate the relay 210.
Then, as shown in step S20, after the first voltage (Vo1) has been outputted for a predetermined time, the relay driving device 100 is configured to output the second voltage (Vo2) to the relay 210 at a time t1. Specifically, the control module 40 outputs the control signal (Vd) at a high voltage level. Thus, the first power supply module 10 is disconnected from the relay 210, and the second power supply module 20 is electrically connected to the relay 210 through the switching circuit 30. Subsequently, the second voltage (Vo2) is fed to the relay 210.
It is noted that, typically, the relay 210 requires to be fed with the first voltage (Vo1) for a certain time period to be activated. Since the magnitude of the second voltage (Vo2) is not sufficient to activate the relay 210, the predetermined time after which the relay driving device 100 outputs the second voltage (Vo2) must be longer than the aforesaid certain time period.
In brief, the relay driving device 100 that implements the aforesaid method is configured to first provide the first voltage (Vo1) to the relay 210, and to subsequently provide the second voltage (Vo2) to the relay 210. Since the magnitude of the second voltage (Vo2) is lower than that of the first voltage (Vo1), and is sufficient to maintain the relay 210 in the activated state, the operation of the relay 210 in turn consumes less power, resulting in a better power conversion efficiency for the power converter 200.
The following table illustrates experimental results of the power consumptions of the relay 210 when the power converter 200 is under different loadings (i.e. at 50% and 100%, respectively), in both cases where the relay 210 is operated individually, and where the relay driving device 100 is present. In both cases the first voltage (Vo1) is set at 12 volts, the second voltage (Vo2) is set at 5 volts, and the power converter 200 is configured to supply a 250-watt power.
As seen in table 1, the relay driving device 100 is able to reduce the power consumption of the relay 210 by a flat 0.256 watt. This power consumption reduction in turn increases the power conversion efficiency of the power converter 200.
The second power supply module 20 includes a voltage dividing capacitor (Cv), a Zener diode (ZD1) coupled across the voltage dividing capacitor (Cv), and a voltage dividing resistor electrically connected to the first power supply module 10. In this example, the second power supply module 20 is disposed to receive the first voltage (Vo1) from the first power supply module 10, and the second voltage (Vo2) is a divided voltage of the first voltage (Vo1), the divided voltage being across the voltage dividing capacitor (Cv) and the first Zener diode (ZD1).
The switching circuit 30 includes a switching transistor (Qs) for coupling the first power supply module 10 to the relay 210, and a switching diode (Ds) for coupling the second power supply module 20 to the relay 210. In this embodiment, the switching transistor (Qs) is a PNP bipolar junction transistor (BJT) having a base serving as a control terminal, an emitter serving as a first terminal, and a collector serving as a second terminal. The switching diode (Ds) has an anode electrically connected to the second power supply module 20, and a cathode to be electrically connected to the primary side of the relay 210.
The control module 40 of this embodiment includes a delay circuit 41, a first transistor (Q1), a first resistor (R1), a second transistor (Q2), a second resistor (R2), and a third resistor (R3).
In this example, the delay circuit 41 is an RC circuit, and includes a delay capacitor (Cd) and a delay resistor (Rd) connected in parallel to each other. The delay circuit 41 is for receiving the power-on signal (PS_ON) and is for outputting a delayed power-on signal.
Preferably, the first transistor (Q1) is an N-channel metal-oxide-semiconductor field effect transistor (N-MOSFET), and has a gate serving as a control terminal, a drain serving as a first terminal, and a source serving as a second terminal. The control terminal of the first transistor (Q1) is coupled to the delay circuit 41 to receive the delayed power-on signal therefrom. The second terminal of the first transistor (Q1) is grounded.
The first resistor (R1) interconnects electrically the first power supply module 10 and the first terminal of the first transistor (Q1).
The second transistor (Q2) is an NPN BJT, and has a base serving as a control terminal, a collector serving as a first terminal, and an emitter serving as a second terminal. The control terminal of the second transistor (Q2) is coupled to the first terminal of the first transistor (Q1). The second terminal of the second transistor (Q2) is grounded.
The second resistor (R2) interconnects electrically the control terminal of the switching transistor (Qs) and the first terminal of the second transistor (Q2). The third resistor (R3) is connected across the first terminal and the control terminal of the switching transistor (Qs).
In this example, when the power converter 200 is to be activated (e.g., by a user switching on the power converter 200), the power-on signal (PS_ON) is switched from the high voltage level to the low voltage level. The first power supply module 10 is configured to output the first voltage (Vo1) as a response, and the second power supply module 20 in turn is configured to output the second voltage (Vo2). The switching transistor (Qs) and the second transistor (Q2) conduct, and the switching diode (Ds) is reverse biased. As a result, only electrical current from the first power supply module 10 (Io1) is allowed to flow in the switching unit 30 (i.e., the current from the second power supply module 20 (Io2) is cut off). The first voltage (Vo1) is then fed to the relay 210 in order to activate the same.
The power-on signal (PS_ON) is simultaneously fed to the delay circuit 41 of the control module 40, and the delay circuit 41 is configured to output the delayed power-on signal to the control terminal of the first transistor (Q1), causing the same to conduct. The switching transistor (Qs) and the second transistor (Q2) are subsequently cut-off, and the switching diode (Ds) is forward biased. As a result, only electrical current from the second power supply module 20 (Io2) is allowed to flow in the switching unit 30 (i.e., the current from the first power supply module 10 (Io1) is cut off). Subsequently, the second voltage (Vo2) is fed to the relay 210 in order to maintain the activated state of the same.
It is noted that, in order to activate the relay 210, the first voltage (Vo1) must be fed to the relay 210 for a time period. That being said, the delay circuit 41 needs to output the delayed power-on signal after the time period has elapsed to ensure that the relay 210 is already in the activated state before switching to provide the second voltage (Vo2) to the relay 210. In this example, since the delay circuit 41 is an RC circuit, the delay circuit 41 must be configured to have a time constant larger than the time period.
The switching circuit 30 includes a first switching transistor (Qs1), a first switching diode (D1), a second switching diode (D2), and a second switching transistor (Qs2). The first and second switching diodes (D1) and (D2) are disposed such that the first and second power supply modules 10 and 20 are to be coupled to the relay through the first and second switching diodes (D1) and (D2), respectively.
In this embodiment, the first switching transistor (Qs1) is a PNP BJT, and has a base serving as a control terminal, an emitter serving as a first terminal, and a collector serving as a second terminal. The first terminal of the first switching transistor (Qs1) is coupled to the first power supply module 10.
The second switching transistor (Qs2) is a NPN BJT, and has abase serving as a control terminal, a collector serving as a first terminal, and an emitter serving as a second terminal. The first terminal of the second switching transistor (Qs2) is coupled to the second terminal of the first switching transistor (Qs1). The second terminal of the second switching transistor (Qs2) is coupled to the first switching diode (D1).
The control unit 40 includes a first transistor (Qa), a first resistor (Ra), a second transistor (Qb), a third transistor (Qc), a second resistor (Rb), a third resistor (Rc), a Zener diode (ZDa), and a fourth resistor (R4).
The first transistor (Qa) is an N-MOSFET in this example, and has a gate serving as a control terminal, a drain serving as a first terminal, and a source serving as a second terminal. The control terminal of the first transistor (Qa) is disposed to receive the power-on signal (PS_ON). The second terminal of the first transistor (Qa) is grounded.
The first resistor (Ra) interconnects electrically the first power supply module 10 and the first terminal of the first transistor (Qa).
The second transistor (Qb) is an N-MOSFET in this example, and has a gate serving as a control terminal, a drain serving as a first terminal, and a source serving as a second terminal. The first terminal of the second transistor (Qb) is coupled to the first terminal of the first transistor (Qa). The control terminal of the second transistor (Qb) is disposed to receive the delay signal (PGO). The second terminal of the second transistor (Qb) is grounded.
The third transistor (Qc) is a NPN BJT, and has a base serving as a control terminal, a collector serving as a first terminal, and an emitter serving as a second terminal. The control terminal of the third transistor (Qc) is coupled to the first terminal of the first transistor (Qa). The second terminal of the third transistor (Qc) is grounded.
The second resistor (Rb) interconnects electrically the control terminal of the first switching transistor (Qs1) and the first terminal of the third transistor (Qc). The third resistor (Rc) is connected across the first terminal and the control terminal of the first switching transistor (Qs1). The fourth resistor (R4) is connected across the first terminal and the control terminal of the second switching transistor (Qs2).
The operation of the relay driving device 100 according to the example shown in
After the predetermined delay time (between 100 to 500 milliseconds, in this example) has elapsed, the delay signal (PGO) is configured to switch to the high voltage level at the time t1. This in turn causes the second transistor (Qb) to conduct, cutting off the third transistor (Qc) and the first and second switching transistors (Qs1, Qs2), and the first diode (D1) is reverse biased. Subsequently, the second diode (D2) is forward biased, and the second voltage (Vo2) is then fed to the relay 210.
To sum up, a relay driving device 100 in accordance with the preferred embodiment is capable of reducing the overall power consumption of the relay 210. Additionally, the relay driving device 100 is a peripheral device that can be connected to the relay 210 instead of altering the circuitry arrangement of the same. The relay driving device 100 can be a relatively inexpensive alternative compared with replacing the electrical components of the relay 210 with ones of better quality.
While the present invention has been described in connection with what is considered the most practical and preferred embodiment, it is understood that this invention is not limited to the disclosed embodiment but is intended to cover various arrangements included within the spirit and scope of the broadest interpretation so as to encompass all such modifications and equivalent arrangements.
Number | Date | Country | Kind |
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201210298679.8 | Aug 2012 | CN | national |