Patent Application
20200077535
This application claims the benefit of India Provisional Application No. 201841033315 filed on Sep. 5, 2018, the entire content of which is incorporated herein by reference.
This disclosure generally relates to computer networks and, more particularly, expansion devices for shelves within network racks and cabinets of data center.
In a typical cloud-based data center, a large collection of interconnected servers provides computing and/or storage capacity for execution of various applications. For example, a data center may comprise a facility that hosts applications and services for subscribers, i.e., customers of the data center. The data center may, for example, host all of the infrastructure equipment, such as compute nodes, networking and storage systems, power systems and environmental control systems.
In most data centers, clusters of storage systems and application servers are interconnected via a high-speed switch fabric provided by one or more tiers of physical network switches and routers. Data centers vary greatly in size, with some public data centers containing hundreds of thousands of servers, and are usually distributed across multiple geographies for redundancy. A typical data center switch fabric includes multiple tiers of interconnected switches and routers. In current implementations, packets for a given packet flow between a source server and a destination server or storage system are always forwarded from the source to the destination along a single path through the routers and switches comprising the switching fabric.
In general, the disclosure describes an input/output (I/O) expansion device configured for slidable insertion within and removal from a plurality of slots (e.g., two) of a storage rack. The I/O expansion device operates as a multi-slot front caddy that is designed to extend an I/O interface of the storage rack so as to allow interconnection with storage and/or compute equipment external from the rack. Moreover, as described herein, using the multi-slot I/O expansion device, the external storage and/or compute nodes can be conveniently connected to an I/O interface via the front of the storage rack. In one example, the multi-slot caddy extends the I/O interface of a storage rack without requiring extra physical space or power but instead occupies the same space and utilizes the power otherwise allocated for front-loaded solid-state or hard disk drives typically inserted within the slots of the storage rack.
In one example, this disclosure describes a removable Input/Output (I/O) expansion device. The I/O expansion device is configured for slidable insertion within and removal from a plurality of slots of a storage rack that has an electrical backplane comprising a plurality of high-speed Peripheral Component Interconnect Express (PCIe) lanes. In some examples, the I/O expansion device comprises a front plate comprising an aggregate electrical storage connector mounted thereon. The aggregate electrical storage connector is configured to interface with one or more storage devices and computing devices. The I/O expansion device further includes a rear plate comprising a plurality of backplane electrical connectors mounted thereon. The plurality of backplane electrical connectors are configured to interface with the plurality of high-speed PCIe lanes of the electrical backplane of the storage rack. The I/O expansion device further includes interface circuitry mounted on a printed circuit board within the I/O expansion device and electrically coupled to the backplane electrical connectors of the rear plate and the aggregate electrical storage connector of the front plate. The interface circuitry of the I/O expansion device is configured to present, via the plurality of backplane electrical connectors, an aggregate bandwidth of the plurality of high-speed PCIe lanes to the one or more storage devices and computing devices interfaced with the aggregate electrical storage connector.
In another example, this disclosure describes a method of forming a removable I/O expansion device configured for slidable insertion within and removal from a plurality of slots of a storage rack having an electrical backplane. The electrical backplane comprises a plurality of high-speed Peripheral Component Interconnect Express (PCIe) lane. In some examples, the method includes forming a front plate comprising an aggregate electrical storage connector mounted thereon. The method further includes forming a rear plate comprising a plurality of backplane electrical connectors mounted thereon. Further, the method includes forming interface circuitry mounted on a printed circuit board within the I/O expansion device and electrically coupled to the backplane electrical connectors of the rear plate and the aggregate electrical storage connector of the front plate.
The details of one or more examples of the techniques of this disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the techniques will be apparent from the description and drawings, and from the claims.
Like reference characters refer to like elements throughout the figures and description.
In some examples, data center 10 may represent one of many geographically distributed network data centers. In the example of
In this example, data center 10 includes a set of storage nodes 12 and compute nodes 13 interconnected via a high-speed switch fabric 14. In some examples, storage nodes 12 and compute nodes 13 are arranged into multiple different groups, each including any number of nodes up to, for example, n storage nodes 121-12n and n compute nodes 131-13n (collectively, “storage nodes 12” and “compute nodes 13”). Storage nodes 12 and compute nodes 13 provide storage and computation facilities, respectively, for applications and data associated with customers 11 and may be physical (bare-metal) servers, virtual machines running on physical servers, virtualized containers running on physical servers, or combinations thereof.
In the example of
Although not shown, data center 10 may also include, for example, one or more non-edge switches, routers, hubs, gateways, security devices such as firewalls, intrusion detection, and/or intrusion prevention devices, servers, computer terminals, laptops, printers, databases, wireless mobile devices such as cellular phones or personal digital assistants, wireless access points, bridges, cable modems, application accelerators, or other network devices.
In the example of
In example implementations, DPUs 17 are configurable to operate in a standalone network appliance having one or more DPUs. For example, DPUs 17 may be arranged into multiple different DPU groups 19, each including any number of DPUs up to, for example, x DPUs 171-17x. As such, multiple DPUs 17 may be grouped (e.g., within a single electronic device or network appliance), referred to herein as a DPU group 19, for providing services to a group of servers supported by the set of DPUs internal to the device. In one example, a DPU group 19 may comprise four DPUs 17, each supporting four servers so as to support a group of sixteen servers.
In the example of
As one example, each DPU group 19 of multiple DPUs 17 may be configured as standalone network device, and may be implemented as a two rack unit (2RU) device that occupies two rack units (e.g., slots) of an equipment rack. In another example, DPU 17 may be integrated within a server, such as a single 1RU server in which four CPUs are coupled to the forwarding ASICs described herein on a mother board deployed within a common computing device. In yet another example, one or more of DPUs 17, storage nodes 12, and compute nodes 13 may be integrated in a suitable size (e.g., 10RU) frame that may, in such an example, become a network storage compute unit (NSCU) for data center 10. For example, a DPU 17 may be integrated within a mother board of a storage node 12 or a compute node 13 or otherwise co-located with a server in a single chassis.
In some example implementations, DPUs 17 interface and utilize switch fabric 14 so as to provide full mesh (any-to-any) interconnectivity such that any of storage nodes 12 or compute nodes 13 may communicate packet data for a given packet flow to any other of the servers using any of a number of parallel data paths within the data center 10. For example, in some example network architectures, DPUs spray individual packets for packet flows between the DPUs and across some or all of the multiple parallel data paths in the data center switch fabric 14 and reorder the packets for delivery to the destinations so as to provide full mesh connectivity.
In this way, DPUs 17 interface and utilize switch fabric 14 so as to provide full mesh (any-to-any) interconnectivity such that any of storage nodes 12 or compute nodes 13 may communicate packet data for a given packet flow to any other of the servers using any of a number of parallel data paths within the data center 10. For example, in some example network architectures, DPUs spray individual packets for packet flows between the DPUs and across some or all of the multiple parallel data paths in the data center switch fabric 14 and reorder the packets for delivery to the destinations so as to provide full mesh connectivity.
As described herein, a data transmission protocol referred to as a Fabric Control Protocol (FCP) may be used by the different operational networking components of any of DPUs 17 to facilitate communication of data across switch fabric 14. As further described, FCP is an end-to-end admission control protocol in which, in one example, a sender explicitly requests a receiver with the intention to transfer a certain number of bytes of payload data. In response, the receiver issues a grant based on its buffer resources, QoS, and/or a measure of fabric congestion. In general, FCP enables spray of packets of a flow to all paths between a source and a destination node, and may provide numerous advantages, including resilience against request/grant packet loss, adaptive and low latency fabric implementations, fault recovery, reduced or minimal protocol overhead cost, support for unsolicited packet transfer, support for FCP capable/incapable nodes to coexist, flow-aware fair bandwidth distribution, transmit buffer management through adaptive request window scaling, receive buffer occupancy based grant management, improved end to end QoS, security through encryption and end to end authentication and/or improved ECN marking support. More details on the FCP are available in U.S. Provisional Patent Application No. 62/566,060, filed Sep. 29, 2017, entitled “Fabric Control Protocol for Data Center Networks with Packet Spraying Over Multiple Alternate Data Paths,” the entire content of which is incorporated herein by reference.
The use of FCP may provide certain advantages. For example, the use of FCP may increase significantly the bandwidth utilization of the underlying switch fabric 14. Moreover, in example implementations described herein, the servers of the data center may have full mesh interconnectivity and may nevertheless be non-blocking and drop-free.
Although DPUs 17 are described in
In accordance with the techniques of the disclosure, an I/O expansion device is disclosed that is configured for slidable insertion within and removal from a plurality of slots (e.g., two) of a storage rack of data center 10. As described in further detail below, the I/O expansion device operates as a multi-slot front caddy that is designed to extend an I/O interface of the storage rack so as to allow interconnection between DPUs 17 and storage nodes 12 and/or compute nodes 13 external from the rack. Moreover, as described herein, using the multi-slot I/O expansion device, the external storage nodes 12 and/or compute nodes 13 can be conveniently connected to an I/O interface via the front of the storage rack. In one example, the multi-slot caddy extends the I/O interface of a storage rack without requiring extra physical space or power but instead occupies the same space and utilizes the power otherwise allocated for front-loaded solid-state or hard disk drives typically inserted within the slots of the storage rack.
In the illustrated example of
In this example, DPU 17 represents a high performance, hyper-converged network, storage, and data processor and input/output hub. Cores 140 may comprise one or more of MIPS (microprocessor without interlocked pipeline stages) cores, ARM (advanced RISC (reduced instruction set computing) machine) cores, PowerPC (performance optimization with enhanced RISC—performance computing) cores, RISC-V (RISC five) cores, or CISC (complex instruction set computing or x86) cores. Each of cores 140 may be programmed to process one or more events or activities related to a given data packet such as, for example, a networking packet or a storage packet. Each of cores 140 may be programmable using a high-level programming language, e.g., C, C++, or the like.
As described herein, the new processing architecture utilizing a DPU may be especially efficient for stream processing applications and environments. For example, stream processing is a type of data processing architecture well suited for high performance and high efficiency processing. A stream is defined as an ordered, unidirectional sequence of computational objects that can be of unbounded or undetermined length. In a simple embodiment, a stream originates in a producer and terminates at a consumer, and is operated on sequentially. In some embodiments, a stream can be defined as a sequence of stream fragments; each stream fragment including a memory block contiguously addressable in physical address space, an offset into that block, and a valid length. Streams can be discrete, such as a sequence of packets received from the network, or continuous, such as a stream of bytes read from a storage device. A stream of one type may be transformed into another type as a result of processing. For example, TCP receive (Rx) processing consumes segments (fragments) to produce an ordered byte stream. The reverse processing is performed in the transmit (Tx) direction. Independently of the stream type, stream manipulation requires efficient fragment manipulation, where a fragment is as defined above.
In some examples, the plurality of cores 140 may be capable of processing a plurality of events related to each data packet of one or more data packets, received by networking unit 142 and/or PCIe interfaces 146, in a sequential manner using one or more “work units.” In general, work units are sets of data exchanged between cores 140 and networking unit 142 and/or PCIe interfaces 146 where each work unit may represent one or more of the events related to a given data packet of a stream. As one example, a Work Unit (WU) is a container that is associated with a stream state and used to describe (i.e. point to) data within a stream (stored). For example, work units may dynamically originate within a peripheral unit coupled to the multi-processor system (e.g. injected by a networking unit, a host unit, or a solid state drive interface), or within a processor itself, in association with one or more streams of data, and terminate at another peripheral unit or another processor of the system. The work unit is associated with an amount of work that is relevant to the entity executing the work unit for processing a respective portion of a stream. In some examples, one or more processing cores of a DPU may be configured to execute program instructions using a work unit (WU) stack.
In some examples, in processing the plurality of events related to each data packet, a first one of the plurality of cores 140, e.g., core 140A may process a first event of the plurality of events. Moreover, first core 140A may provide to a second one of plurality of cores 140, e.g., core 140B a first work unit of the one or more work units. Furthermore, second core 140B may process a second event of the plurality of events in response to receiving the first work unit from first core 140B.
DPU 17 may act as a combination of a switch/router and a number of network interface cards. For example, networking unit 142 may be configured to receive one or more data packets from and transmit one or more data packets to one or more external devices, e.g., network devices. Networking unit 142 may perform network interface card functionality, packet switching, and the like, and may use large forwarding tables and offer programmability. Networking unit 142 may expose Ethernet ports for connectivity to a network, such as network 7 of
Memory controller 144 may control access to memory unit 134 by cores 140, networking unit 142, and any number of external devices, e.g., network devices, servers, external storage devices, or the like. Memory controller 144 may be configured to perform a number of operations to perform memory management in accordance with the present disclosure. For example, memory controller 144 may be capable of mapping accesses from one of the cores 140 to either of coherent cache memory 136 or non-coherent buffer memory 138. In some examples, memory controller 144 may map the accesses based on one or more of an address range, an instruction or an operation code within the instruction, a special access, or a combination thereof.
Additional details regarding the operation and advantages of the DPU are available in U.S. patent application Ser. No. 16/031,921, filed Jul. 10, 2018, and titled “DATA PROCESSING UNIT FOR COMPUTE NODES AND STORAGE NODES,” (Attorney Docket No. 1242-004US01) and U.S. patent application Ser. No. 16/031,676, filed Jul. 10, 2018, and titled “ACCESS NODE FOR DATA CENTERS” (Attorney Docket No. 1242-005US01), the entire content of each of which is incorporated herein by reference.
In accordance with the techniques of the disclosure, an I/O expansion device is disclosed that is configured for slidable insertion within and removal from a plurality of slots (e.g., two) of a storage rack of data center 10. As described in further detail below, the I/O expansion device operates as a multi-slot front caddy that is designed to extend an I/O interface of the storage rack so as to allow interconnection between DPUs 17 and storage nodes 12 and/or compute nodes 13 external from the rack. With respect to the example of
Although DPU group 19 is illustrated in
In one example implementation, DPUs 17 within DPU group 19 connect to node groups 52 and solid state storage 41 using Peripheral Component Interconnect express (PCIe) links 48, 50, and connect to other DPUs and the datacenter switch fabric 14 using Ethernet links 42, 44, 46. For example, each of DPUs 17 may support six high-speed Ethernet connections, including two externally-available Ethernet connections 42 for communicating with the switch fabric, one externally-available Ethernet connection 44 for communicating with other DPUs in other DPU groups, and three internal Ethernet connections 46 for communicating with other DPUs 17 in the same DPU group 19. In one example, each of externally-available connections 42 may be a 100 Gigabit Ethernet (GE) connection. In this example, DPU group 19 has 8×100 GE externally-available ports to connect to the switch fabric 14.
Within DPU group 19, connections 42 may be copper, i.e., electrical, links arranged as 8×25 GE links between each of DPUs 17 and optical ports of DPU group 19. Between DPU group 19 and the switch fabric, connections 42 may be optical Ethernet connections coupled to the optical ports of DPU group 19. The optical Ethernet connections may connect to one or more optical devices within the switch fabric, e.g., optical permutation devices described in more detail below. The optical Ethernet connections may support more bandwidth than electrical connections without increasing the number of cables in the switch fabric. For example, each optical cable coupled to DPU group 19 may carry 4×100 GE optical fibers with each fiber carrying optical signals at four different wavelengths or lambdas. In other examples, the externally-available connections 42 may remain as electrical Ethernet connections to the switch fabric.
The four remaining Ethernet connections supported by each of DPUs 17 include one Ethernet connection 44 for communication with other DPUs within other DPU groups, and three Ethernet connections 46 for communication with the other three DPUs within the same DPU group 19. In some examples, connections 44 may be referred to as “inter-DPU group links” and connections 46 may be referred to as “intra-DPU group links.”
Ethernet connections 44, 46 provide full-mesh connectivity between DPUs within a given structural unit. In one example, such a structural unit may be referred to herein as a logical rack (e.g., a half-rack or a half physical rack) that includes two NSCUs 40 having two AGNs 19 and supports an 8-way mesh of eight DPUs 17 for those AGNs. In this particular example, connections 46 would provide full-mesh connectivity between the four DPUs 17 within the same DPU group 19, and connections 44 would provide full-mesh connectivity between each of DPUs 17 and four other DPUs within one other DPU group of the logical rack (i.e., structural unit). In addition, DPU group 19 may have enough, e.g., sixteen, externally-available Ethernet ports to connect to the four DPUs in the other DPU group.
In the case of an 8-way mesh of DPUs, i.e., a logical rack of two NSCUs 40, each of DPUs 17 may be connected to each of the other seven DPUs by a 50 GE connection. For example, each of connections 46 between the four DPUs 17 within the same DPU group 19 may be a 50 GE connection arranged as 2×25 GE links. Each of connections 44 between the four DPUs 17 and the four DPUs in the other DPU group may include four 50 GE links. In some examples, each of the four 50 GE links may be arranged as 2×25 GE links such that each of connections 44 includes 8×25 GE links to the other DPUs in the other DPU group.
In another example, Ethernet connections 44, 46 provide full-mesh connectivity between DPUs within a given structural unit that is a full-rack or a full physical rack that includes four NSCUs 40 having four AGNs 19 and supports a 16-way mesh of DPUs 17 for those AGNs. In this example, connections 46 provide full-mesh connectivity between the four DPUs 17 within the same DPU group 19, and connections 44 provide full-mesh connectivity between each of DPUs 17 and twelve other DPUs within three other DPU group. In addition, DPU group 19 may have enough, e.g., forty-eight, externally-available Ethernet ports to connect to the four DPUs in the other DPU group.
In the case of a 16-way mesh of DPUs, each of DPUs 17 may be connected to each of the other fifteen DPUs by a 25 GE connection, for example. In other words, in this example, each of connections 46 between the four DPUs 17 within the same DPU group 19 may be a single 25 GE link. Each of connections 44 between the four DPUs 17 and the twelve other DPUs in the three other DPU groups may include 12×25 GE links.
As shown in
In one example, solid state storage 41 may include twenty-four SSD devices with six SSD devices for each of DPUs 17. The twenty-four SSD devices may be arranged in four rows of six SSD devices with each row of SSD devices being connected to one of DPUs 17. Each of the SSD devices may provide up to 16 Terabytes (TB) of storage for a total of 384 TB per DPU group 19. As described in more detail below, in some cases, a physical rack may include four DPU groups 19 and their supported node groups 52. In that case, a typical physical rack may support approximately 1.5 Petabytes (PB) of local solid state storage. In another example, solid state storage 41 may include up to 32 U.2×4 SSD devices. In other examples, NSCU 40 may support other SSD devices, e.g., 2.5″ Serial ATA (SATA) SSDs, mini-SATA (mSATA) SSDs, M.2 SSDs, and the like.
In the above described example in which each of the DPUs 17 is included on an individual DPU sled with local storage for the DPU, each of the DPU sleds may include four SSD devices and some additional storage that may be hard drive or solid state drive devices. In this example, the four SSD devices and the additional storage may provide approximately the same amount of storage per DPU as the six SSD devices described in the previous example.
In one example, each of DPUs 17 supports a total of 96 PCIe lanes. In this example, each of connections 48 may be an 8×4-lane PCI Gen 3.0 connection via which each of DPUs 17 may communicate with up to eight SSD devices within solid state storage 41. In addition, each of connections 50 between a given DPU 17 and the four storage nodes 12 and/or compute nodes 13 within the node group 52 supported by the DPU 17 may be a 4×16-lane PCIe Gen 3.0 connection. In this example, DPU group 19 has a total of 256 external facing PCIe links that interface with node groups 52. In some scenarios, DPUs 17 may support redundant server connectivity such that each of DPUs 17 connects to eight storage nodes 12 and/or compute nodes 13 within two different node groups 52 using an 8×8-lane PCIe Gen 3.0 connection.
In another example, each of DPUs 17 supports a total of 64 PCIe lanes. In this example, each of connections 48 may be an 8×4-lane PCI Gen 3.0 connection via which each of DPUs 17 may communicate with up to eight SSD devices within solid state storage 41. In addition, each of connections 50 between a given DPU 17 and the four storage nodes 12 and/or compute nodes 13 within the node group 52 supported by the DPU 17 may be a 4×8-lane PCIe Gen 4.0 connection. In this example, DPU group 19 has a total of 128 external facing PCIe links that interface with node groups 52.
In accordance with the techniques of the disclosure, an I/O expansion device is disclosed that is configured for slidable insertion within and removal from a plurality of slots (e.g., two) of a storage rack of data center 10. As described in further detail below, the I/O expansion device operates as a multi-slot front caddy that is designed to extend an I/O interface of the storage rack so as to allow interconnection between DPUs 17 and storage nodes 12 and/or compute nodes 13 external from the rack. With respect to the example of
In the illustrated example, rack 70 includes four DPU groups 191-194 that are each separate network appliances 2RU in height. Each of the DPU groups 19 includes four DPUs and may be configured as shown in the example of
Further, rack 70 includes a plurality of storage trays 26. Each storage tray 26 includes an electrical backplane configured to provide an interface between DPU 17 and one or more storage nodes 12 and compute nodes 13. Further, each storage tray 26 may provide power and physical support to one or more storage nodes 12 and compute nodes 13.
In this example, each of the DPU groups 19 supports sixteen storage nodes and/or compute nodes. For example, DPU group 191 supports storage nodes A1-A16, DPU group 192 supports compute nodes B1-B16, DPU group 193 supports compute nodes C1-C8 and storage nodes C9-C16, and DPU group 194 supports storage nodes D1, D3, D6-D12 and compute nodes D2, D4, D5, and D13-D16. Each storage node or compute node may be a dual-socket or dual-processor server sled that is ½ Rack in width and 1RU in height. In some examples, four of the storage nodes or compute nodes may be arranged into a node group 52 that is 2RU in height. For example, node group 52A includes storage nodes A1-A4, node group 52B includes storage nodes A5-A8, node group 52C includes storage nodes A9-A12, and storage group 52D includes storage nodes A13-A16. Nodes B1-B16, C1-C16, and D1-D16 may be similarly arranged into node groups 52.
DPU groups 19 and node groups 52 are arranged into NSCUs 40 from
NSCUs 40 may be arranged into logical racks 60, i.e., half physical racks. Logical racks 60 are 20RU in height and each include two NSCUs 40 having full mesh connectivity. In the illustrated example of
Logical racks 60 within rack 70 may be connected to the switch fabric directly or through an intermediate top of rack device 72. As noted above, in one example, TOR device 72 comprises a top of rack Ethernet switch. In other examples, TOR device 72 comprises an optical permutor that transports optical signals between DPUs 17 and core switches 22 and that is configured such that optical communications are “permuted” based on wavelength so as to provide full-mesh connectivity between the upstream and downstream ports without any optical interference.
In the illustrated example, each of the DPU groups 19 may connect to TOR device 72 via one or more of the 8×100 GE links supported by the DPU group to reach the switch fabric. In one case, the two logical racks 60 within rack 70 may each connect to one or more ports of TOR device 72, and TOR device 72 may also receive signals from one or more logical racks within neighboring physical racks. In other examples, rack 70 may not itself include TOR device 72, but instead logical racks 60 may connect to one or more TOR devices included in one or more neighboring physical racks.
For a standard rack size of 40RU it may be desirable to stay within a typical power limit, such as a 15 kilowatt (kW) power limit. In the example of rack 70, not taking the additional 2RU TOR device 72 into consideration, it may be possible to readily stay within or near the 15 kW power limit even with the sixty-four storage nodes and compute nodes and the four DPU groups. For example, each of the DPU groups 19 may use approximately 1 kW of power resulting in approximately 4 kW of power for DPU groups. In addition, each of the storage nodes and compute nodes may use approximately 200 W of power resulting in around 12.8 kW of power for node groups 52. In this example, the 40RU arrangement of DPU groups 19 and node groups 52, therefore, uses around 16.8 kW of power.
In accordance with the techniques of the disclosure, an I/O expansion device is disclosed that is configured for slidable insertion within and removal from a plurality of slots (e.g., two) of a storage tray 26 of storage rack 70. As described in further detail below, the I/O expansion device operates as a multi-slot front caddy that is designed to extend an I/O interface of the storage tray 26 of storage rack 70 so as to allow interconnection between DPUs 17 and storage nodes 12 and/or compute nodes 13 external from the storage tray 26. With respect to the example of
Moreover, as described herein, using the multi-slot I/O expansion device, the external storage nodes 12 and/or compute nodes 13 can be conveniently connected to one or more interfaces of the storage tray via the front of the storage tray 26. In one example, the multi-slot caddy extends the one or more interfaces of the storage tray without requiring extra physical space or power but instead occupies the same space and utilizes the power otherwise allocated for front-loaded solid-state or hard disk drives typically inserted within the slots of the storage rack.
In some examples, storage tray 26 includes a combination of one or more removable storage devices 22 and one or more I/O expansion devices 24. In further examples, storage tray 26 includes only storage devices 22. In still further examples, storage tray 26 includes only removeable expansion devices 24. Storage tray 26 provides a plurality of slots for mechanically seating and supporting storage devices 22 and removeable expansion devices 24.
Storage tray 26 further provides an electrical backplane comprising a plurality of interfaces for electrically interfacing with each of storage devices 22 and removeable expansion devices 24. In one example, the electrical backplane comprises a plurality of PCIe connectors that interface with each of storage devices 22 and removeable expansion devices 24 to connect storage devices 22 and removeable expansion devices 24 to one or more high-speed PCIe lanes.
Storage devices 22 may be one or more storage media for data storage. In some examples, each storage device 22 is a solid-state drive (SSD) storage device. In some examples, each storage device 22 is a 3.5″ drive that conforms to SFF-8300 and SFF-8301 as incorporated into the EIA-740 specification by the Electronic Industries Association (EIA). In some examples, storage device 22 comprises flash memory. Each of storage devices 22 comprises a rear plate including an electrical connector mounted thereon for interfacing with the backplane of storage tray 26. In some examples, the electrical connector comprises a single SFF-8639 (U.2) form factor connector. In some examples, the electrical connector interfaces with up to four PCIe lanes of the electrical backplane.
In accordance with the techniques of the disclosure, removeable expansion devices 24 are described. Removeable expansion devices 24 is configured to insert within a plurality of slots of storage tray 26. In other words, each of I/O expansion device 24 is a multi-slot device that occupies multiple slots of the storage tray 26. As shown, each of I/O expansion device 24 operates as a multi-slot front caddy that is designed to extend an I/O interface of the storage tray 26 so as to allow interconnection with storage and/or compute equipment external from the rack. Moreover, as described herein, using one or more of multi-slot I/O expansion device 24, external storage and/or compute nodes can be conveniently connected via the front of the storage tray 26. In one example, each multi-slot I/O expansion device 24 extends the I/O interface of storage rack 24 without requiring extra physical space or power but instead occupies the same space and utilizes power otherwise allocated to the slots for front-loaded solid-state or hard disk drives typically inserted within the storage rack.
In the example of
In some examples, removeable expansion devices 24 provide an innovative system package that provides high level of fungibility, composability, and expandability for interconnecting with storage nodes 121-122 and compute nodes 131-132.
A generic piece of data center storage equipment, such as storage tray 26, typically has a plurality of storage bays accessible via a front plate of the storage tray 26. Each storage bay is configured for insertion of a storage device 22. Further, each storage bay includes an internal electrical backplane interface that is configured to interface with an interface mounted on a rear plate of storage device 22. Designers and customers may desire to maximize the storage capacity of a system while requiring easy accessibility, expandability, and fungibility.
In a typical implementation of tray 26, storage devices 22 communicate to a storage controller or other device, such as DPU 17, via an internal backplane of tray 26 using rear-facing connectors implementing Serial Attached Small Computer System Interface (SCSI) (SAS), Serial Advanced Technology Attachment (SATA), or PCIe. Storage devices 22 generally operate as endpoints on the serial interface so as to terminate the serial interface locally. Thus, the storage scale of an individual storage tray 26 is typically limited to the available slots in storage tray 26 for receiving storage drives of standard format. This limits the expandability, fungibility, and composability of storage tray 26. The restriction of being limited to devices insertable within the slots may force customers to buy additional equipment to install additional components, even though the full bandwidth and/or throughput of an additional storage tray 26 is not used to full capacity (because each storage tray 26 may not be available in suitable incremental sizes). Further, purchasing additional equipment adds to the equipment cost and operational cost of the data center. Today's products are typically constrained to fixed local spaces when supporting a plurality of types of storage and/or compute devices, and may provide additional limits on the flexibility of storage tray 26.
Accordingly, a removeable expansion device, such as removeable expansion devices 24, is described that eliminates this limitation and allows customers to have huge fungibility, composability, and expandability in terms of capacity and also in terms of the use of a plurality of simultaneously-supported interfaces in desired incremental steps or capacities.
In some examples, each expansion device 24 is a multi-slot (e.g., dual-slot) front caddy that is specially designed to extend the interface out of the box to interconnect other external storage nodes 12 and/or compute nodes 13. Moreover, as described, this may be implemented in a way that does not require extra space or power, for example, and using the same form factor requirements as that of front-loaded U.2 solid state drives (SSDs) and/or hard disk drives (HDDs). Such a expansion device 24 allows a customer to implement a mixture of high-performance local storage and medium-performance scaleable storage by extending the reach of an interface of storage tray 26 to external equipment. Such techniques make storage tray 26 highly customizable across different types scales of storage nodes 12 and/or compute nodes 13. As an example, in a 24-slot storage system such as serer tray 26 of
Expansion device 24 provides a solution for scale-out of storage and compute functions to customers of data center 10. For example, a customer may use expansion device 24 to connect a DPU 17 of a DPU group 19 of existing equipment to additional lower-cost equipment so as to increase storage density and to enable storage tiering. For example, a customer may have some high performance Non-Volatile Memory Express (NVMe) SSDs as caches within storage tray 26 and have expansion devices 24 provide simultaneous connectivity to external, low-cost, warm-storage HDDs or other low-cost flash solutions. Thus, expansion devices 24 enable the highly efficient deployment of Host Controller Interface (HCl) stacks or fungible and composable infrastructure.
In some examples, in a fungible or composable architecture, expansion device 24 provides hooks for detecting and identifying an external interface of an external device, such as storage nodes 12 or compute nodes 13, interfaced with expansion device 24. Expansion device 24 may configure a DPU 17 with the identified external interface. Further, Expansion device 24 may manage hot insertion and removal of external devices according to such external interfaces.
I/O expansion devices 24 is configured for slidable insertion within and removal from a plurality of slots of storage tray 26. In some examples, expansion devices 24 includes one or more rails 88 configured to slideably engage storage tray 26 and position expansion devices 24 within one or more slots of storage tray 26.
Expansion device 24 includes front plate 84 comprising aggregate electrical storage connector 80 mounted thereon. Aggregate electrical storage connector 80 is configured to expose a front-facing electrical interface for connecting to one or more storage devices and computing devices, such as storage devices 12 and compute nodes 13 of
In accordance with the techniques of the disclosure, expansion device 26 is configured to present, via backplane electrical connectors 90, an aggregate bandwidth of the plurality of high-speed PCIe lanes of the electrical backplane to storage devices 12 and computing devices 13 interfaced with aggregate electrical storage connector 80. In some examples, backplane electrical connectors 90 comprise 2 PCIe x4 interfaces. In some examples, aggregate electrical storage connector 80 interfaces with compute devices 13 via the PCIe protocol. In some examples, aggregate electrical storage connector 80 comprises 8 PCIe x1 interfaces.
In some examples, expansion device 26 includes interface circuitry mounted on a printed circuit board within expansion device 26 and electrically coupled to backplane electrical connectors 90 of the rear plate and aggregate electrical storage connector 80 of the front plate. In some examples, backplane electrical connectors 90 are configured to interface with the plurality of high-speed PCIe lanes of the electrical backplane of storage tray 26 according to a PCIe protocol. Aggregate electrical storage connector interface with the one or more storage nodes 12 and computing nodes 13 according to the PCIe protocol. In this example, the interface circuitry comprises one or more of an electrical buffer and an electrical aggregator. The interface circuitry is configured to receive, from storage nodes 12 and computing nodes 13 and via aggregate electrical storage connector 80, first data according to the PCIe protocol and output, to the plurality of high-speed PCIe lanes of the electrical backplane of storage tray 26 and via plurality of backplane electrical connectors 90, the first data according to the PCIe protocol. Further, the interface circuitry is configured to receive, from the plurality of high-speed PCIe lanes of the electrical backplane of server 26 and via plurality of backplane electrical connectors 90, second data according to the PCIe protocol and output, to storage nodes 12 and computing nodes 13 and via aggregate electrical storage connector 80, second data according to the PCIe protocol.
In some examples, aggregate electrical storage connector 80 interfaces with storage devices 12 via an interface storage protocol that is different from the PCIe protocol. In such an example, the interface circuitry of expansion device 24 includes interface conversion circuitry configured to receive data from the electrical backplane of server 26 via the PCIe protocol and output data to external devices according to the interface storage protocol. Further, the interface conversion circuitry is configured to receive data from the external devices according to the interface storage protocol and output data to the electrical backplane of serer 26 via the PCIe protocol.
In one example, expansion device 26 is configured to receive, from one or more storage devices 12 and computing devices 13 and via aggregate electrical storage connector 80, first data according to the interface storage protocol that is different from the PCIe protocol and output, to the plurality of high-speed PCIe lanes of the electrical backplane and via backplane electrical connectors 90, the first data according to the PCIe protocol. Further, expansion device 26 is configured to receive, from the plurality of high-speed PCIe lanes of the electrical backplane and via backplane electrical connectors 90, second data according to the PCIe protocol and output, to one or more storage devices 12 and computing devices 13 and via aggregate electrical storage connector 80, the second data according to the interface storage protocol that is different from the PCIe protocol.
For example, aggregate electrical storage connector 80 interfaces with storage devices 12 via SAS protocol, and aggregate electrical storage connector 80 comprises a plurality of SAS connectors. In some examples, aggregate electrical storage connector 80 comprises 8 SAS connectors. In another example, aggregate electrical storage connector 80 interfaces with storage devices 12 via SATA protocol, and aggregate electrical storage connector 80 comprises a plurality of SATA connectors. In some examples, aggregate electrical storage connector 80 comprises 8 SATA connectors.
The techniques described in this disclosure may be implemented, at least in part, in hardware, software, firmware or any combination thereof. For example, various aspects of the described techniques may be implemented within one or more processors, including one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or any other equivalent integrated or discrete logic circuitry, as well as any combinations of such components. The term “processor” or “processing circuitry” may generally refer to any of the foregoing logic circuitry, alone or in combination with other logic circuitry, or any other equivalent circuitry. A control unit comprising hardware may also perform one or more of the techniques of this disclosure.
Such hardware, software, and firmware may be implemented within the same device or within separate devices to support the various operations and functions described in this disclosure. In addition, any of the described units, modules or components may be implemented together or separately as discrete but interoperable logic devices. Depiction of different features as modules or units is intended to highlight different functional aspects and does not necessarily imply that such modules or units must be realized by separate hardware or software components. Rather, functionality associated with one or more modules or units may be performed by separate hardware or software components, or integrated within common or separate hardware or software components.
The techniques described in this disclosure may also be embodied or encoded in a computer-readable medium, such as a computer-readable storage medium, containing instructions. Instructions embedded or encoded in a computer-readable storage medium may cause a programmable processor, or other processor, to perform the method, e.g., when the instructions are executed. Computer readable storage media may include random access memory (RAM), read only memory (ROM), programmable read only memory (PROM), erasable programmable read only memory (EPROM), electronically erasable programmable read only memory (EEPROM), flash memory, a hard disk, a CD-ROM, a floppy disk, a cassette, magnetic media, optical media, or other computer readable media.
Various examples have been described. These and other examples are within the scope of the following claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201841033315 | Sep 2018 | IN | national |
