BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a configuration diagram of a reproducing circuit wherein this invention is applied;
FIG. 2A is a configuration diagram of a MR head bias voltage monitor which is applicable as a monitor circuit shown in FIG. 1;
FIG. 2B is a configuration diagram of a MR head bias voltage monitor which is applicable as a monitor circuit shown in FIG. 1;
FIG. 2C is a configuration diagram of a MR head bias voltage monitor which is applicable as a monitor circuit shown in FIG. 1;
FIG. 3 is an embodiment of the reproducing circuit wherein this invention is applied;
FIG. 4 is a detailed circuit diagram of a power supply voltage dependent current generation circuit sown in FIG. 3;
FIG. 5 is an example of timing diagram when the power supply voltage changes in the reproducing circuit;
FIG. 6 is a configuration diagram of a reproducing circuit wherein this invention is applied in the monitor circuit shown in FIG. 3;
FIG. 7 is a detailed circuit diagram of the monitor circuit shown in FIG. 6;
FIG. 8 is an example of timing diagram when the power supply voltage changes in the reproducing circuit shown in FIG. 6;
FIG. 9 is a configuration diagram describing a dummy head in the reproducing circuit;
FIG. 10 is a timing diagram when the power supply voltage changes in the reproducing circuit shown in FIG. 9;
FIG. 11 is an embodiment of the magnetic disk apparatus having a preamplifier wherein this invention is applied;
FIG. 12 is a key outlined structural diagram of a magnetic disk apparatus shown in FIG. 11;
FIG. 13 is a block diagram showing an embodiment of the preamplifier wherein this invention is applied;
FIG. 14 is a configuration diagram of a common reproducing circuit;
FIG. 15 is a detailed circuit diagram of the monitoring circuit shown in FIG. 14;
FIG. 16 is an example of timing diagram when the power supply voltage changes in the reproducing circuit shown in FIG. 14; and
FIG. 17 is an example of timing diagram when the power supply voltage changes for which measures have been investigated in the reproducing circuit shown in FIG. 14.