Many systems use light detection and ranging (hereafter “lidar”) to implement vision-like control. Such systems include weapons systems, mobile autonomous robots, safety systems for automobiles, and semi-autonomous and autonomous driving systems. For pulsed-power laser drivers, capacitive discharge circuits employ recharge methods that generate excess heat (e.g., charging through a resistor). Such recharge methods result in high power dissipation, especially for higher pulse repetition frequencies (e.g. greater than 20 kilohertz or more). Moreover, in some cases the power dissipation limits the operating frequency.
Some laser driver circuits utilize energy stored in an inductor to drive one or more laser diodes. However, laser driver circuits which utilize inductors may have to operate at higher voltage to overcome the loop inductance of the current path through the laser diode. Moreover, increasing inductance in the loop slows the rise time of the current waveform. The slow rise times become an issue in lidar systems that employ either a Single Photon Avalanche Diode (SPAD) or a Silicon Photo-Multiplier (SiPM) as the detector. That is, the accuracy of such systems is based on using fast pulses with sharp leading edges. It follows that use of inductors as the energy source may slow the rise time of pulses, and thus lower accuracy.
One example embodiment is a method of activating a laser diode, the method comprising: creating an oscillating voltage at a node between an inductor and a first capacitor, the oscillating voltage having a positive half-cycle and a negative half-cycle; charging a firing capacitor during the positive half-cycle of the oscillating voltage, the charging from the node and through a diode; and driving, during the negative half-cycle of the oscillating voltage, a pulse of current from the firing capacitor through the laser diode.
In the example method, creating the oscillating voltage at the node may further comprise: a) coupling a first lead of the inductor to a power source; and then b) coupling the first lead of the inductor to ground; and c) repeating steps a) and b) at a resonant frequency.
In the example method, charging the firing capacitor may further comprise charging the firing capacitor in parallel with charging the first capacitor during the positive half-cycle of the oscillating voltage.
In the example method, driving the pulse of current from the firing capacitor further comprises discharging the firing capacitor through the laser diode and an electrically-controlled switch.
Another example embodiment is a driver integrated circuit for controlling activation of a laser diode, the driver integrated circuit comprising: a high-gate terminal, a low-gate terminal, a sense terminal, and a pulse-gate terminal; a resonance controller coupled to the high-gate terminal and the low-gate terminal, the resonance controller configured to assert the high-gate terminal for a first duration within a switching period, and configured to assert the low-gate terminal for a second duration within the switching period; and a firing controller coupled to the sense terminal and the pulse-gate terminal, the resonance controller configured to assert the pulse-gate terminal based on a signal sensed by way of the sense terminal.
The example driver integrated may further comprise a pulse-enable terminal. The firing controller may be coupled to the pulse-enable terminal, and the firing controller may be further configured to assert the pulse-gate terminal when the pulse-enable terminal is asserted.
The driver integrated circuit may further comprise: the signal sensed by way of the sense terminal is a signal indicative of voltage at a charge node; and wherein the firing controller asserts the pulse-gate terminal only when the signal indicative of voltage indicates a voltage on the charge node is negative.
The driver integrated circuit may further comprise: the signal sensed by way of the sense terminal is a signal indicative of current flow in an inductor-capacitor circuit; and wherein the firing controller asserts the pulse-gate terminal only when the signal indicative of current flow indicates a voltage on a charge node is negative.
The driver integrated circuit may further comprise the resonance controller coupled to the sense terminal. The resonance controller may be further configured to: measure an attribute of oscillation on the by way of the sense terminal; and control frequency of assertion of the high-gate terminal based on the attribute of oscillation.
Another example embodiment is a driver integrated circuit for controlling activation of a laser diode, the driver integrated circuit comprising: a source terminal, a switch-node terminal, a sense terminal, a ground terminal, and a pulse-gate terminal; a high-side field-effect transistor (high-side FET) defining a drain coupled to the source terminal, a source coupled to the switch-node terminal, and a gate; a low-side FET defining a drain coupled to the switch-node terminal, a source coupled to the ground terminal, and a gate; a resonance controller coupled to the gate of the high-side FET and the gate of the low-side FET, the resonance controller configured to assert the gate of the high-side FET for a first duration within a switching period, and configured to assert the gate of the low-side FET during a second duration within the switching period; and a firing controller coupled to the sense terminal and the pulse-gate terminal, the firing controller configured to sense an attribute of oscillation through the sense terminal, and assert the pulse-gate terminal based on the attribute of oscillation.
The second example driver integrated circuit may further comprise a pulse-enable terminal. The firing controller may be coupled to the pulse-enable terminal, and the firing controller may be further configured to assert the pulse-gate terminal only when the pulse-enable terminal is asserted.
The second example driver integrated may further comprise: the attribute of oscillation is a signal indicative of voltage at a charge node; and wherein the firing controller asserts the pulse-gate terminal only when the signal indicative of voltage indicates a voltage on the charge node is negative.
The second example driver integrated circuit may further comprise: the attribute of oscillation is a signal indicative of current flow in an inductor-capacitor (LC) circuit; and wherein the firing controller asserts the pulse-gate terminal only when the signal indicative of current flow indicates a voltage on a charge node is negative.
The second example driver integrated circuit may further comprise: the resonance controller coupled to the sense terminal, and the resonance controller further configured to:
sense the attribute of oscillation by way of the sense terminal; and control frequency of assertion of the gate of the high-side FET based on the attribute of oscillation.
Another example embodiment is a system for light detecting and ranging, comprising: an inductor-capacitor circuit (LC circuit) defining a first lead, a second lead, and a charge node between an inductor and a capacitor; a high-side switch defining a first lead coupled to a power supply, a second lead coupled to the first lead of the LC circuit, and a control input; a low-side switch defining a first lead coupled to the first lead of the LC circuit, a second lead coupled to the ground, and a control input; a diode defining an anode coupled to the charge node, and a cathode; a firing capacitor defining a first lead coupled to the cathode of the diode, and a second lead coupled to the to the ground; a laser diode; a pulse-control switch coupled to the firing capacitor and the laser diode, the pulse-control switch configured to couple the firing capacitor to the laser diode based on a control input; and a resonance controller coupled to the control inputs of the high-side switch, the low-side switch, and the pulse-control switch. The resonance controller may be configured to: create an oscillating voltage at the charge node by control of the high-side switch and the low-side switch, the oscillating voltage having a frequency, a positive half-cycle, and a negative half-cycle; and generate a laser pulse from the laser diode during the negative half-cycle of the oscillating voltage by making the pulse-control switch conductive.
In the example system, when the resonance controller creates the oscillating voltage at the charge node, the resonance controller may be further configured to: a) assert the control input of the high-side switch to couple the first lead of the LC circuit to a power source; and then b) assert the control input of the low-side switch to couple the first lead of the LC circuit to ground; and c) repeat steps a) and b) at the frequency.
The example system may comprise a firing controller defining a pulse-enable input, the firing controller configured to assert the control input of the pulse-control switch only during the negative half-cycle of the oscillating voltage when the pulse-enable input is asserted.
The example system may further comprise: a current sensor associated with the charge node; and the resonance controller coupled to the current sensor. The resonance controller may be further configured to: measure values indicative of current by way of the current sensor; and control the frequency of the oscillating voltage based on the values indicative of current.
In the example system, the high-side switch may further comprise a field effect transistor (FET), and the low-side switch may further comprise a FET.
In the example system, the high-side switch, the low-side switch, and the resonance controller may all reside within a driver integrated circuit.
For a detailed description of example embodiments, reference will now be made to the accompanying drawings in which:
Various terms are used to refer to particular system components. Different companies may refer to a component by different names—this document does not intend to distinguish between components that differ in name but not function. In the following discussion and in the claims, the terms “including” and “comprising” are used in an open-ended fashion, and thus should be interpreted to mean “including, but not limited to . . . ” Also, the term “couple” or “couples” is intended to mean either an indirect or direct connection. Thus, if a first device couples to a second device, that connection may be through a direct connection or through an indirect connection via other devices and connections.
In relation to electrical devices (whether stand alone or as part of an integrated circuit), the terms “input” and “output” refer to electrical connections to the electrical devices, and shall not be read as verbs requiring action. For example, a differential amplifier (such as an operational amplifier) may have a first differential input and a second differential input, and these “inputs” define electrical connections to the operational amplifier, and shall not be read to require inputting signals to the operational amplifier.
“Assert” shall mean changing the state of a Boolean signal. Boolean signals may be asserted high or with a higher voltage, and Boolean signals may be asserted low or with a lower voltage, at the discretion of the circuit designer. Similarly, “de-assert” shall mean changing the state of the Boolean signal to a voltage level opposite the asserted state.
“Controller” shall mean, alone or in combination, individual circuit components, an application specific integrated circuit (ASIC), a microcontroller with controlling software, a digital signal processor (DSP), a processor with controlling software, a programmable logic device (PLD), or a field programmable gate array (FPGA), configured to read inputs and drive outputs responsive to the inputs.
The following discussion is directed to various embodiments of the invention. Although one or more of these embodiments may be preferred, the embodiments disclosed should not be interpreted, or otherwise used, as limiting the scope of the disclosure, including the claims. In addition, one skilled in the art will understand that the following description has broad application, and the discussion of any embodiment is meant only to be exemplary of that embodiment, and not intended to intimate that the scope of the disclosure, including the claims, is limited to that embodiment.
Various embodiments are directed to resonant recharge for synchronous pulsed laser operation. More particularly, at least some example embodiments are directed to recharging a firing capacitor for a laser diode (e.g., a vertical cavity surface emitting laser (VCSEL)) by creating an oscillating voltage within inductor-capacitor (LC) circuit, and using the oscillating voltage to charge the firing capacitor. Current from the firing capacitor may be used to activate or drive the laser diode, and in some cases the activation is synchronized with the oscillating voltage. More particularly still, in example cases the oscillating voltage is a resonant voltage. During the negative half-cycle of the resonant voltage the laser diode is activated with current from the firing capacitor, and during the positive-half cycle of the resonant voltage the firing capacitor is recharged. The specification first turns to an example system to orient the reader.
The example laser 102 is driven by the driver circuit 104. In particular, the driver circuit 104 is coupled to the laser 102 such that the driver circuit 104, at the command of the lidar controller 110, may drive the laser 102. The command may be to drive a single pulse or single firing of the laser 102, or the command may be to create pulses of light from the laser 102. Since the example lidar system 100 is a time-of-flight type system, the driver circuit 104 may provide to the lidar controller 110 an indication of each point in time when the example laser 102 has been activated (e.g., start time). The lidar controller 110, in turn, may provide the indications to the detection circuit 108 and any other system that uses the information related to when the pulse of light was created by the laser 102.
Still referring to
The example driver circuit further comprise a low-side switch 212. The low-side switch 212 is also shown as a mechanical switch, but in practice the low-side switch 212 may be any suitable electrically-controlled switch, such as a FET. The low-side switch 212 defines a first lead 215 coupled to the switch node 208 and a second lead 217 coupled to a reference voltage (e.g., ground). The example low-side switch 212 further defines a control input 209 coupled to the driver IC 200. In situations where the low-side switch 212 is a FET, the control input 209 may be the gate of the FET. Responsive to assertion of the control input 209, the low-side switch 202 closes or becomes conductive.
The example system further comprises an inductor 210 defining a first lead 213 coupled to the switch node 208 and a second lead 214. Also present is a resonant capacitor 216 defining a first lead 218 coupled to the second lead 214 of the inductor 210, and a second lead 220 coupled to ground. The first lead 218 of the resonant capacitor 216 and the second lead 214 of the inductor define a resonant node or charge node 222.
The example driver circuit 104 further comprises a diode 224 that defines an anode coupled to the charge node 222 and a cathode. The cathode of diode 224 couples to the first lead 226 of firing capacitor 228, and the second lead 230 of the firing capacitor 228 couples to ground. The cathode of the diode 224 and the first lead 226 are coupled to the laser 102. In the example system, the laser 102 is implemented as a single laser diode 232 (e.g., a VCSEL), but as discussed above the laser 102 may be a plurality of laser diodes, possibly arranged as an array. In particular, the cathode of the diode 224 and first lead 226 couple to the anode of the laser diode 232, and the cathode of the laser diode 232 couples back into the driver circuit 104.
Still referring to
The example driver IC 200, which may a packaged integrated circuit device, defines a plurality of electrical pins or electrical terminals. For example, the driver IC 200 may define a high-gate terminal 242 coupled to the control input 211 of the high-side switch 202. The driver IC 200 may comprise a low-gate terminal 244 coupled to the control input 209 of the low-side switch 212. The driver IC 200 may comprise a sense terminal 246 coupled to the charge node 222. In some cases, the sense terminal 246 may couple directly the charge node 222, such as when the peak voltages at the charge node are relatively low and the driver IC 200 is designed and constructed to directly sense voltage at the charge node. However, if the peak voltage at the charge node 222 is expected to be above the breakdown voltage of the devices within the driver IC 200, the sense terminal 246 may couple to the charge node 222 through a voltage divider 249. In cases where the driver IC 200 is designed and constructed to sense voltage at the charge node 222, the voltage divider 249 may be a resistive voltage divider. In cases where the driver IC 200 is designed and constructed to sense current flow in the LC circuit, the voltage divider 249 may be a capacitive voltage divider in which the upper element is a capacitor and the lower element is a resistor.
Still referring to
In accordance with example embodiment embodiments, the driver IC 200 controls the conductive states of the high-side switch 202 and the low-side switch 212 to induce an oscillating voltage at the charge node 222. In particular, the inductor 210 and resonant capacitor 216 form an LC circuit that has a natural resonant frequency, and by control of the high-side switch 202 and low-side switch 212 an alternating current (AC) signal is driven to the LC circuit. Responsive to the AC signal, the LC circuit may oscillate, thus creating an oscillating voltage at the charge node 222. The oscillating voltage at the charge node may be referred to as a resonance voltage.
In operation, the high-side switch 202 and the low-side switch 212 alternately couple the switch node 208 to the input voltage VDC and ground, thus creating the AC signal driven or applied to the LC circuit. It follows that the voltage at the charge node 222 will be a time-varying voltage that has a frequency. In particular, the oscillating voltage at the charge node will have a positive half-cycle and a negative half-cycle. That is, the voltage at the charge node will be positive with respect to ground for a half-cycle, and the voltage at the charge node will be negative with respect to ground for a half-cycle, and then the process repeats. In example embodiments, once the LC circuit reaches a steady state oscillation, both the resonant capacitor 216 and the firing capacitor 228 are charged during the positive half-cycle of the oscillating voltage at the charge node 222. In the case of the firing capacitor 228, the charging during the positive half-cycle is through the diode 224. During the negative half-cycle of the oscillating voltage, while the current flows from the resonant capacitor 216 and through the inductor 210 to ground, the voltage and current held on the firing capacitor 228 is isolated by the diode 224.
Responsive to assertion of the pulse-enable terminal 250 (e.g., during any phase of the oscillating voltage), during the negative half-cycle the driver IC 200 makes the pulse control switch 236 conductive, thus providing a pulse of current from the firing capacitor 228 through the laser diode 232. The specification now turns to a series of figures to explain the various phases of control of the driver circuit 104.
The current through the inductor 210 builds over time, and then as the voltage on the capacitors 216 and 228 rises, the voltage at the charge node 222 approaches the power supply VDC. As the voltage at the charge node 222 approaches the power supply VDC voltage, current in the inductor decreases, eventually reaching zero. The example system then enables the current to reverse flow through the inductor 210.
In the example system, the capacitance “seen” by the inductor 210 changes as a function of the half-cycle of the oscillating voltage. During a positive half cycle (and assuming the firing capacitor 228 is discharged), the total capacitance is effectively the sum of the resonant capacitor 216 and the firing capacitor 228. However, during the negative half-cycle the diode 224 blocks reverse current flow, and thus the capacitance “seen” by the inductor 210 is just the resonant capacitor 216. In accordance with example embodiments, the resonant capacitor 216 has a greater capacitance than the firing capacitor 228. In some cases, the relationship of the capacitance of the resonant capacitor to the capacitance of the firing capacitor is at least 5:1, and in a particular case 8:1. It follows that the capacitance of the firing capacitor 228 has little effect on the resonant frequency of the LC circuit. For purposes of this disclosure and the claims, resonant frequency shall encompass a range of frequencies that include the resonant frequency considering only the resonant capacitor 216, and the resonant frequency considering both the resonant capacitor 216 and the firing capacitor 228 coupled in parallel, so long as the relationship of the relationship of the capacitances is at least 5:1 in favor of the resonant capacitor 216.
In accordance with example systems, the pulse duration is small fraction of the negative half-cycle. The firing or activation can take place at any time during the negative half-cycle of the oscillating voltage so long as the pulse is complete (i.e., the firing capacitor reaches near zero volts) before the beginning of the positive half-cycle of the oscillating voltage. During the next positive half-cycle of the oscillating voltage (e.g.
In one example system, the driver IC 200 drives the AC signal to the LC circuit at a frequency of between and including 1 megahertz (MHz) and 5 MHz, and thus the pulse frequency for the laser diode 232 may be in the same range. Stated otherwise, the inductance of the inductor 210 and the capacitance of the resonant capacitor 216 may be selected to have a resonant frequency in the range between and including 1 MHz and 5 MHz. Moreover, in one example system the peak voltage at the charge node 222 is about 200 volts, such that the peak voltage held on the firing capacitor 228 is about 200 volts by application of VDC to the switch node 208. Of course, higher and lower voltages may be used, and different frequency ranges may be used.
In particular, in steady state operation the voltage on the resonant capacitor 216 (plot 500), or equivalently stated the voltage on the charge node 222, is an oscillating voltage as shown. In many cases, the frequency of the oscillating voltage is set by the inductance and capacitance of the LC circuit, and the driver circuit 104 drives an AC signal to the first lead 213 of the inductor 210 to create the oscillating voltage. The oscillation voltage has a period defined between any two consecutive and corresponding features (e.g., period between vertical line 516 and 520). The period can be conceptually divided into a positive half-cycle (e.g., time between vertical lines 516 and 518) as well as a negative half-cycle (e.g., time between vertical lines 518 and 520). The oscillating voltage on the charge node 222 is related to an oscillating current (plot 502) that flows back and forth within the LC circuit. At resonance, the current makes a positive-going zero crossing contemporaneously with a minima in the oscillating voltage on the charge node 222 (e.g., at vertical line 512). Correspondingly, the current makes a negative-going zero crossing contemporaneously with a maxima in the voltage on the charge node 222 (e.g., at vertical line 522).
In order to drive or create the oscillating voltage on the charge node 222 (again, plot 500), the driver IC 200 drives the AC signal to the first lead 213 of the inductor 210 by selective control of the high-side switch 202 and the low-side switch 212. Plot 506 shows an example signal driven to the control input of the high-side switch 202 to make the high-side switch 202 conductive at appropriate times. Plot 508 shows an example signal driven to the control input of the low-side switch 212 to make the low-side switch 212 conductive at appropriate times. For example, during the period of time between vertical lines 512 and 522, the high-side switch 202 is conductive and the low-side switch is non-conductive. Thus, during this period the high-side switch 202 couples the power supply VDC to the first lead 213 of the inductor 210. During the period of time between vertical lines 522 and 514, the low-side switch 212 is conductive and the high-side switch is non-conductive. Thus, during this period the low-side switch 212 couples the first lead 213 of the inductor 210 to ground. The example process repeats in each switching period. It is noted that while the example
In accordance with example embodiments, and for the reasons discussed above, the laser diode 232 may be activated or fired at any time during the negative half-cycle of the oscillating voltage. In the example timing diagram shown, the pulse-gate terminal 248 is shown to be asserted contemporaneously with each minima of the oscillating voltage on the charge node 222. For example, an asserted pulse 524 may be applied at the time represented by vertical line 512. The assertion of the pulse-gate terminal 248 thus makes the pulse-control switch 236 conductive, which applies the energy from the firing capacitor 228 through the laser diode 232. The discharge of the firing capacitor 228 thus drops the voltage on the firing capacitor 228 to zero at each firing as shown in plot 504. Parasitic inductances may make the voltage on the firing capacitor 228 ring after the current is discharged, and the ringing is shown by the slight negative voltage just after each firing. Further as shown in plot 504, the firing capacitor 228 is re-charged in each positive half-cycle of the oscillating voltage on the charge node 222.
The example timing diagram suggests one operational technique for the driver IC 200. In particular, in some embodiments of the driver IC 200 the pulse-gate terminal 248 may be asserted (thus making the pulse-control switch 236 conductive) in each switching period contemporaneously with the transition of de-asserting the high-gate terminal and asserting the low-gate terminal. For example, the driver IC 200 could simultaneously de-assert the high-gate terminal 242 and assert the pulse-gate terminal 248. In other cases, the driver IC 200 could assert the pulse-gate terminal 248 in the lag time between de-assertion of the high-gate terminal 242 and assertion of the low-gate terminal 244. In yet still other cases, the driver IC 200 could simultaneously assert the low-gate terminal 244 and assert the pulse-gate terminal 248. Inasmuch as the activation or firing of the laser diode 232 may take place any time during the negative half-cycle, other operational techniques, discussed more below, may be used. The specification now turns example driver ICs 200.
Within the driver IC 200, and in particular on the substrate 600, resides an example resonance controller 602 and firing controller 604. The example resonance controller 602 couples to the high-gate terminal 242 and the low-gate terminal 244. The resonance controller 602 is designed and constructed to control the asserted states of the high-gate terminal 242 and the low-gate terminal 244, and thus to control the conductive states of the high-side switch 202 and the low-side switch 212, respectively. For example, the resonance controller 602 may be designed and constructed to, during operation, assert the high-gate terminal 242 for a first duration within a switching period while holding the low-gate terminal 244 de-asserted, and configured to assert the low-gate terminal 244 for a second duration within the switching period while holding the high-gate terminal 242 de-asserted. Thus, the resonance controller 602 may drive the AC signal to the first lead 218 of the inductor 210 to create the oscillating voltage on the charge node 222.
In some cases, the resonance controller 602 drives the terminals in an open loop sense. That is, once powered-on and operational, the resonance controller 602 drives the alternating asserted signals without regard to the actual voltage and/or current at the charge node 222. For example, the circuit designer may select a resonant frequency based on the inductance and capacitance of the LC circuit, and the resonant frequency may be conveyed to the resonance controller 602 in some form, such as by the resistance values of external resistors (not shown) coupled to the driver IC 200, or by serial communication to the resonance controller 602 through a communication terminal (again not shown).
Still referring to
In yet still other cases, the firing controller 604 couples to the sense terminal 246, and may assert the pulse-gate terminal 248 based on an attribute of oscillation sensed by way of the sense terminal 246. In one example case, the attribute of oscillation may be the voltage on the charge node 222 as sensed at the sense terminal 246. By monitoring an attribute of the sensed voltage (e.g., polarity, zero crossings, maxima timing, minima timing), the firing controller 604 may determine timing of the negative half-cycle of the oscillating voltage on the charge node 222, and assert the pulse-gate terminal 248 during the negative half-cycle. In another example, the attribute of oscillation may be current flow through the LC circuit as sensed at the sense terminal 246 (e.g., a voltage indicative of current). By monitoring an attribute of the sensed voltage indicative of current (e.g., maxima timing, minima timing), the firing controller 604 may determine timing of the negative half-cycle of the oscillating voltage on the charge node 222, and assert the pulse-gate terminal 248 during the negative half-cycle.
In some cases the firing controller 604 asserts the pulse-gate terminal 248 in each negative half-cycle of the oscillating voltage at the charge node 222 (independent of how the negative half-cycle is determined). In other cases, however, the firing controller 604 may only assert the pulse gate terminal 248 responsive to a signal from another device (e.g., the lidar controller 110). Thus, in some cases the firing controller 604 asserts the pulse-gate terminal 248 in a negative half-cycle only if a pulse-enable signal on the pulse-enable terminal 250 is asserted. Assertion of the pulse-enable terminal 250 may occur asynchronously with the negative half-cycles of the oscillating voltage at the charge node 222, and thus the firing controller 604 does not necessarily assert the pulse-gate terminal 248 directly responsive to assertion of the pulse-enable terminal 250. Rather, the firing controller 604 may: assert the pulse-gate terminal 248 in the currently existing negative half-cycle if the pulse-enable terminal 250 is asserted within the currently existing negative half-cycle; or assert the pulse-gate terminal 248 in a subsequent negative half-cycle (e.g., an immediately subsequent negative half-cycle) if the pulse-enable terminal 250 is asserted in a positive half-cycle.
Finally, the example firing controller 604 may provide timing signals for downstream components (e.g., the lidar controller 110 or the detection circuit 108) such that time-of-flight calculations can be made. In particular, in example cases the firing controller 604 may assert the timing terminal 252 simultaneously with each assertion of the pulse-gate terminal 248 such that the downstream components may make the time-of-flight calculations.
Returning briefly to
The high-side FET 704 defines a drain coupled to the source terminal 700 and a source coupled to the switch-node terminal 702. In practice, the power supply VDC is coupled directly to the source terminal 700, and the switch-node terminal 702 is coupled to the first lead 215 of the inductor 210. The gate of the high-side FET 704 is coupled to the resonance controller 602. The low-side FET 706 defines a drain coupled to the switch-node terminal 702 and a source coupled to ground. The gate of the low-side FET 706 is coupled to the resonance controller 602.
Operation of the driver IC 200 of
Many of the electrical connections in the drawings are shown as direct couplings having no intervening devices, but not expressly stated as such in the description above. Nevertheless, this paragraph shall serve as antecedent basis in the claims for referencing any electrical connection as “directly coupled” for electrical connections shown in the drawing with no intervening device(s).
The above discussion is meant to be illustrative of the principles and various embodiments of the present invention. Numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated. It is intended that the following claims be interpreted to embrace all such variations and modifications.
This application claims the benefit of U.S. Provisional Application No. 63/061,941 filed Aug. 6, 2020 and titled “Resonant Recharge Synchronous Pulsed Laser Driver.” The provisional application is incorporated herein by reference as if reproduced in full below.
Number | Date | Country | |
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63061941 | Aug 2020 | US |