Electrical resonators are widely incorporated in modern electronic devices. For example, in wireless communications devices, radio frequency (RE) and microwave frequency resonators are used as filters, such as ladder filters having electrically connected series and shunt resonators formed in a ladder structure. The filters may he included in a duplexer, for example, connected between a single antenna and a receiver and a transmitter for respectively filtering received and transmitted signals.
Various types of filters use mechanical resonators, such as bulk acoustic wave (BAW), surface acoustic wave (SAW), and solidly mounted resonator (SMR)-BAW resonators. The resonators generally convert electrical signals to mechanical signals or vibrations, and/or mechanical signals or vibrations to electrical signals. A BAW resonator, for example, is an acoustic stack that generally includes a layer of piezoelectric material between two electrodes. Acoustic waves achieve resonance across the acoustic stack, with the resonant frequency of the waves being determined by the materials in the acoustic stack and the thickness of each layer (e.g., piezoelectric layer and electrode layers). One type of BAW resonator includes a piezoelectric film as the piezoelectric material, which may be referred to as a film bulk acoustic resonator (FBAR). FBARs resonate at GHz frequencies, and are thus relatively compact, having thicknesses on the order of microns and length and width dimensions of hundreds of microns.
Resonators may be used as band-pass filters with associated passbands providing ranges of frequencies permitted to pass through the filters. The passbands of the resonator filters tend to shift in response to environmental and operational factors, such as changes in temperature and/or incident power. For example, the passband of a resonator filter moves lower in frequency in response to rising temperature and higher incident power.
Cellular phones, in particular, are negatively affected by shifts in passband due to fluctuations in temperature and power. For example, a cellular phone includes power amplifiers (PAs) that must be able to deal with larger than expected insertion losses at the edges of the filter (duplexer). As the filter passband shifts down in frequency, e.g., due to rising temperature, the point of maximum absorption of power in the filter, which is designed to be above the passband, moves down into the frequency range of the FCC or government designated passband. At this point, the filter begins to absorb more power from the PA and heats up, causing the temperature to increase further. Thus, the filter passband shifts down in frequency more, bringing the maximum filter absorbing point even closer. This sets up a potential runaway situation, which is avoided only by the fact that the reflected power becomes large and the filter eventually settles at some high temperature.
PAs are designed specifically to handle the worst case power handling of the filter at the corner of the pass band. Currents of a typical PA can run from a few mA at the center of the filter passband to about 380 mA-450 mA at the edges. This is a huge power draw on the PA, as well as the battery that drives the cellular phone. This is one reason that a cellular phone operating more in the transmit mode (i.e., talk time) than in the receive mode (i.e., listening time) drains battery power more quickly.
In order to prevent or reduce rising temperatures, a conventional filter may include a layer of oxide material within the piezoelectric layer of the acoustic stack. The oxide material has a positive temperature coefficient, which at least partially offsets the negative temperature coefficients of the metal electrodes and the piezoelectric material, respectively. For example, the oxide material may be placed in the center of the piezoelectric layer or at either end of the piezoelectric layer between the electrodes. However, that the acoustic coupling coefficient (kt2) of the resonator is greatly compromised by the addition of oxide material to the piezoelectric layer. This is because the oxide material appears as a “dead” capacitor in series with the active piezoelectric material dielectric. Further, the oxide material may contaminate the piezoelectric material. For example, when the piezoelectric material is aluminum nitride (AlN), the oxide material causes the AlN to become a chemical compound that includes oxygen (e.g., AlN(x)O(y)), which is a non-piezoelectric material, thus further degrading the acoustic coupling coefficient.
In accordance with a representative embodiment, an acoustic wave resonator comprises: (a) a substrate; (b) an acoustic reflector formed on the substrate; (c) a bottom electrode formed on the acoustic reflector; (d) a piezoelectric layer formed on the bottom electrode; and (e) a composite structure formed on the piezoelectric layer, comprising: (i) a first electrode formed on the piezoelectric layer; (ii) a temperature compensation layer formed on the first electrode; and (iii) a second electrode formed on the temperature compensation layer and electrically connected to the first electrode.
In accordance with another representative embodiment, an acoustic wave resonator, comprising a composite structure comprises: (a) a first electrode; (h) a temperature compensation layer formed on the first electrode. The temperature compensation layer has one or more vias or trenches formed therein. The acoustic wave resonator also comprises (c) a second electrode formed on the temperature compensation layer and electrically connected to the first electrode at least throe the one or more vias or trenches of the temperature compensation layer.
In another representative embodiment, an acoustic wave resonator comprises: (a) a substrate; (b) an acoustic reflector formed on the substrate; (c) a composite structure formed on the acoustic reflector, comprising: (i) a first electrode formed on the acoustic reflector; (ii) a temperature compensation layer formed on the first electrode; and (iii) a second electrode formed on the temperature compensation layer and electrically connected to the first electrode; (d) a piezoelectric layer formed on the second electrode of the composite structure; and (e) a top electrode formed on the piezoelectric layer.
The example embodiments are best understood from the following detailed description when read with the accompanying drawing figures. It is emphasized that the various features are not necessarily drawn to scale. In fact, the dimensions may be arbitrarily increased or decreased for clarity of discussion. Wherever applicable and practical, like reference numerals refer to like elements.
In the following detailed description, for purposes of explanation and not limitation, representative embodiments disclosing specific details are set forth in order to provide a thorough understanding of the present teachings. However, it will be apparent to one having ordinary skill in the art having had the benefit of the present disclosure that other embodiments according to the present teachings that depart from the specific details disclosed herein remain within the scope of the appended claims. Moreover, descriptions of well-known apparatuses and methods may be omitted so as to not obscure the description of the representative embodiments. Such methods and apparatuses are clearly within the scope of the present teachings.
Generally, it is understood that the drawings and the various elements depicted therein are not drawn to scale. Further, relative terms, such as “above,” “below,” “top,” “bottom,” “upper,” “tower,” “left,” “right,” “vertical” and “horizontal,” are used to describe the various elements' relationships to one another, as illustrated in the accompanying drawings. It is understood that these relative terms are intended to encompass different orientations of the device and/or elements in addition to the orientation depicted in the drawings. For example, if the device were inverted with respect to the view in the drawings, an element described as “above” another element, for example, would now be “below” that element, Likewise, if the device were rotated 90 degrees with respect to the view in the drawings, an element described as “vertical,” for example, would now be “horizontal.”
Aspects of the present teachings are relevant to components of BAW and FBAR devices and filters, their materials and their methods of fabrication. Various details of such devices and corresponding methods of fabrication may be found, for example, in one or more of the following U.S. patent publications: U.S. Pat. No. 6,107,721, to Lakin; U.S. Pat. Nos. 5,587,620, 5,873,153, 6,507,983, 7,388,454 and 7,629,865 to Ruby et al.; U.S. Pat. No. 7,280,007 to Hongjun Feng et al.; and U.S. Patent Application Pub. No. 2007-0205850 Jamneala et al. The disclosures of these patents and published patent applications are hereby incorporated by reference. It is emphasized that the components, materials and method of fabrication described in these patents and patent applications are representative and other methods of fabrication and materials within the purview of one of ordinary skill in the art are contemplated.
According to various embodiments, a resonator device has an acoustic stack with a piezoelectric layer between top and bottom electrodes, at least one of which is a composite electrode having a temperature compensating layer deposited between an electrode layer and a conductive interposer layer. The temperature compensating layer may he formed of an oxide material, such as boron silicate glass (BSG), for example, having a positive temperature coefficient which offsets at least a portion of the negative temperature coefficients of the piezoelectric layer and the conductive material in the top and bottom electrodes. The conductive interposer layer thus makes a DC electrical connection with the electrode layer in the composite electrode, effectively shorting out a capacitive component of the temperature compensating layer and increasing a coupling coefficient kt2 of the resonator device. Also, the conductive interposer, which is positioned between the temperature compensating layer the piezoelectric layer, presents a barrier preventing oxygen in the oxide layer from diffusing into the piezoelectric material of the piezoelectric layer. In various embodiments, the composite electrode may be the bottom electrode, the top electrode, or both, in the acoustic stack.
Referring to
The acoustic stack 105 includes piezoelectric layer 130 formed between composite first electrode 120 and second electrode 140. The composite first electrode 120 includes multiple layers, and is referred to herein as a composite electrode. In various embodiments, the composite first electrode 120 includes a base electrode layer 122, a buried temperature compensating layer, e.g., oxide layer 124 and a conductive interposer layer 126 stacked sequentially on the substrate 110. The electrode layer 122 and the conductive interposer layer 126 are formed of electrically conductive materials, such as various metals compatible with semiconductor processes, including tungsten (W), molybdenum (Mo), aluminum (Al), platinum (Pt), ruthenium (Ru), niobium (Nb), or hafnium (Hf), for example.
In various embodiments, the electrode layer 122 and the conductive interposer layer 126 are formed of different conductive materials, where the electrode layer 122 is formed of a material having relatively lower conductivity and relatively higher acoustic impedance, and the conductive interposer layer 126 is formed of a material having relatively higher conductivity and relatively lower acoustic impedance. For example, the electrode layer 122 may be formed of W and the conductive interposer layer 126 may be formed of Mo, although other materials and/or combinations of materials may be used without departing from the scope of the present teachings. Further, in various embodiments, the electrode layer 122 and the conductive interposer layer 126 may be formed of the same conductive material, without departing from the scope of the present teachings.
The oxide layer 124 is a temperature compensating layer, and is formed between the electrode layer 122 and the conductive interposer layer 126. The oxide layer 124 is therefore separated or isolated from the piezoelectric layer 130 by the conductive interposer layer 126, and is otherwise sealed in by the connection between the conductive interposer layer 126 and the electrode layer 122. Accordingly, the oxide layer 124 is effectively buried within the composite first electrode 120, The oxide layer 124 may be formed of various materials compatible with semiconductor processes, including boron silicate glass (BSG), silicon dioxide (SiO2), chromium (Cr) or tellurium oxide (TeO(x)), for example, which have positive temperature coefficients. The positive temperature coefficient of the oxide layer 124 offsets negative temperature coefficients of other materials in the acoustic stack 105, including the piezoelectric layer 130, the second electrode 140, and the electrode layer 122 and the conductive interposer layer 126 of the composite first electrode 120.
As shown in the embodiment of
Also, in the depicted embodiment, the oxide layer 124 has tapered edges 124a, which enhance the DC electrical connection between the conductive interposer layer 126 and the electrode layer 122. In addition, the tapered edges 124a enhance the mechanical connection between the conductive interposer layer 126 and the electrode layer 122, which improves the sealing quality, e.g., for preventing Oxygen M the oxide layer 124 from diffusing into the piezoelectric layer 130. In alternative embodiments, the edges of the oxide layer 124 are not tapered, but may be substantially perpendicular to the top and bottom surfaces of the oxide layer 124, for example, without departing from the scope of the present teachings.
The piezoelectric layer 130 is formed on the top surface of the conductive interposer layer 126. The piezoelectric layer 130 may be formed of a thin film piezoelectric compatible with semiconductor processes, such as aluminum nitride (AlN), zinc oxide (ZnO), lead zirconium titanate (PZT), or the like. The thickness of the piezoelectric layer 130 may range from about 1000 Å to about 100,000 Å, for example, although the thickness may vary to provide unique benefits for any particular situation or to meet application specific design requirements of various implementations, as would be apparent to one of ordinary skill in the art. In an embodiment, the piezoelectric layer 130 may be formed on a seed layer (not shown) disposed over an upper surface the composite first electrode 120. For example, the seed layer may be formed of Al to foster growth of an AlN piezoelectric layer 130. The seed layer may have a thickness in the range of about 50 Å to about 5000 Å, for example.
The second electrode 140 is formed on the top surface of the piezoelectric layer 130. The second electrode 140 is formed of an electrically conductive material compatible with semiconductor processes, such as Mo, Ru, Nb, Elf, or the like. In an embodiment, the second electrode 140 is formed of the same material as the electrode layer 122 of the composite first electrode 120. However, in various embodiments, the second electrode 140 may be formed of the same material as only the conductive interposer layer 126; the second electrode 140, the conductive interposer layer 126 and the electrode layer 122 may all be formed of the same material; or the second electrode 140 may be formed of a different material than both the conductive interposer layer 126 and the electrode layer 122, without departing from the scope of the present teachings.
The second electrode 140 may further include a passivation layer (not shown), which may be formed of various types of materials, including AlN, silicon carbide (SiC), BSG, SiO2, SiN, polysilicon, and the like. The thickness of the passivation layer must be sufficient to insulate all layers of the acoustic stack 105 from the environment, including protection from moisture, corrosives, contaminants, debris and the like. The first and second electrodes 120 and 140 are electrically connected to external circuitry via contact pads (not shown), which may be formed of a conductive material, such as gold, gold-tin alloy or the like.
In an embodiment, an overall first thickness T120 of the composite first electrode 120 is substantially the same as an overall second thickness T140 of the second electrode 140, as shown in
The multiple layers of the composite first electrode 120 have corresponding thicknesses. For example, the thickness of electrode layer 122 may range from about 400 Å to about 29,900 Å, the thickness of oxide layer 124 may range from about 100 Å to about 5000 Å, and the thickness of conductive interposer layer 126 may range from about 100 Å to about 10000 Å. Each of the layers of the composite first electrode 120 may be varied to produce different. Characteristics with respect to temperature coefficients and coupling coefficients, while the overall first thickness T120 of the composite first electrode 120 remains substantially the same as the overall second thickness T140 of the second electrode 140. For example, the thickness of the oxide layer 124 may be varied to affect the overall temperature coefficient of the acoustic stack 105, and the relative thicknesses of the electrode layer 122 and the conductive interposer layer 126 may be varied to affect the overall coupling coefficient of the resonator device 100.
For example,
More particularly, illustrative resonator device 200 of
The composite first electrode 220 includes electrode layer 222, buried oxide layer 224 and conductive interposer layer 226 stacked sequentially on the substrate 110, e.g., over the cavity 115. As discussed above with respect to the electrode layer 122 and the conductive interposer layer 126, the electrode layer 222 and the conductive interposer layer 226 are formed of the same or different electrically conductive materials, such as Mo, W, Al, Pt, Ru, Nb or Hf, for example.
The buried oxide layer 224 is a temperature compensating layer formed between the electrode layer 222 and the conductive interposer layer 226, such that the buried oxide layer 224 is separated from the piezoelectric layer 130 by the conductive interposer layer 226. Accordingly, the buried oxide layer 224 is effectively buried within the composite first electrode 220. As discussed above with respect to the oxide layer 124, the buried oxide layer 224 may be formed of various materials compatible with semiconductor processes, including BSG, SiO2, Cr or TeO(x), for example, which have positive temperature coefficients, for offsetting negative temperature coefficients of other materials in the acoustic stack 205.
As discussed above with reference to
The thickness of the oxide layer can also be targeted to be thicker (as it is more deeply buried) to help maintain, or minimize, the linear temperature coefficient. In the depicted example, the thickness of the buried oxide layer 224 is the same as the thickness of the oxide layer 124. However, due to the deeper position within the composite first electrode 220, the buried oxide layer 224 causes the coupling coefficient of the resonator device 200 to be relatively greater than the coupling coefficient of the resonator device 100 (at the expense of worsening temperature coefficient). In other words, by adjusting the depth of the oxide layer 124, 224, the coupling coefficient of the resonator device 100, 200 may be optimized. Some of the degradation of the temperature coefficient can be “won back” by thickening the oxide layer 124, 224. Typically, there is an optimum between final temperature coefficient and coupling coefficient (kt2), depending on application.
Generally, the thickness and the location of the oxide layer 124, 224 inside the first and second electrode 120, 220 should be optimized, in order to maximize the coupling coefficient for an allowable linear temperature coefficient. This optimization may be accomplished, for example, by modeling an equivalent circuit of the acoustic stack 105, 205 using a Mason model and adjusting the oxide layer 124, 224 by adding more material to the conductive interposer layer 126 and removing material from the electrode layer 122, so the thickness of the composite first electrode 120, 220 remains constant, as would be apparent to one of ordinary skill in the art. Although there is some degradation in the offsetting effects of the temperature coefficient by sinking the oxide layer 124, 224, the coupling coefficient of the resonator device 100, 200 may be improved. An algorithm may be developed to optimize the depth of the oxide layer 124, 224 in the composite first electrode 120, 220 in light of the trade-off between the temperature coefficient and the coupling coefficient, for example, using a multivariate optimization technique, such as a Simplex method, as would be apparent to one of ordinary skill in the art. In addition, the depth of the oxide layer 124, 224, may be limited by various constraints, such as minimum necessary coupling coefficient and maximum allowable temperature coefficient. Likewise, the thickness of the oxide layer 124, 224 may adjusted to provide the optimal coupling coefficient and a minimum overall temperature coefficient of the resonator device 100, 200.
Referring again to
According to various embodiments, the resonator device may be fabricated using various techniques compatible with semiconductor processes. A non-limiting example of a fabrication process directed to representative resonator device 100 is discussed below with reference to
Referring to
Notably, formation of the cavity 115 in the substrate 110 may be carried out before fabrication of the acoustic stack 105, wherein the cavity 115 is initially filled with a sacrificial material (not shown), such as phosposilicate glass (PSG) or other release processes, such as polysilicon and xenon difluoride etchant, as would be apparent to one of ordinary skill in the art, during fabrication of layers of the acoustic stack 105. The release of the sacrificial material to form the cavity 115 is carried out using a suitable etchant, such as HF, after fabrication of the layers of the acoustic stack 105 (e.g., after formation of the second electrode 140). In alternative configurations, the cavity 115 may pass through the substrate 110 to form a backside opening, which may be formed by back side etching a bottom surface of the substrate 110. The back side etching may include a dry etch process, such as a Bosch process, for example, although various alternative techniques may be incorporated.
Alternatively, the substrate 110 may include an acoustic isolator, such as an acoustic mirror or Bragg Reflectors, rather than the cavity 115, Such acoustic isolator may be formed in the substrate 110 using any technique compatible with semiconductor processes before forming the acoustic stack 105, as would be apparent to one of ordinary skill in the art.
In block S313, oxide layer 124 is formed on a top surface of the electrode layer 122, to form a temperature compensating layer. In an embodiment, the oxide layer 124 is formed of BSG, for example, although different materials may be used, as discussed above, without departing from the scope of the present teachings. The oxide layer 124 may be applied using spin-on, sputtering, evaporation or CVD techniques, for example, although other application methods may be incorporated. Various illustrative techniques for forming temperature compensating layers are described, for example, in U.S. Pat. No. 7,561 009 to Larson, III, et al., which is hereby incorporated by reference.
In block S314, the oxide layer 124 is etched to a desired size and the edges 124a are tapered. For example, a photoresist layer (not shown) may be applied to the top surface of the oxide layer 124 and patterned to form a mask or photoresist pattern, using any photoresist patterning technique compatible with semiconductor processes, as would be apparent to one of ordinary skill in the art. The photoresist pattern may be formed by machining or by chemically etching the photoresist layer using photolithography, although various alternative techniques may he incorporated. Following etching of the oxide layer 124, the photoresist pattern is removed, for example, by chemically releasing or etching using a wet etch process including HF etch solution, although the photoresist pattern may be removed by various other techniques, without departing from the scope of the present teachings.
In various embodiments, to obtain the tapered edges 124a, oxygen is leaked into the etcher used to etch the oxide layer 124. The oxide (and/or temperature chuck) causes the photoresist to erode more quickly at the edges of the patterned photo resist and to pull back slightly. This “thinning” of the resist forms a wedge shape profile that is then imprinted into the oxide underneath as the photoresist goes away. Generally, the wedge is created by adjusting the etch rate of resist relative to the etched material, as would be apparent to one of ordinary skill in the art. Meanwhile, further from the edges of the oxide layer 124, there is sufficient photoresist coverage throughout the etch that the underlying oxide material is not touched. Of course, other methods of obtaining tapered edges may be incorporated without departing form the scope of the present teachings.
The conductive interposer layer 126 is applied to a top surface of the oxide layer 124 in block S315. The conductive interposer layer 126 is formed of Mo, for example, although different materials may be used, as discussed above, without departing from the scope of the present teachings. The conductive interposer layer 126 may be applied using spin-on, sputtering, evaporation or CVD techniques, for example, although other application methods may be incorporated.
In an alternative embodiment, an interim seed layer (not shown) is formed on the top surface of the oxide layer 124 before the oxide layer 124 is etched. The interim seed layer may be formed of the same piezoelectric material as the piezoelectric layer 130, such as AlN, for example. The interim seed layer may be formed to a thickness of about 300 Å, for example, and reduces or minimizes oxide diffusion. from the oxide layer 124 into the piezoelectric layer 130. Outer portions of the interim seed layer are removed by etching, along with the etched portions of the oxide layer 124, to expose portions of the top surface of the electrode layer 122, so that the electrode layer 122 is able to make an electrical connection between with the conductive interposer layer 126. In other words, after etching, the interim seed layer covers only the top surface of the oxide layer 124, so that it is positioned between the oxide layer 124 and the conductive interposer layer 126.
In block S316, the piezoelectric layer 130 is applied to a top surface of the conductive interposer layer 126, which is also the top surface of the composite first electrode 120. The piezoelectric layer 130 is formed of AlN, for example, although different materials may be used, as discussed above, without departing from the scope of the present teachings. The piezoelectric layer 130 may be applied using a sputtering technique, for example, although other application methods may be incorporated. For example, the piezoelectric layer 130 may be grown from a seed layer, as discussed above, according to various techniques compatible with semiconductor processes.
The second electrode 140 is applied to a top surface of the piezoelectric layer 130 in block S317. The is second electrode 140 formed of W, for example, although different materials may be used, as discussed above, without departing from the scope of the present teachings. The second electrode 140 may be applied using spin-on, sputtering, evaporation or CVD techniques, for example, although other application methods may be incorporated. In various embodiments, the second. electrode 140 includes a passivation layer formed of BSG, SiO2, SiN, polysilicon, or the like.
The resonator device 100 may then be cut or separated from a wafer, to the extent necessary, in order to form a singulated die. The resonator device 100 may be separated using various techniques compatible with semiconductor fabrication processes, such as scribe and break, for example.
Referring to
More particularly, the first electrode 420 is formed of an electrically conductive material, such as W. Mo, Al, Pt, Ru, Nb or Hf, for example, on the substrate 410. The piezoelectric layer 430 is formed of a piezoelectric material, such as AlN, ZnO or PZT, for example, on the first electrode 420. The composite second electrode 440 is formed on the piezoelectric layer 430, such that a buried oxide layer 444 is separated from the piezoelectric layer 430 by a conductive interposer layer 446.
For example, in an embodiment, the conductive interposer layer 446 is applied to the top, substantially planar surface of the piezoelectric layer 430 at a desired thickness T446. As discussed above, the thicker the conductive interposer layer 446, the more buried the oxide layer 444 is within the composite second electrode 440 (i.e., further removed from the piezoelectric layer 430). The buried oxide layer 444 is then applied to the top surface of the conductive interposer layer 446 to form a temperature compensating layer. The buried oxide layer 444 may be applied using spin-on, sputtering, evaporation or CVD techniques, for example, although other application methods may be incorporated. Also, the buried oxide layer 444 is etched to a desired size and the edges 444a may be tapered, as discussed above with respect to the oxide layer 124.
The electrode layer 442 is formed over the buried oxide layer 444 and the conductive interposer layer 446. The electrode layer 442 has a thickness T442 (at outer portions, not over the buried oxide layer 444), which may include a passivation layer (not shown), as discussed above. The thickness T442 may vary such that an overall second thickness T440 of the composite second electrode 440 is substantially the same as an overall first thickness T420 of the first electrode 420.
As discussed above, the conductive interposer layer 446 and the electrode layer 442 are formed of electrically conductive materials, such W, Mo, Al, Pt, Ru, Nb or Hf, for example. Also, the conductive interposer layer 446 and the electrode layer 422 may be formed of the same or different materials, to provide various benefits or to meet application specific design requirements of various implementations, as would be apparent to one of ordinary skill in the art. In an embodiment, the electrode layer 442 is formed of the same material as the first electrode 420, although the electrode layer 442 and the first electrode 420 may be formed of different materials from one another in alternative embodiments.
The buried oxide layer 444 is a temperature compensating layer, formed between the conductive interposer layer 446 and the electrode layer 442, in substantially the same manner discussed above with respect to oxide layer 124. The buried oxide layer 444 may be formed of various materials compatible with semiconductor processes, including BSG, SiO2, SiN, or polysilicon, for example, which have positive temperature coefficients. Because the buried oxide layer 444 does not extend the full width of the acoustic stack 405, the conductive interposer layer 446 forms a DC electrical connection with the electrode layer 442, which effectively “shorts” out a capacitive component of the buried oxide layer 444 and increases a coupling coefficient (kt2) of the resonator stack 400, as discussed above. In addition, the conductive interposer layer 446 provides a barrier that prevents oxygen in the buried oxide layer 444 from diffusing into the piezoelectric layer 430.
In various additional embodiments, the acoustic stack of the resonator device may include composite electrodes formed on both the top and bottom surfaces of the piezoelectric layer, without departing from the scope of the present teachings.
According to various embodiments, an acoustic stack of a resonator device has at least one composite electrode that includes a buried temperature compensating layer separated from a piezoelectric layer by a conductive interposer layer. The temperature compensating layer has a temperature coefficient that has an opposite sign from a temperature coefficient of at least one other element in the acoustic stack, thus offsetting the effects of that temperature coefficient. Further, the conductive interposer layer effectively shorts out a capacitive component of the temperature compensating layer, which effectively increases a coupling coefficient of the resonator device. Accordingly, this enables more stable operation of the resonator, for example, by preventing shifts in passband due to increases in temperature, while preventing contamination of the piezoelectric material by the material in the temperature compensating layer.
The various components, materials, structures and parameters are included by way of illustration and example only and not in any limiting sense. In view of this disclosure, those skilled in the art can implement the present teachings in determining their own applications and needed components, materials, structures and equipment to implement these applications, while remaining within the scope of the appended claims.
The present application is a continuation application under 37 C.F.R. §1.53(b) of commonly owned U.S. patent application Ser. No. 12/769,791 to Richard C. Ruby, et al. and entitled “RESONATOR DEVICE INCLUDING ELECTRODE WITH BURIED TEMPERATURE COMPENSATING LAYER”, and filed on Apr. 29, 2010 Applicants claim priority under 35 U.S.C. §120 from U.S. patent application Ser.. No. 12/769,791, and the entire disclosure of U.S. patent application Ser. No. 12/769,791 is specifically incorporated herein by reference.
Number | Date | Country | |
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Parent | 12769791 | Apr 2010 | US |
Child | 13624046 | US |