A graphics processing unit (GPU) comprises a highly parallel structure which is designed to efficiently process large amounts of data in parallel. GPUs are typically used for computer graphics (e.g. to render images on a screen), however they may also be used for other operations which benefit from the parallelism they provide.
In a parallel processing system (e.g. a system comprising a GPU and memory), when a task is ready to be executed, the required resources (e.g. registers and/or memory) are allocated to that task. Having a large number of tasks that are ready to be executed reduces the idling of functional units.
The embodiments described below are provided by way of example only and are not limiting of implementations which solve any or all of the disadvantages of known methods of resource allocation.
This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.
A method of resource allocation in a parallel processing system is described. The method comprises receiving a request to allocate resources to a task, where the request identifies an amount of resources required to execute a next chunk of the task only, and when available, allocating to the task, the amount of resources required to execute the next chunk of the task.
A first aspect provides a method of allocating resource to a task in a parallel processing system, the method comprising: receiving a request to allocate resources to a task, the request identifying an amount of resources required to execute a next chunk of the task only and wherein the task is partitioned into a plurality of chunks; determining whether the amount of resources required to execute the next chunk of the task is available; in response to determining that the amount of resources required to execute the next chunk of the task is not available, pausing the task; and in response to determining that the amount of resources required to execute the next chunk of the task is available, allocating the resources to the task.
A second aspect provides a method of allocating resource to a task in a parallel processing system, the method comprising: receiving a request to allocate resources to a task, the request identifying both an amount of resources required to execute a next chunk of the task only and an amount of resources required to execute the entire task and wherein the task is partitioned into a plurality of chunks; determining whether the amount of resources required to execute the entire task has already been allocated to the task; and in response to determining that the amount of resources required to execute the entire task has not already been allocated to the task: determining whether the amount of resources required to execute the entire task is available; and in response to determining that the amount of resources required to execute the entire task is available, allocating the resources to the task; and in response to determining that the amount of resources required to execute the entire task is not available: determining whether the amount of resources required to execute the next chunk of the task is available; and in response to determining that the amount of resources required to execute the next chunk of the task is not available, pausing the task; and in response to determining that the amount of resources required to execute the next chunk of the task is available, allocating the resources to the task.
A third aspect provides a method of allocating resource to a task in a parallel processing system, the method comprising: receiving a request to allocate resources to a task, the request identifying both an amount of resources required to execute a next chunk of the task only and an amount of resources required to execute the entire task and wherein the task is partitioned into a plurality of chunks; and in a first mode of operation: determining whether the amount of resources required to execute the entire task has already been allocated to the task; and in response to determining that the amount of resources required to execute the entire task has not already been allocated to the task: determining whether the amount of resources required to execute the entire task is available; and in response to determining that the amount of resources required to execute the entire task is available, allocating the resources to the task; and in response to determining that the amount of resources required to execute the entire task is not available: determining whether the amount of resources required to execute the next chunk of the task is available; and in response to determining that the amount of resources required to execute the next chunk of the task is not available, pausing the task; and in response to determining that the amount of resources required to execute the next chunk of the task is available, allocating the resources to the task; and in a second mode of operation: determining whether the amount of resources required to execute the entire task has already been allocated to the task; in response to determining that the amount of resources required to execute the entire task has already been allocated to the task, reducing the allocation of resources to the task to the amount of resources required to execute the next chunk of the task; and in response to determining that the amount of resources required to execute the entire task has not already been allocated to the task: determining whether the amount of resources required to execute the next chunk of the task is available; and in response to determining that the amount of resources required to execute the next chunk of the task is not available, pausing the task; and in response to determining that the amount of resources required to execute the next chunk of the task is available, allocating the resources to the task.
A fourth aspect provides a method of partitioning a program into a plurality of chunks, the method comprising: analysing, in a compiler, resource requirements of the program over time against one or more thresholds; inserting an initial instruction into the program; and inserting an instruction into the program at a position prior to where the resource requirements increase above a threshold for a first time in the program execution sequence.
The method may further comprise inserting an instruction into the program at a position following where the resource requirements fall below a threshold for a last time in the program execution sequence.
The method may further comprise inserting an instruction into the program at a position prior to where the resource requirements increase above a threshold for any subsequent time in the program execution sequence; and inserting an instruction into the program at a position following where the resource requirements fall below a threshold for any prior time in the program execution sequence.
The inserted instruction, when executed, may trigger sending of a request indicating an amount of resources required to execute a next chunk of the program. The request may additionally indicate an amount of resources required to execute the entire program sequence.
A fifth aspect provides a method of partitioning a program into a plurality of chunks, the method comprising: receiving, in an instruction sequencer, metadata associated with the program, the metadata identifying one or more instructions in the program and resource requirements associated with those instructions; monitoring execution of the program; and in response to determining that execution of the program has reached an instruction where the resource requirements increase above a threshold for a first time in the program execution sequence, identifying a chunk boundary.
A sixth aspect provides a parallel processing system comprising: one or more resources for use when executing a task, wherein the task is partitioned into a plurality of chunks; a task scheduler arranged to receive a request to allocate resources to a task, the request identifying an amount of resources required to execute a next chunk of the task only, determine whether the amount of resources required to execute the next chunk of the task is available, in response to determining that the amount of resources required to execute the next chunk of the task is not available, pause the task, and in response to determining that the amount of resources required to execute the next chunk of the task is available, allocate the resources to the task; and one or more execution modules arranged to execute each chunk of the task.
A seventh aspect provides a parallel processing system comprising: one or more resources for use when executing a task, wherein the task is partitioned into a plurality of chunks; a task scheduler arranged to receive a request to allocate resources to a task, the request identifying both an amount of resources required to execute a next chunk of the task only and an amount of resources required to execute the entire task, determine whether the amount of resources required to execute the entire task has already been allocated to the task, and in response to determining that the amount of resources required to execute the entire task has not already been allocated to the task: determine whether the amount of resources required to execute the entire task is available; and in response to determining that the amount of resources required to execute the entire task is available, allocate the resources to the task; and in response to determining that the amount of resources required to execute the entire task is not available: determine whether the amount of resources required to execute the next chunk of the task is available; and in response to determining that the amount of resources required to execute the next chunk of the task is not available, pause the task, and in response to determining that the amount of resources required to execute the next chunk of the task is available, allocate the resources to the task.
An eighth aspect provides a parallel processing system comprising: one or more resources for use when executing a task, wherein the task is partitioned into a plurality of chunks; a task scheduler arranged to receive a request to allocate resources to a task, the request identifying both an amount of resources required to execute a next chunk of the task only and an amount of resources required to execute the entire task, and further arranged in a first mode of operation: to determine whether the amount of resources required to execute the entire task has already been allocated to the task and in response to determining that the amount of resources required to execute the entire task has not already been allocated to the task: determine whether the amount of resources required to execute the entire task is available; and in response to determining that the amount of resources required to execute the entire task is available, allocate the resources to the task; and in response to determining that the amount of resources required to execute the entire task is not available: determine whether the amount of resources required to execute the next chunk of the task is available; and in response to determining that the amount of resources required to execute the next chunk of the task is not available, pause the task; and in response to determining that the amount of resources required to execute the next chunk of the task is available, allocate the resources to the task; and further arranged in a second mode of operation: to determine whether the amount of resources required to execute the entire task has already been allocated to the task; in response to determining that the amount of resources required to execute the entire task has already been allocated to the task, reduce the allocation of resources to the task to the amount of resources required to execute the next chunk of the task; and in response to determining that the amount of resources required to execute the entire task has not already been allocated to the task: determine whether the amount of resources required to execute the next chunk of the task is available; and in response to determining that the amount of resources required to execute the next chunk of the task is not available, pause the task; and in response to determining that the amount of resources required to execute the next chunk of the task is available, allocate the resources to the task.
The processor described herein may be embodied in hardware on an integrated circuit. There may be provided a method of manufacturing, at an integrated circuit manufacturing system, a processor as described herein. There may be provided an integrated circuit definition dataset that, when processed in an integrated circuit manufacturing system, configures the system to manufacture a processor as described herein. There may be provided a non-transitory computer readable storage medium having stored thereon a computer readable description of an integrated circuit that, when processed, causes a layout processing system to generate a circuit layout description used in an integrated circuit manufacturing system to manufacture a processor as described herein.
There may be provided an integrated circuit manufacturing system comprising: a non-transitory computer readable storage medium having stored thereon a computer readable integrated circuit description that describes a processor as described herein; a layout processing system configured to process the integrated circuit description so as to generate a circuit layout description of an integrated circuit embodying the processor; and an integrated circuit generation system configured to manufacture the processor according to the circuit layout description.
There may be provided computer program code for performing any of the methods described herein. There may be provided non-transitory computer readable storage medium having stored thereon computer readable instructions that, when executed at a computer system, cause the computer system to perform any of the methods described herein.
The above features may be combined as appropriate, as would be apparent to a skilled person, and may be combined with any of the aspects of the examples described herein.
Examples will now be described in detail with reference to the accompanying drawings in which:
The accompanying drawings illustrate various examples. The skilled person will appreciate that the illustrated element boundaries (e.g., boxes, groups of boxes, or other shapes) in the drawings represent one example of the boundaries. It may be that in some examples, one element may be designed as multiple elements or that multiple elements may be designed as one element. Common reference numerals are used throughout the figures, where appropriate, to indicate similar features.
The following description is presented by way of example to enable a person skilled in the art to make and use the invention. The present invention is not limited to the embodiments described herein and various modifications to the disclosed embodiments will be apparent to those skilled in the art.
Embodiments will now be described by way of example only.
As described above, when a task is ready to be executed in a parallel processing system (e.g. a system comprising a GPU and memory), the required resources (e.g. registers and/or memory and/or other hardware resources, such as a coprocessor) are allocated to that task. Having a large number of tasks that are ready to be executed reduces the idling of functional units. However, where programs (e.g. shaders) have larger resource requirements, the number of tasks that can be in the ‘ready’ state may be limited (e.g. because there are no resources available to allocate to additional tasks) and this may result in pipeline starvation and hence reduced throughput.
Described herein are various methods and apparatus for resource allocation (e.g. register allocation, memory allocation or allocation of other hardware resources, such as a coprocessor) which enable more tasks to be in a ‘ready’ state at any time. As described in more detail below, the methods comprise partitioning a task into chunks based on changes in resource requirements such that a task in the ‘ready’ state is allocated at least the resources that are required to execute the next chunk of the task. At the end of the chunk, resources that are not required by the following chunk of the task may be released and hence become available to be allocated to a different task. In situations where the immediately following chunk requires additional resources (i.e. resources in excess of those that have already been allocated to the task) these are requested and if available are allocated to the task, such that it can remain in the ‘ready’ state. If, however, the additional resources that are requested are not available, the task is stalled until more resources become available and the additional resources required for the following chunk can be allocated to the task.
The methods described herein may be used where a task has a varying resource requirement over the execution time of the task, such that it can be partitioned into chunks based on changes in resource requirements. For tasks which do not have such a varying resource requirement over time, the allocation of resources to the task may be performed using known methods (e.g. by allocating the resources required to perform the entire task to the task from the outset). The methods described herein may be used alongside such known methods (e.g. as shown in some of the examples described below).
The methods described herein may be implemented in any system running multiple tasks in parallel, whether this parallel operation is achieved using time-slicing (e.g. fine-grained interleaving of tasks such as by cycling between a small number of tasks in a pool of tasks on a cycle-by-cycle basis) or by running tasks in parallel hardware. In various examples, the methods may be implemented a system comprising a GPU and memory and may be implemented within the GPU. In other examples, the methods may be implemented within a CPU.
By using the methods and apparatus described herein for those tasks that can be partitioned into chunks, the resources required to perform the entirety of the task may not be allocated prior to the start of execution of the task, but instead the resources may be partially allocated. Furthermore, some of the resources may be released during execution of the task such that they do not remain allocated to the task for the entirety of the time taken to execute the task. This partial allocation and/or partial release of resources improves the efficiency of the use of the resources and may increase the number of tasks that can be in the ‘ready’ state at any time. This, in turn, may increase the throughput of the parallel processing system. Use of the methods and apparatus described herein may in addition, or instead, enable the parallel processing system to be designed with fewer resources (without impacting throughput) and hence save both power and area.
The term ‘ready’ state is used herein in relation to a task to refer to those tasks where all the task dependencies have been met and the resources required to execute at least a next chunk of the task have been allocated to the task.
The term ‘task’ is used herein to refer to a group of data-items and the work that is to be performed upon those data-items. For example, in a Single Instruction Multiple Data (SIMD) processing system a task may comprise or be associated with a program or reference to a program (e.g. the same sequence of ALU instructions or reference thereto) in addition to a set of data that is to be processed according to the program, where this set of data may comprise one or more data elements (or data-items, e.g. a plurality of pixels or vertices).
The term ‘program instance’ is used herein to refer to individual instances that take a path through the code. A program instance therefore refers to a single data-item and a reference (e.g. pointer) to a program which will be executed on the data-item. A task therefore could be considered to comprise a plurality of program instances (e.g. up to 32 program instances), though in practice only a single instance of the common program (or reference) is required per task. There is therefore a hierarchy of terminology, with tasks comprising one or more program instances.
The term ‘chunk’ is used herein in relation to tasks, such that a task comprises one or more chunks. A chunk is different to a program instance in that a chunk relates to a portion of a program that the task will execute (and not a subset of the group of data-items).
A program typically performs operations on values stored in registers and each program instance requires its own copy of each register value. There may be many registers used (or referenced) by each program and many tasks running concurrently on a processing system and hence the methods described herein may be used to provide a way of flexibly allocating a relatively large number of registers.
A first method of resource allocation can be described with reference to
In response to receiving the request (in block 102), the resources required for execution of the next chunk are allocated if they are available (‘Yes’ in block 104 followed by block 106). This means that the next chunk of the task is now ready for execution and the task can be placed into (or remain in) the ‘ready’ state. If the resources are not available (‘No’ in block 104), then the task is paused (block 108) until the resources for the next chunk are available and can be allocated (in block 106). When a task is paused (or stalled), it is not put into a ‘ready’ state and if the task is already in the ‘ready’ state then the task is removed from that state and placed into another, non-ready, state which may be referred to as a waiting state.
As only the resources required for the next chunk are allocated (in block 106), then following the execution of that particular chunk, e.g. chunk n (where the task is divided into N tasks, n=[0, . . . , N−1] and N>1), there may not be sufficient resources to execute the immediately following chunk of the task, e.g. chunk n+1. Consequently, a further request is received that requests allocation of the resources for the next chunk to be executed (e.g. chunk n+1). The method is repeated (as indicated by the arrow from block 106 to block 102 in
An example implementation of this first method is shown in
As shown in the example of
In order that this method can be implemented, a task (e.g. at least one task) has to be partitioned into chunks based on an increase in resource requirements as the task progresses. A task may be partitioned into chunks if the associated program (e.g. a shader) can itself be partitioned into chunks based on changes in resource requirements. An example method of partitioning of the program (e.g. a shader) into a plurality of chunks can be described with reference to
In various examples, the tasks referred to herein may be tasks associated with shaders that are executed on a GPU. In further examples, the tasks may be associated with other programs (i.e. which are not shaders).
As shown in
It will be appreciated that the graphs of
The positions of the thresholds (and hence the granularity of the partitioning) may be set dependent upon the architecture of the hardware upon which the tasks are executed. For example, where the resources which are allocated are registers, the thresholds may be positioned at a granularity that corresponds to the number of banks in the memory used to implement the registers or may be positioned at a more granular level (e.g. every two registers). In various examples a program may be compiled more than once and in different ways, e.g. with different thresholds dependent upon the hardware upon which the tasks will be executed. In this way, different compiled versions of the program may be partitioned in a different way.
The method of
The first method of resource allocation described above involved partial allocation of resources to a task based on the resource requirements for a next chunk. In addition to, or instead of, performing partial allocation of resources, partial release of resources may be performed, i.e. releasing, following the execution of a chunk of a task, those resources that are not required for the execution of the next chunk of the task. A second method of resource allocation, which can be described with reference to
The second method starts in the same way as the first method (shown in
Where both partial allocation and partial release is implemented, as in the second method of resource allocation, the partitioning of the program (and hence the task) is implemented in a slightly different manner to that described above. Referring back to the method shown in
Referring to the lower example resource profile 404 shown in
It will be appreciated that even where a program is partitioned by the addition of instructions whenever the resource requirements cross a threshold (either from below or above), the method of resource allocation may be set to implement only partial allocation (as in
In other examples, a method of resource allocation may be set to implement only partial release. In such examples, a program may be divided into chunks by the addition of an initial instruction (at, or near, the start of the program) that triggers the request for the maximum amount of resources required to execute the entire program and then additional instructions are added only at points after the resource requirements fall below a threshold for the last time in the program and the method of
In the first and second example methods described above, the requests that are received by the scheduler (in block 102) and which are triggered by the instructions that are added by the compiler, request allocation of the resources that are required for the next chunk of the task only. In a third example method of resource allocation, shown in
As shown in
This hybrid approach may reduce delays that result from the additional resource requests (triggered by the additional instructions inserted into the program) in the event that there are no competing resource requests and may also reduce the need to copy data between registers/memory locations in the event that the task requires its resource allocation to be in a contiguous block. This can be described with reference to
In
The hybrid method of
Whilst the method of
In various examples where the method of
Where the method of
The methods of resource allocation described above may be performed by different parts of a processing system and an example processing system 1100 is shown in
The systems of
The processing systems described herein may be embodied in hardware on an integrated circuit. The processing systems described herein may be configured to perform any of the methods described herein. Generally, any of the functions, methods, techniques or components described above can be implemented in software, firmware, hardware (e.g., fixed logic circuitry), or any combination thereof. The terms “module,” “functionality,” “component”, “element”, “unit”, “block” and “logic” may be used herein to generally represent software, firmware, hardware, or any combination thereof. In the case of a software implementation, the module, functionality, component, element, unit, block or logic represents program code that performs the specified tasks when executed on a processor. The algorithms and methods described herein could be performed by one or more processors executing code that causes the processor(s) to perform the algorithms/methods. Examples of a computer-readable storage medium include a random-access memory (RAM), read-only memory (ROM), an optical disc, flash memory, hard disk memory, and other memory devices that may use magnetic, optical, and other techniques to store instructions or other data and that can be accessed by a machine.
The terms computer program code and computer readable instructions as used herein refer to any kind of executable code for processors, including code expressed in a machine language, an interpreted language or a scripting language. Executable code includes binary code, machine code, bytecode, code defining an integrated circuit (such as a hardware description language or netlist), and code expressed in a programming language code such as C, Java™ or OpenCL™. Executable code may be, for example, any kind of software, firmware, script, module or library which, when suitably executed, processed, interpreted, compiled, executed at a virtual machine or other software environment, cause a processor of the computer system at which the executable code is supported to perform the tasks specified by the code.
A processor, computer, or computer system may be any kind of device, machine or dedicated circuit, or collection or portion thereof, with processing capability such that it can execute instructions. A processor may be any kind of general purpose or dedicated processor, such as a CPU, GPU, System-on-chip, state machine, media processor, an application-specific integrated circuit (ASIC), a programmable logic array, a field-programmable gate array (FPGA), physics processing units (PPUs), radio processing units (RPUs), digital signal processors (DSPs), general purpose processors (e.g. a general purpose GPU), microprocessors, any processing unit which is designed to accelerate tasks outside of a CPU, etc. A computer or computer system may comprise one or more processors. Those skilled in the art will realize that such processing capabilities are incorporated into many different devices and therefore the term ‘computer’ includes set top boxes, media players, digital radios, PCs, servers, mobile telephones, personal digital assistants and many other devices.
It is also intended to encompass software which defines a configuration of hardware as described herein, such as HDL (hardware description language) software, as is used for designing integrated circuits, or for configuring programmable chips, to carry out desired functions. That is, there may be provided a computer readable storage medium having encoded thereon computer readable program code in the form of an integrated circuit definition dataset that when processed (i.e. run) in an integrated circuit manufacturing system configures the system to manufacture a processor configured to perform any of the methods described herein, or to manufacture a processing system comprising any apparatus described herein. An integrated circuit definition dataset may be, for example, an integrated circuit description.
Therefore, there may be provided a method of manufacturing, at an integrated circuit manufacturing system, a processor as described herein. Furthermore, there may be provided an integrated circuit definition dataset that, when processed in an integrated circuit manufacturing system, causes the method of manufacturing a processor to be performed.
An integrated circuit definition dataset may be in the form of computer code, for example as a netlist, code for configuring a programmable chip, as a hardware description language defining an integrated circuit at any level, including as register transfer level (RTL) code, as high-level circuit representations such as Verilog or VHDL, and as low-level circuit representations such as OASIS (RTM) and GDSII. Higher level representations which logically define an integrated circuit (such as RTL) may be processed at a computer system configured for generating a manufacturing definition of an integrated circuit in the context of a software environment comprising definitions of circuit elements and rules for combining those elements in order to generate the manufacturing definition of an integrated circuit so defined by the representation. As is typically the case with software executing at a computer system so as to define a machine, one or more intermediate user steps (e.g. providing commands, variables etc.) may be required in order for a computer system configured for generating a manufacturing definition of an integrated circuit to execute code defining an integrated circuit so as to generate the manufacturing definition of that integrated circuit.
An example of processing an integrated circuit definition dataset at an integrated circuit manufacturing system so as to configure the system to manufacture a processor will now be described with respect to
The layout processing system 1304 is configured to receive and process the IC definition dataset to determine a circuit layout. Methods of determining a circuit layout from an IC definition dataset are known in the art, and for example may involve synthesising RTL code to determine a gate level representation of a circuit to be generated, e.g. in terms of logical components (e.g. NAND, NOR, AND, OR, MUX and FLIP-FLOP components). A circuit layout can be determined from the gate level representation of the circuit by determining positional information for the logical components. This may be done automatically or with user involvement in order to optimise the circuit layout. When the layout processing system 1304 has determined the circuit layout it may output a circuit layout definition to the IC generation system 1306. A circuit layout definition may be, for example, a circuit layout description.
The IC generation system 1306 generates an IC according to the circuit layout definition, as is known in the art. For example, the IC generation system 1306 may implement a semiconductor device fabrication process to generate the IC, which may involve a multiple-step sequence of photo lithographic and chemical processing steps during which electronic circuits are gradually created on a wafer made of semiconducting material. The circuit layout definition may be in the form of a mask which can be used in a lithographic process for generating an IC according to the circuit definition. Alternatively, the circuit layout definition provided to the IC generation system 1306 may be in the form of computer-readable code which the IC generation system 1306 can use to form a suitable mask for use in generating an IC.
The different processes performed by the IC manufacturing system 1302 may be implemented all in one location, e.g. by one party. Alternatively, the IC manufacturing system 1302 may be a distributed system such that some of the processes may be performed at different locations, and may be performed by different parties. For example, some of the stages of: (i) synthesising RTL code representing the IC definition dataset to form a gate level representation of a circuit to be generated, (ii) generating a circuit layout based on the gate level representation, (iii) forming a mask in accordance with the circuit layout, and (iv) fabricating an integrated circuit using the mask, may be performed in different locations and/or by different parties.
In other examples, processing of the integrated circuit definition dataset at an integrated circuit manufacturing system may configure the system to manufacture a processor without the IC definition dataset being processed so as to determine a circuit layout. For instance, an integrated circuit definition dataset may define the configuration of a reconfigurable processor, such as an FPGA, and the processing of that dataset may configure an IC manufacturing system to generate a reconfigurable processor having that defined configuration (e.g. by loading configuration data to the FPGA).
In some embodiments, an integrated circuit manufacturing definition dataset, when processed in an integrated circuit manufacturing system, may cause an integrated circuit manufacturing system to generate a device as described herein. For example, the configuration of an integrated circuit manufacturing system in the manner described above with respect to
In some examples, an integrated circuit definition dataset could include software which runs on hardware defined at the dataset or in combination with hardware defined at the dataset. In the example shown in
Those skilled in the art will realize that storage devices utilized to store program instructions can be distributed across a network. For example, a remote computer may store an example of the process described as software. A local or terminal computer may access the remote computer and download a part or all of the software to run the program. Alternatively, the local computer may download pieces of the software as needed, or execute some software instructions at the local terminal and some at the remote computer (or computer network). Those skilled in the art will also realize that by utilizing conventional techniques known to those skilled in the art that all, or a portion of the software instructions may be carried out by a dedicated circuit, such as a DSP, programmable logic array, or the like.
The methods described herein may be performed by a computer configured with software in machine readable form stored on a tangible storage medium e.g. in the form of a computer program comprising computer readable program code for configuring a computer to perform the constituent portions of described methods or in the form of a computer program comprising computer program code means adapted to perform all the steps of any of the methods described herein when the program is run on a computer and where the computer program may be embodied on a computer readable storage medium. Examples of tangible (or non-transitory) storage media include disks, thumb drives, memory cards etc. and do not include propagated signals. The software can be suitable for execution on a parallel processor or a serial processor such that the method steps may be carried out in any suitable order, or simultaneously.
The hardware components described herein may be generated by a non-transitory computer readable storage medium having encoded thereon computer readable program code.
Memories storing machine executable data for use in implementing disclosed aspects can be non-transitory media. Non-transitory media can be volatile or non-volatile. Examples of volatile non-transitory media include semiconductor-based memory, such as SRAM or DRAM. Examples of technologies that can be used to implement non-volatile memory include optical and magnetic memory technologies, flash memory, phase change memory, resistive RAM.
A particular reference to “logic” refers to structure that performs a function or functions. An example of logic includes circuitry that is arranged to perform those function(s). For example, such circuitry may include transistors and/or other hardware elements available in a manufacturing process. Such transistors and/or other elements may be used to form circuitry or structures that implement and/or contain memory, such as registers, flip flops, or latches, logical operators, such as Boolean operations, mathematical operators, such as adders, multipliers, or shifters, and interconnect, by way of example. Such elements may be provided as custom circuits or standard cell libraries, macros, or at other levels of abstraction. Such elements may be interconnected in a specific arrangement. Logic may include circuitry that is fixed function and circuitry can be programmed to perform a function or functions; such programming may be provided from a firmware or software update or control mechanism. Logic identified to perform one function may also include logic that implements a constituent function or sub-process. In an example, hardware logic has circuitry that implements a fixed function operation, or operations, state machine or process.
The implementation of concepts set forth in this application in devices, apparatus, modules, and/or systems (as well as in methods implemented herein) may give rise to performance improvements when compared with known implementations. The performance improvements may include one or more of increased computational performance, reduced latency, increased throughput, and/or reduced power consumption. During manufacture of such devices, apparatus, modules, and systems (e.g. in integrated circuits) performance improvements can be traded-off against the physical implementation, thereby improving the method of manufacture. For example, a performance improvement may be traded against layout area, thereby matching the performance of a known implementation but using less silicon. This may be done, for example, by reusing functional blocks in a serialised fashion or sharing functional blocks between elements of the devices, apparatus, modules and/or systems. Conversely, concepts set forth in this application that give rise to improvements in the physical implementation of the devices, apparatus, modules, and systems (such as reduced silicon area) may be traded for improved performance. This may be done, for example, by manufacturing multiple instances of a module within a predefined area budget.”
Any range or device value given herein may be extended or altered without losing the effect sought, as will be apparent to the skilled person.
It will be understood that the benefits and advantages described above may relate to one embodiment or may relate to several embodiments. The embodiments are not limited to those that solve any or all of the stated problems or those that have any or all of the stated benefits and advantages.
Any reference to ‘an’ item refers to one or more of those items. The term ‘comprising’ is used herein to mean including the method blocks or elements identified, but that such blocks or elements do not comprise an exclusive list and an apparatus may contain additional blocks or elements and a method may contain additional operations or elements. Furthermore, the blocks, elements and operations are themselves not impliedly closed.
The steps of the methods described herein may be carried out in any suitable order, or simultaneously where appropriate. The arrows between boxes in the figures show one example sequence of method steps but are not intended to exclude other sequences or the performance of multiple steps in parallel. Additionally, individual blocks may be deleted from any of the methods without departing from the spirit and scope of the subject matter described herein. Aspects of any of the examples described above may be combined with aspects of any of the other examples described to form further examples without losing the effect sought. Where elements of the figures are shown connected by arrows, it will be appreciated that these arrows show just one example flow of communications (including data and control messages) between elements. The flow between elements may be in either direction or in both directions.
The applicant hereby discloses in isolation each individual feature described herein and any combination of two or more such features, to the extent that such features or combinations are capable of being carried out based on the present specification as a whole in the light of the common general knowledge of a person skilled in the art, irrespective of whether such features or combinations of features solve any problems disclosed herein. In view of the foregoing description it will be evident to a person skilled in the art that various modifications may be made within the scope of the invention.
Number | Date | Country | Kind |
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2003051.6 | Mar 2020 | GB | national |