Patent Application
20220368286
This application claims priority from United Kingdom Patent Application No. 2106947.1, filed May 14, 2021, which application is incorporated herein by reference in its entirety.
The present invention relates to a radio frequency (RF) amplifier with a cascode device, particularly though not exclusively in relation to an RF power amplifier, which provides improvements in compression behaviour while retaining good electrical reliability.
Many modern electronic devices include one or more RF receivers, transmitters, and/or transceivers that provides for communication over a wireless interface. Examples of communications standards that make use of such devices include short-range communications protocols Bluetooth® and Bluetooth Low Energy® as well as cellular communications, such as the Long Term Evolution (LTE™) standard set out by 3GPP™. Such devices typically include one or more RF power amplifiers, which amplify an incoming signal to produce a signal of greater amplitude. Generally, such amplifiers include transconductance amplifiers, i.e. amplifiers that receive an RF input voltage and generate an RF output current.
Those skilled in the art will appreciate than an important design consideration for such amplifiers is its compression behaviour. An RF amplifier with steeper compression behaviour can be operated closer to saturation, i.e. with reduced back-off and consequently better efficiency can be obtained. However, it is typically extremely challenging to design high output power RF amplifier with nanoscale processes due to low operational and breakdown voltages of generally available devices. As a result, a ‘cascode’ device (or devices) is typically required to protect the actual gain device, where the gain is typically a transconductance gm.
However, the Applicant has appreciated that using traditional biasing techniques with cascode devices may cause early compression in the output power of the amplifier.
The Applicant has appreciated that the envelope of the received signal changes with time, particularly when working with different input powers. As outlined in further detail below with reference to
When viewed from a first aspect, embodiments of the present invention provide an RF amplifier comprising:
The predetermined reference voltage is generally referred to throughout this disclosure as VBCG.
The feedback circuit portion provides closed loop feedback to control the voltage at the MID node between the first terminal of the first transistor and the second terminal of the second transistor. In some embodiments, the feedback circuit portion comprises an operational amplifier configured to determine the difference between the average node voltage and the predetermined reference voltage and to generate the control voltage. In a particular set of such embodiments, the operational amplifier (or ‘op-amp’) has an inverting input and a non-inverting input, wherein the average node voltage is supplied to the inverting input, and wherein the predetermined reference voltage is supplied to the non-inverting input. It will be appreciated that, in general, an operational amplifier produces an output voltage proportional to the voltage at its non-inverting input minus the voltage at its inverting input, where the proportion is determined by the gain of the operational amplifier. In such embodiments, the control voltage is this output of the operational amplifier.
As outlined above, the feedback circuit portion averages the MID node voltage. This is done to remove the RF component of the voltage such that the gate of the second transistor is not modulated by the RF signal. In general, this may be achieved by passing the node voltage through a filter having a cut-off (or ‘corner’) frequency, where signals above this cut-off are significantly attenuated, i.e. a low-pass filter. This filter may, in some embodiments, be built in to a component of the feedback circuit portion, e.g. it may be an internal filter within an op-amp as discussed above.
However, in a particular set of embodiments, a filter network is connected between the node and the inverting input of the op-amp, the filter network comprising a resistor and a capacitor arranged such that:
In a set of potentially overlapping embodiments, a (second) filter network is connected between an input to the amplifier and the control terminal of the first transistor. This filter network may, in some such embodiments, be arranged to block unwanted DC signals from entering the amplifier and to only allow the RF signals of interest as an input. Thus the filter may be a high-pass filter with a properly selected cut-off frequency to permit the wanted RF signals into the amplifier, or may be a bandpass filter with a passband encompassing the bandwidth of interest. In a particular set of such embodiments, the second filter network comprises a second resistor and a second capacitor arranged such that:
It will be appreciated that the term ‘second’ as used here in respect of the second filter network, second capacitor, and second resistor does not necessitate the existence of the ‘first’ filter network, capacitor, and/or resistor (i.e. those described in the preceding paragraph as sitting between the node and the inverting input of an op-amp). The present invention extends to embodiments having neither, one, or both such filter networks and associated components thereof, and the labels ‘first’ and ‘second’ are used only to refer to these elements individually.
Those skilled in the art will readily appreciate that transistors are generally arranged such that the current that flows between the first and second terminals is dependent on the state of the control terminal. There are a number of different transistor technologies, known in the art per se, which may be used to implement embodiments of the present invention. In some embodiments, the first and/or second transistors comprise field-effect-transistors (FETs). In particular, the first and/or second transistors may be metal-oxide-semiconductor FETs (MOSFETS). In a particular set of embodiments, the first and/or second transistors respectively may comprise an n-channel MOSFET.
Thus, for one or more of the transistors, the control terminal may be a gate terminal, the first terminal may be a drain terminal, and the second terminal may be a source terminal.
It will be appreciated, however, that the first and second transistors may comprise any suitable type of transistor, such as a heterojunction bipolar transistor (HBT), high-electron-mobility transistor (HEMT), insulated-gate bipolar transistor (IGBT). For example, the first and/or second transistors may comprise bipolar junction transistors (BJTs). As such, the control terminal may be a base terminal, the first terminal may be a collector terminal, and the second terminal may be an emitter terminal.
As outlined herein in respect of certain embodiments of the present invention, there may be provided one or more further transistors, each having respective first, second, and control terminals. Each of these may be a FET or a BJT, or any other suitable type of transistor. Arrangements are envisaged in which different transistors used in the device are different types of transistor to one another.
The second terminal of the first transistor may, in general, be connected to a predetermined voltage level or supply rail, which is typically the negative supply rail (i.e. ‘VSS’) or ground.
The first terminal of the second transistor may, in general, be connected to a predetermined voltage level or supply rail, which is typically the positive supply rail (i.e. VDD) via an impedance, to ensure proper generation of the (RF) output signal. In some embodiments, the impedance comprises an inductor connected between the first terminal of the second transistor and the positive supply rail. In particular, a first terminal of the inductor may be connected to the first terminal of the second transistor and a second terminal of the inductor may be connected to the positive supply rail. This inductor or ‘choke’ has a voltage drop across it approximately equal to the inductance of the inductor multiplied by the time derivative of the current through the first and second transistors. While the output voltage in such an arrangement theoretically swings around the positive supply rail voltage (i.e. alternating above and below the positive supply voltage VDD), it will be appreciated that in reality the inductor may have an associated resistive loss, which will cause a slight drop in the average of the output voltage (i.e. causing the average of the output to drop below VDD).
A third capacitor may, in some embodiments, be connected between the control terminal of the second transistor and a supply rail (e.g. the negative supply rail) or ground. This capacitor may act to control the gate impedance of the cascode device (i.e. the second transistor) at RF frequencies, i.e. to avoid gate modulation due to parasitic capacitances. This third capacitor can also be used as a loop stability compensation for the closed loop response.
The amplifier described hereinabove may be used in a single-ended configuration, i.e. the RF input voltage and RF output current are both single-ended. However, in some embodiments the amplifier is a differential amplifier. In some such embodiments, the amplifier further comprises:
In such embodiments, a differential RF output may be taken across the first terminals of the second and fourth transistors.
In some embodiments, multiple cascode devices may be ‘stacked’, wherein each cascode device may be controlled by an individual closed feedback loop, or may be controlled together with the same closed feedback loop that controls at least one another cascode device.
Thus in some embodiments, the amplifier further comprises a fifth transistor having respective first, second, and control terminals, wherein the second terminal of the fifth transistor is connected to the first terminal of the second transistor, and wherein the output of the RF amplifier is connected to the first terminal of the fifth transistor. One or more further transistors may be connected between the second terminal of the fifth transistor and the first terminal of the second transistor, such that said transistors are arranged such that the first terminal of each transistor is connected to the second terminal of the transistor above it.
In a particular set of embodiments in which the amplifier is a differential amplifier, a stack of cascode devices may be provided on each side of the differential amplifier. In other words, a sixth transistor having respective first, second, and control terminals, may be arranged such that the second terminal of the sixth transistor is connected to the first terminal of the fourth transistor. In such embodiments, a differential RF output may be taken across the first terminals of the fifth and sixth transistors. One or more further stacked cascode transistors may be connected between the fourth and sixth transistors in the same way as those optional further transistors discussed above that may be connected between the second and fifth transistors.
The stacked cascode devices may each be controlled by a respective dedicated feedback circuit portion, or a feedback circuit portion may control more than one (and potentially all) of the stacked cascode devices, i.e. the output of a feedback circuit portion (e.g. the output of the op-amp) may be connected to the control terminals of more than one cascode device. Where a single feedback circuit portion drives the control terminals of multiple stacked cascode devices, a potential divider may be used to divide the output voltage of the feedback circuit portion (e.g. the output of the op-amp) appropriately such that the control terminal of each of the stacked cascode devices is supplied with the desired proportion of the feedback circuit's output voltage.
It will be appreciated that the optional features described above with respect to various embodiments of the present invention may be combined together in any combination or permutation, as appropriate.
Certain embodiments of the invention will now be described, by way of non-limiting example only, with reference to the accompanying drawings in which:
In the amplifier 100 of
A voltage source VBCG biases the cascode device NCG via a resistor RCG. A capacitor CCG provides a small impedance path at RF frequencies to avoid or control capacitive modulation of the RF signal. A further capacitor CMOD (which may be a physical capacitor or simply the parasitic capacitance from NCG device) tends to modulate CGGATE node, which can be alleviated or adjusted with the capacitor CCG. If CGGATE is allowed to be modulated with RF, it can be used to share the stress or excess voltage between cascode devices and the gm device NCS. However, this tends to degrade the compression behaviour of the amplifier 100.
When the RF input level is increased, the average current level from the gm device NCS increases, as it is generally not biased to class-A but somewhere in class-AB operation. When the current level is increased, the voltage Vgs_NCG of the cascode device NCG increases, which causes the voltage at the MID node 101 to decrease. As the voltage at the MID node 101 decreases, it modulates the transconductance in the gm device NCS, eventually compressing and saturating the input voltage to output current transfer function, thereby causing the whole amplifier 100 to compress too early.
In particular,
Specifically, the op-amp 404 is arranged such that its non-inverting input terminal is connected to VBCG and such that its inverting input terminal is connected to the MID node via a low-pass filter constructed from a resistor RFILT and a capacitor CFILTThis drives the average voltage at the MID node equal to the VBCG voltage. As outlined in further detail below, the low-pass filter RFILT, CFILT acts to ‘average’ the voltage at the MID node such that RF frequency components are removed, while allowing the DC component (i.e. the average) of the MID node voltage to pass to the inverting input of the op-amp 404.
The op-amp 404 acts to compare the average voltage at the MID node 401 to the predetermined voltage VBCG at the non-inverting input of the op-amp 404, and outputs a control voltage CGGATE that is proportional to the difference between them.
RF modulated signals such as those used in LTE® cellular communication systems may have varying envelope power, i.e. they have non-zero peak-to-average power ratio (PAPR). The filtering provided by RFILT and CFILT removes the RF component of the MID node voltage, leaving only the average component of the voltage at the MID node 401. In order for the closed loop to follow the RF envelope, the filter also preserves the slowly varying envelope component of the voltage at the MID node 401.
The capacitor CCG connected to the gate terminal of the cascode device NCG controls the cascode device gate impedance at RF frequencies, i.e. to avoid gate modulation due to parasitic capacitances. This capacitor CCG can also be used as a loop stability compensation for the closed loop response.
Thus in this closed loop implementation, as the input RF level increases, CGGATE is biased to a higher voltage level leaving more operation voltage margin for the gm device NCS and consequently avoiding early compression. As the average level of the MID node voltage is driven to VBCG at all times, this also provides good protection for the gm device NCS.
The effect of this invention in the compression behaviour of the RF amplifier 400 is presented in
This invention can be applied also in differential implementations, where an embodiment of such a differential amplifier 700 is shown in
Each of these branches is alike in function and structure to the stacked gm device NCS and cascode device NCG described previously with respect to
In such an arrangement, a separate feedback circuit portion could be provided for each branch, or they could be controlled with the same closed loop feedback circuit portion. In the particular embodiment of
The op-amp 704 compares the average voltage at the MIDP and MIDN nodes 701P, 701N to the reference voltage VBCG and generates at its output a control voltage CGGATE that is proportional to the difference between them. This control voltage CGGATE is applied to the gate terminals of the cascode devices NCGP, NCGN in each of the positive and negative branches.
With case of a stack of two or more cascode devices, there could be a separate closed loop for each device, or there could be a common control as is the case in the amplifier 800 of
In the common control approach shown in
A potential divider constructed from RB1 and RB2 divides the output of the op-amp 804 and distributes control voltages CGGATE1 and CGGATE2 to the gate terminals of the first cascode device NCG1 and second cascode device NCG2 respectively, where these are dependent on the ratio of RB1 and RB2.
The techniques shown in
Thus it will be appreciated that embodiments of the present invention provide an improved RF amplifier which utilises closed loop feedback to measure the voltage at the MID node and to drive the average voltage at the MID node toward a predetermined reference voltage. This arrangement may provide improved operation voltage margins for the gm device and avoid early compression.
While specific embodiments of the present invention have been described in detail, it will be appreciated by those skilled in the art that the embodiments described in detail are not limiting on the scope of the claimed invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2106947.1 | May 2021 | GB | national |
