The present disclosure relates to radio frequency front end architectures. In particular but not exclusively, the present disclosure relates to RF front end circuits having a reduced noise figure by eliminating the requirement for switches connected to the inputs to low noise amplifiers.
RF front end architectures containing LNAs are key building block in the front end of wireless systems and find many uses in applications such as mobile phones and wireless LANs. A low-noise amplifier is used to increase the dynamic range of a receiver. The LNA is used to provide amplification when the signal level is weak. The output of the LNA provides the signal to the receiver that is of sufficient amplitude to meet the required system sensitivity.
Performance metrics such as noise figure, gain, linearity, input and output return loss are critical in RF LNA design. Typically the signals that are connected to the input ports of the RF Switch LNA contain frequencies that fall within specific bands. Each of the input ports carries signals that fall within different frequency bands. Advances in carrier aggregation introduces new requirements on RF front end circuits that require one or more inputs to be amplified and routed to one or more output paths for subsequent processing through the receive chain.
There is therefore a need to provide an RF front end circuit that addresses at least some of the drawbacks of the prior art.
These and other problems are addressed by providing an RF front end circuit circuits having a reduced noise figure by eliminating the requirement for switches connected to the inputs of the low noise amplifiers.
The present disclosure relates to an RF front end circuit comprising
In one aspect, by selectively controlling the amplifiers to be active or inactive as required eliminates the need for switches being connected to the inputs of the amplifiers thereby avoiding insertion losses associated with switches contributing to the noise figure of the amplification branches.
In another aspect, multiple amplifiers are activated that are associated with different active input nodes while other amplifiers associated with the different active input nodes are deactived.
In a further aspect, multiple amplifiers are activated simultaneously that are associated with different active input nodes while other amplifiers associated with the different active input nodes are deactived simultaneously.
In an exemplary embodiment, a control circuit is provided for selectively activating the amplifiers.
In another aspect, a plurality of splitters are provided each associated with a corresponding output matching network for splitting the signals from the respective output matching networks into split output signals.
In one aspect, an output switching network is provided for selectively switching the split output signals to selected output nodes.
In an exemplary aspect, each input matching network comprises one or more frequency dependent components.
In a further aspect, each input matching networks comprises one or more inductive elements.
In one aspect, each amplifier comprises an input DC blocking capacitor. Advantageously, each input DC blocking capacitor is operably coupled to a gate of a first transistor.
In a further aspect, a first DC bias voltage source is operably coupled to the gate of the first transistor via a resistive load.
In another aspect, a cascode transistor is operably coupled to the first transistor which together form an amplification stage.
In one aspect, a second DC bias voltage source is operably coupled to the gate of the cascode transistor.
In a further aspect, the cascode transistor is operably coupled to an inductor.
In an exemplary aspect, an output DC blocking capacitor is operably coupled to the two or more amplifier networks.
In one aspect, each amplification branch comprises a degeneration inductor operably coupled to the first transistor.
In an exemplary aspect, the low noise amplifier has a Noise Figure of less than 1 dB.
In another aspect, the low noise amplifier has a Noise Figure of less than 2 dB.
In one aspect, the low noise amplifier is configured to provide a gain of between 10 dB and 20 dB within its frequency range of operation.
The present disclosure also relates to a semiconductor substrate having an RF front end circuit fabricated thereon; wherein the RF front end circuit comprises:
Additionally, the present treaching relates to a method of fabricating an RF front end circuit, the method comprising:
These and other features will be better understood with reference to the following Figures which are provided to assist in an understanding of the present teaching.
The present teaching will now be described with reference to some exemplary RF front end architectures. It will be understood that the exemplary RF front end architectures are provided to assist in an understanding of the present teaching and are not to be construed as limiting in any fashion. Furthermore, circuit elements or components that are described with reference to any one Figure may be interchanged with those of other Figures or other equivalent circuit elements without departing from the spirit of the present teaching.
In advance of describing a radio frequency (RF) front end architecture in accordance with the present teaching, an exemplary prior art front end architure is first described with reference to
One major drawback to the arrangement of
NF
SYS(dB)=NFLNA(dB)+ILSW(dB), Equation 1
Where NFSYS(dB), is the noise figure of a system in dB,
Typically targets for the noise figure of a LNA system is <1 dB and the typical insertion loss for a switch is 0.5 dB. Clearly from this, the insertion loss of the switch uses up a significant portion of the noise figure allowance requiring a much lower noise figure from the LNA. In this case the noise figure for the LNA should be less than 0.5 dB in order to meet the system target. In real systems this level of noise figure may not be possible to achieve without requiring higher power consumption in the LNA than would not be acceptable in wireless systems that are typically portable, battery operated and constrained to a low level of power consumption. If higher power consumption cannot be accepted then the system 150 will have a higher noise figure which will reduce the sensitivity of the overall receive system thereby reducing both the range and the information throughput of receive system.
NF
SYS(dB)=NFLNA(dB) Equation 2
Where NFSYS(dB), is the noise figure of a system in dB, and
NFLNA(dB), is the noise figure of an LNA in dB.
The noise figure achieved by the RF front end circuit 200 is lower than the noise figure of the front end circuit 100 by eliminating the the contribution of the insertion loss of the switch. This allows receive systems to be implemented that have lower power consumption, lower area and better sensitivity than previously possible.
In the exemplary front end circuit 200 each input IN1 to INX is connected to multiple amplifier inputs in the following way; IN1 connects to the inputs of AMP11, AMP12 and up to AMP1Y. IN2 connects to the inputs of AMP21, AMP22 and up to AMP2Y, and so on. This can be generalized to INX connects to the inputs of AMPX1, AMPX2 and up to AMPXY. The amplifier may consist of a network of transistors that amplify the signal at the input.
The outputs of the amplifiers AMP1Y, AMP2Y up to AMPXY are connected together to a common node and this common node is connected to an output matching network (OMNY) and this OMNY network is connected to OUTY. The OMN can consist of any network and typically it is used to transform the output impedance of the amplifiers to the impedance of the load at OUTY.
In the front end circuit 200 AMP11, AMP21 up to AMPX1 is connected to OMN1 which is connected to Output1, and for example OMN1 can consist of a shunt Inductor and series capacitor. The RF front end circuit 200 may operate as follows; if INX needs to be amplified and switched to OUTY then AMPXY is turned on and all other amplifiers connected to OMNY are turned off. Also all amplifiers connected to INX (AMPX1 to AMPXY except AMPXY) are turned off. In this way the signal at INX is amplified through AMPXY connected to OMNY and then connected to OUTY. The front end circuit 200 allows the simultaneous connection of other inputs to other outputs. So for example another input IN1 could simultaneously be connected to AMP12 which would be connected to OMN2 and then connected to Out2. Then AMP11 to AMP1X are all turned off except AMP12, and AMP11 to AMP1Y are also turned off except AMP12. In this way IN1 is amplified and switched to OUT2 and simultaneously INX is amplified and switched to OUTY.
It will be appreciated by those skilled in the art that the RF front end circuit 200 includes a plurality of amplifiers defining multiple amplification branches. A plurality of input nodes are associated with one or more amplification branches. A plurality of output matching networks are associated with the one or more amplication branches. The amplifiers are selectively controllable such that one or more amplifiers associated with one or more active input nodes are activated while other amplifiers associated with the one or more active input nodes are deactived.
In the front end circuit 200 any one input could at any one time be connected to one or more outputs. If there is only one input that is required to be amplified and output on more than one output port then an amplifier and output matching network stage is still required for each output port. The front end circuit 300 in addition allows to connect one input to multiple outputs simultaneously. In the circuit 300 each input IN1 to INX is connected to multiple amplifier inputs in the following way; IN1 connects to the inputs of AMP11, AMP12 and up to AMP1Y. IN2 connects to the inputs of AMP21, AMP22 and up to AMP2Y and so on. This may be generalized to INX connects to the inputs of AMPX1, AMPX2 and up to AMPXY. If there is only one input that is required to be amplified and output on more than one output port then only one amplifier and one output matching network stage is required.
The amplifiers may consist of a network of transistors that amplify the signal at the input. The outputs of the amplifiers AMP1Y, AMP2Y up to AMPXY are connected together to a common node and this node is connected to an output matching network (OMNY). OMNY is then connected to an N-way splitter, where N is the maximum number of output ports that can simultaneously be connected to an input. In the diagram for simplicity it is drawn as a two way splitter, i.e. in this system one input can at most be connected simultaneously to at most two outputs. It is not intended to limit the present teaching to a two way splitter as any desired multi-way splitter may be used as would be appreciated by those skilled in the art. The primary output of the splitter is connected through a single pole single throw switch to OUTY. There are N−1 secondary outputs of the splitter and each one of these is connected to a single pole (Y−1) throw switch SP(Y−1)T switch; i.e. each SP(Y−1)T outputs connects to all other output ports except the output port that the primary output of the splitter is connected to through an SPST switch.
The OMN and the splitter are drawn as separate networks, but these networks may be combined into a single network which implements the output matching and the splitting simultaneously. An example of this would be a transformer network.
The RF front end circuit 300 operates as follows; if INX needs to be amplified and switched to OUT then AMPXY is turned on and all other amplifiers connected to OMNY are turned off. Also all amplifiers connected INX (AMPX1 to AMPXY except AMPXY) are turned off. In this way the signal at INX is amplified through AMPXY connected to OMNY and then connected to SplitterY. The switch at the primary output of the splitter is turned on and the signal in this way is connected to OUTY. All other switches connected to OUTY are turned off. If in this example it is desired to amplify and route the signal only to OUTY then the switch at the secondary output of SplitterY is turned off.
If however it is desired to also amplify and route the signal at INX to another output simultaneously, say for example Out2, then in addition to the above description the switch at the secondary output of SplitterY is turned on and switched to OUT2. All other switches connected to OUT2.
It should be noted that the switches of the switching network 310 are positioned at the output side of the splitters 305 and do not contribute to system noise figure. These switches are positioned at output side of the LNA so the contribution of their insertion loss to system noise figure is reduced by the gain of the LNA and is therefore negligible.
one or more amplifiers associated with one or more active input nodes are activated while other amplifiers associated with the one or more active input nodes are deactived.
If the RF circuit 700 is configured to operate in the same state as described for
State 1 is decoded from some logical combination of the control signals received at GPIO inputs, C1-C4. From this table it will be understood that the decoder may have other states so that amplified version of signal at any of three input ports IN1, IN2, INX can be output to any of three output ports, OUT1, OUT2, OUTY by appropriately controlling the bias voltage and switch states.
Referring now to
A person of ordinary skill in the art would understand how to fabricate the RF circuit 700 on a substrate using these known techniques. The method may comprise providing a plurality of amplifiers on a substrate defining multiple amplification branches; providing a plurality of input nodes being associated with one or more amplification branches; providing a plurality of output matching networks on the substrate being associated with one or more amplication branches; wherein the amplifiers are selectively controllable such that one or more amplifiers associated with one or more active input nodes are activated while other amplifiers associated with the one or more active input nodes are deactived.
While the present teaching has been described with reference to exemplary arrangements and circuits it will be understood that it is not intended to limit the teaching of the present teaching to such arrangements as modifications can be made without departing from the spirit and scope of the present invention. In this way it will be understood that the present teaching is to be limited only insofar as is deemed necessary in the light of the appended claims. It will be appreciated by those of ordinary skill in the art that a low noise amplifier (LNA) is typically one of the first active elements providing amplification of a signal received at an antenna of a wireless receive system. An LNA is characterised by its noise figure and gain among other parameters. In systems for mobile phone and WiFi applications an LNA is typically required to have a noise figure of less than 1 or 2 dB depending on frequency of operation and gain between 10 and 20 dB within its frequency range of operation. Frequency bands and receive system requirements within those bands are specified by the 3rd Generation Partnership Project, 3GPP consortium for cellular systems. The RF Spectrum is sub-divided into bands which is a range of frequencies within which information must be transmitted or received. Bands that fall within range of 1.8 GHz-2.3 GHz are typically referred to as mid-band frequencies for cellular applications. Bands that fall within range of 2.3-2.7 GHz are typically referred to as high-band frequencies for cellular applications.
Similarly the words comprises/comprising when used in the specification are used to specify the presence of stated features, integers, steps or components but do not preclude the presence or addition of one or more additional features, integers, steps, components or groups thereof.
The present invention claims priority from U.S. Provisional Application Ser. No. 62/237653, filed 6 Oct. 2015, the entirety of which is incorporated herein by reference.
Number | Date | Country | |
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62237653 | Oct 2015 | US |