BRIEF DESCRIPTION OF THE DRAWINGS
The invention will be described according to the appended drawings in which:
FIG. 1 shows a packet structure of a data stream of an RFID tag system according to the present invention;
FIG. 2 is a coding waveform diagram of the data stream of the RFID tag system according to an embodiment of the present invention; and
FIG. 3 is a functional block diagram of the RFID tag system according to the present invention.
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows a packet structure of a data stream of an RFID tag system according to the present invention. The data stream 10 includes a preamble 11, a body data 12, and an end of file (EOF) 13, wherein whether the EOF necessarily exists or not is determined according to the actual requirements of the system. The body data 12 includes the data for identifying the identity, such as an identity code, a series number, and an object class code. The preamble 11 is taken as a synchronous code, which is not only the head of the data stream 10, but also ensures that the signal transmission frequency of the data stream 10 is synchronized with the reading frequency.
FIG. 2 is a coding waveform diagram of the data stream of the RFID tag system according to the present invention. The first five bits of the data stream are designated as the preamble in the present embodiment, and the body data succeeds the preamble. As shown in FIG. 2, the preamble is set to a sequence of certain levels as 11111, and the body data is a binary value of 101011. When the reader (not shown) gets close to the RFID tag (not shown) having the data stream shown in FIG. 2, although it is known that the sequence stored in the preamble is 11111, the frequency or cycle of the clock is detected and confirmed only based on the known sequence 11111. Generally, the frequency of the clock is locked by the over-sampling method together with the digital signal processing (DSP), or, the frequency is confirmed by the phase lock loop (PLL). Only when the reader confirms the signal frequency or clock frequency of the data stream can make the content of the body data be correctly read.
FIG. 3 is a functional block diagram of the RFID tag system according to the present invention. The RFID tag system 30 includes at least an RFID 32 and a reader 31, and the data is transmitted between the RFID tag 32 and the reader 31 by way of inductive coupling of the electromagnetic field. When an antenna 321 of the RFID tag 32 generates a current due to the change of the electromagnetic field, the current is converted via a rectifier 323 into a stable DC current for powering other circuits of the RFID tag 32.
The preamble and the body data in FIG. 2 are stored in the memory 326, and a controller 327 reads the data stored in the memory 326 according to the standard clock frequency produced by an oscillator 324 (for example, an annular oscillator), and then, the read data is sequentially transferred to an encoder 325 (for example, a Manchester encoder) for coding. The coding waveform shown in FIG. 2 is a waveform after the Manchester coding process, i.e., in a clock cycle, it is indicated as 1 when the voltage is converted from the positive potential into the negative potential, and otherwise, it is indicated as 0. The characteristic of this coding process lies in that the transferring end (the RFID tag 32) and the receiving end (reader 31) are synchronized when the data are transferred and received. However, the coding of the data stream of the present invention is not limited to the Manchester coding, and includes the pulse width modulation (PWM) coding, the non return to zero invert (NRZI) modulation or return to zero modulation. The coded data stream needs to be modulated by a modulator 322 before being sent to the reader 31 by the antenna 321, so that the digitally coded data stream becomes an analogous RF signal.
Due to the capability to identify frequencies, the RFID tag system 30 of the present invention is suitable for the RFID tag 32 manufactured at a low cost and with a large variance. That is, the superior characteristic of frequency drift resulting from the process variance is utilized to achieve an RFID tag system with a frequency segmentation and a high identifiability. Furthermore, cooperating with the encoder 325 and the memory 326 with a capacity of 64K, the number of the transistors on the chip of the RFID tag 32 is reduced to less than 200. Therefore, compared with the tag of EPC specification that requires tens of thousands of transistors, the RFID tag 32 of the present invention significantly reduces the circuit integration.
The above-described embodiments of the present invention are intended to be illustrative only. Numerous alternative embodiments may be devised by persons skilled in the art without departing from the scope of the following claims.
Patent Application
20080068135
