Patent Application
20130212210
The subject matter disclosed herein relates to computer data transfers and more particularly to systems and methods having a rule engine manager for in-memory data transfers that bypass input/output (I/O) operations.
An analysis engine (AE) is an algorithm that takes data from a log file (e.g., data related to a turbine fleet), compares it to rules or a set of rules in a symptom database, and returns an array of objects representing the solutions and directives for the matched symptoms.
Currently, acquiring the various data types required for an AE to run (e.g., input\output time series data, state file data, and rule set data) are written\retrieved by the AE to\from a computers file system that may or not may be local to the AE. For a write of data the AE is responsible for accessing the file location, taking the data in its memory and producing a file in the proper format. In addition, the AE is responsible for calling on the OS services to write to disk (i.e., I/O). Likewise, for retrieving data the AE has to access the file location, read the file into memory using OS services, and then manipulate the data so that it can be used by the AE. All of these actions are performed by the AE and require a large amount of non-value work and computer processing lengthening the time to recognition of when an event of interest occurred and when it was recognized by the system. The AE also has instances when it fails to run because of being unable to access file locations for reading the data.
According to one aspect of the invention, a rule engine manager in-memory data transfer system is described. The system includes a rule engine manager cluster, a first memory cache coupled to the rule engine manager cluster, a data server cluster coupled to the rule engine manager cluster and a second memory cache coupled to the data server cluster.
According to another aspect of the invention, a data transfer method is described. The method includes transferring time series data between a rule engine manager and an analysis engine, transferring state file data between the rule engine manager and the analysis engine, and transferring rule logic data between the rule engine manager and the analysis engine.
According to yet another aspect of the invention, a computer program product for transferring data is described. The computer program product includes a non-transitory computer readable medium storing instructions for causing a computer to implement a method. The method includes transferring time series data between a rule engine manager and an analysis engine, transferring state file data between the rule engine manager and the analysis engine, and transferring rule logic data between the rule engine manager and the analysis engine.
These and other advantages and features will become more apparent from the following description taken in conjunction with the drawings.
The subject matter, which is regarded as the invention, is particularly pointed out and distinctly claimed in the claims at the conclusion of the specification. The foregoing and other features, and advantages of the invention are apparent from the following detailed description taken in conjunction with the accompanying drawings in which:
The detailed description explains embodiments of the invention, together with advantages and features, by way of example with reference to the drawings.
In exemplary embodiments, the system 100 supports REM in-memory data transfer methods. REM in-memory data transfer is a method in which the first and second caches 120, 150 manage and persist input and output data, state file data, and rule set definition data. The REM in-memory data transfer method also provides the AE 115 the capability of interacting directly with the REM agent 110 and remove the use of expensive file I/O operations.
In exemplary embodiments, the system supports multiple data types that include but are not limited to: 1) time series data for rule input and output; 2) state file data (i.e., information specific to what “state” the asset 180 was in at a last calculation); and 3) the rule set\logic the AE 115 is to use with a given set of time series and state file data. The system 100 processes each of these types of data differently from each other, but implement similar methods to receive the result of managing and providing in-memory data exchange between the REM agent 110 and the AE 115. Each data type can also be stored long term in an appropriate data store (e.g., time series data in data store 161, state file data in data store 162 and rule/set logic data in data store 163). Most recently requested\required data stored is stored in a local cache (e.g., the first memory cache 120). In addition data transfer between the REM agent 110 and the AE 115 can be performed directly (e.g., via web services).
In exemplary embodiments, time series data (i.e., input and output data) is stored in an appropriate storage device (e.g., the I/O data cache 130) that is retrieved or written via the data server 140. The data server 140 retrieves the entire set of input data for running an entire assets rule suite and places the data in the first memory cache 120 for quick and easy access. Upon rule execution the REM agent 110 informs the data server 140 to prepare the set of input data required for a unique asset and rule instance. The REM agent 110 then launches the AE 115 indicating that the data is available directly from REM via in-memory transfer. The AE 115 is then able to directly ask the REM agent 110 via a uniform resource locator (URL) it was given and the REM agent 110 packages and delivers the data to the AE 115 in-memory. Likewise, on completion of rule execution the AE 115 sends the output data (i.e., result data) back to REM agent 110 with the same URL. The cached data set is maintained until the current batch of rules for the asset 180 has completed execution and all output data has been persisted back to the appropriate data store.
In exemplary embodiments, state file data is stored in the state information cache 155 in the second memory cache 150 (e.g., a HyperSQL database (HSQDB) in file mode managed by a JBOSS Application Server product). State files are exchanged by the REM agent 110 passing the AE 115 a URL for which to interact and do in-memory exchange. The REM agent 110, upon receiving state file data, sends the data to the second memory cache 150 for quick retrieval when requested again by the AE 115. Upon adding a new or updating an existing state file the second memory cache 150 persists the data to file by services provided by the data server (e.g., HSQDB services from the JBOSS application server).
In exemplary embodiments, rule set logic is passed by the REM agent 110 retrieving the rule set logic from the CCAP database 170 and caching the rule set logic in the first memory cache 120. When the REM agent 110 launches the AE 115, the REM agent 110 provides the URL where the rule logic can be accessed in-memory. Where in the case of input, output and state data there is an in-memory path where the AE 115 returns new or updated data to the REM agent 110 to manage the data persistence. There is no such path for the rule set data because the AE 115 does not make any changes its self to that data.
The system 100 can be a part of any suitable computing system as now described.
In exemplary embodiments, in terms of hardware architecture, as shown in
The processor 505 is a hardware device for executing software, particularly that stored in memory 510. The processor 505 can be any custom made or commercially available processor, a central processing unit (CPU), an auxiliary processor among several processors associated with the computer 501, a semiconductor based microprocessor (in the form of a microchip or chip set), a macroprocessor, or generally any device for executing software instructions.
The memory 510 can include any one or combination of volatile memory elements (e.g., random access memory (RAM, such as DRAM, SRAM, SDRAM, etc.)) and nonvolatile memory elements (e.g., ROM, erasable programmable read only memory (EPROM), electronically erasable programmable read only memory (EEPROM), programmable read only memory (PROM), tape, compact disc read only memory (CD-ROM), disk, diskette, cartridge, cassette or the like, etc.). Moreover, the memory 510 may incorporate electronic, magnetic, optical, and/or other types of storage media. Note that the memory 510 can have a distributed architecture, where various components are situated remote from one another, but can be accessed by the processor 505.
The software in memory 510 may include one or more separate programs, each of which comprises an ordered listing of executable instructions for implementing logical functions. In the example of
The for REM in-memory data transfer methods described herein may be in the form of a source program, executable program (object code), script, or any other entity comprising a set of instructions to be performed. When a source program, then the program needs to be translated via a compiler, assembler, interpreter, or the like, which may or may not be included within the memory 510, so as to operate properly in connection with the OS 511. Furthermore, the for REM in-memory data transfer methods can be written as an object oriented programming language, which has classes of data and methods, or a procedure programming language, which has routines, subroutines, and/or functions.
In exemplary embodiments, a conventional keyboard 550 and mouse 555 can be coupled to the input/output controller 535. Other output devices such as the I/O devices 540, 545 may include input devices, for example but not limited to a printer, a scanner, microphone, and the like. Finally, the I/O devices 540, 545 may further include devices that communicate both inputs and outputs, for instance but not limited to, a network interface card (NIC) or modulator/demodulator (for accessing other files, devices, systems, or a network), a radio frequency (RF) or other transceiver, a telephonic interface, a bridge, a router, and the like. The system 500 can further include a display controller 525 coupled to a display 530. In exemplary embodiments, the system 500 can further include a network interface 560 for coupling to a network 565. The network 565 can be an IP-based network for communication between the computer 501 and any external server, client and the like via a broadband connection. The network 565 transmits and receives data between the computer 501 and external systems. In exemplary embodiments, network 565 can be a managed IP network administered by a service provider. The network 565 may be implemented in a wireless fashion, e.g., using wireless protocols and technologies, such as WiFi, WiMax, etc. The network 565 can also be a packet-switched network such as a local area network, wide area network, metropolitan area network, Internet network, or other similar type of network environment. The network 565 may be a fixed wireless network, a wireless local area network (LAN), a wireless wide area network (WAN) a personal area network (PAN), a virtual private network (VPN), intranet or other suitable network system and includes equipment for receiving and transmitting signals.
If the computer 501 is a PC, workstation, intelligent device or the like, the software in the memory 510 may further include a basic input output system (BIOS) (omitted for simplicity). The BIOS is a set of essential software routines that initialize and test hardware at startup, start the OS 511, and support the transfer of data among the hardware devices. The BIOS is stored in ROM so that the BIOS can be executed when the computer 501 is activated.
When the computer 501 is in operation, the processor 505 is configured to execute software stored within the memory 510, to communicate data to and from the memory 510, and to generally control operations of the computer 501 pursuant to the software. The for REM in-memory data transfer methods described herein and the OS 511, in whole or in part, but typically the latter, are read by the processor 505, perhaps buffered within the processor 505, and then executed.
When the systems and methods described herein are implemented in software, as is shown in
As will be appreciated by one skilled in the art, aspects of the present invention may be embodied as a system, method or computer program product. Accordingly, aspects of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “circuit,” “module” or “system.” Furthermore, aspects of the present invention may take the form of a computer program product embodied in one or more computer readable medium(s) having computer readable program code embodied thereon.
Any combination of one or more computer readable medium(s) may be utilized. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Computer program code for carrying out operations for aspects of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the “C” programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider).
Aspects of the present invention are described below with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer readable medium that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the computer readable medium produce an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In exemplary embodiments, where the for REM in-memory data transfer methods are implemented in hardware, the for REM in-memory data transfer methods described herein can implemented with any or a combination of the following technologies, which are each well known in the art: a discrete logic circuit(s) having logic gates for implementing logic functions upon data signals, an application specific integrated circuit (ASIC) having appropriate combinational logic gates, a programmable gate array(s) (PGA), a field programmable gate array (FPGA), etc.
Technical effects include decreasing the time to recognize events by freeing the AE to focus on its core value performing analytics and notification of events. The systems and methods described herein also dramatically reduce the possibility of file I/O failures that inhibit analytics from running at all. The systems and methods described herein provide a mechanism for transferring required data in-memory directly between REM agent and the Analysis Engine, removing the need for interacting with file storage systems outside of applications in the system.
While the invention has been described in detail in connection with only a limited number of embodiments, it should be readily understood that the invention is not limited to such disclosed embodiments. Rather, the invention can be modified to incorporate any number of variations, alterations, substitutions or equivalent arrangements not heretofore described, but which are commensurate with the spirit and scope of the invention. Additionally, while various embodiments of the invention have been described, it is to be understood that aspects of the invention may include only some of the described embodiments. Accordingly, the invention is not to be seen as limited by the foregoing description, but is only limited by the scope of the appended claims.
