SBIR Phase I: Customized Computing for Big Data Applications

Information

  • NSF Award
  • 1520449
Owner
  • Award Id
    1520449
  • Award Effective Date
    7/1/2015 - 10 years ago
  • Award Expiration Date
    12/31/2015 - 10 years ago
  • Award Amount
    $ 150,000.00
  • Award Instrument
    Standard Grant

SBIR Phase I: Customized Computing for Big Data Applications

The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase I project is that it will result in a significant reduction in the energy usage of datacenters worldwide, which is increasing at an alarming rate. Some of the large Internet service providers employ several million computing servers in their datacenters with an annual total energy usage in the order of multi-billion kilowatt hours. For many big data applications that constitute a significant portion of workload in datacenters, using field programmable gate array (FPGA) as a customizable computing device can provide significantly better performance and energy efficiency. Using the software tools and IP solutions developed from this project, one may replace several computing servers with one server augmented with one or more FPGA acceleration cards, resulting in significant cost and energy reduction. The wide deployment of customized computing technology in datacenters as enabled by the solutions developed in this project will lead to substantial energy savings, significant reduction of carbon emissions, and more importantly, more sustainable growth of computing infrastructures so that they can better scale in the future to meet the rapidly increasing computing demands as our society embraces further digital revolution in the coming decades.<br/><br/>This Small Business Innovation Research (SBIR) Phase I project focuses on enabling energy-efficient customized computing for big data applications in datacenters. The most significant barrier for widespread adoption of FPGA-based customized computing is the difficulty in programming FPGAs. The innovation of this project includes the development of a set of highly automated compilation, runtime scheduling and resource management tools, as well as high-performance FPGA acceleration libraries to enable efficient and transparent utilization of FPGA resources at the datacenter scale for acceleration of many large-scale distributed computing applications. The software and IP solutions developed under this proposal will enable widespread use of FPGAs in datacenters by a wide range of application developers, resulting in significant improvement in programming productivity by the application developers and substantial energy and cost reduction by the datacenter operators (while delivering the same performance). The goal of this project is to demonstrate the viability and advantage of FPGA-based customized computing in datacenters for some big data application domains against modern multi-core servers and GPUs in terms of performance, energy-efficiency, programmability, and ease of use.

  • Program Officer
    Peter Atherton
  • Min Amd Letter Date
    6/22/2015 - 10 years ago
  • Max Amd Letter Date
    6/22/2015 - 10 years ago
  • ARRA Amount

Institutions

  • Name
    Falcon Computing Solutions, Inc.
  • City
    Los Angeles
  • State
    CA
  • Country
    United States
  • Address
    938 Malcolm Ave.
  • Postal Code
    900243114
  • Phone Number
    3105929638

Investigators

  • First Name
    Peng
  • Last Name
    Zhang
  • Email Address
    jing@falcon-computing.com
  • Start Date
    6/22/2015 12:00:00 AM