NSF Award
0637277
The Small Business Innovation Research (SBIR) Phase I Project will investigate an innovative high-speed Flexible Printed Circuit (FPC) utilizing conventional material (like Polyimide) and standard manufacturing process. With the continued growth in integration density of CMOS (complementary metal-oxide semiconductor) technology and clock frequency of chips, the aggregate bandwidth required between future-generation chip and chipsets will increase sharply. Driving serial or parallel data at high speed over conventional flexible board (i.e. flexible) is becoming a severe design constraint in many applications. Today, divding high speed signal into several low speed signals and driving those signals in parallel are common. Utilizing this technique will not fully utilize the chip speed and thereby overall system performance will not be improved siginificantly. <br/><br/>The proposed technology will produce the high speed FPC which will have high signal carrying capacity. Utilizing such FPC will help to increase the system performance significantly. The objectives of the project are to identify the best structural configuration and its optimization, to design the polymer-based FPC, and to establish the feasibility of high speed FPC board. In this project, prototypes will be made and evaluated, measurements of relevant characteristics will be conducted, and a development path for the next phase of the project will be identified. The project has the potential to produce the high speed interfaces suitable for next generation digital and RF system applications. The direct commercial potential of the project lies in interface products, manufactured using this technology for HDTV, flat-panel display, networking equipments, imaging and video systems, etc.
