NSF Award
9761142
This Small Business Innovation Research project from HYPRES, Inc. proposes the development of a monolithic phase-locked looped (PLL) circuit operating at frequencies in the range 20 - 100 GHz. HYPRES proposes to develop a superconducting PLL circuit using Rapid Single Flux Quantum (RSFQ) logic elements for the phase detector, the voltage-controlled oscillator (VCO), and the frequency divider for looking to a lower reference frequency. In Phase I, HYPRES will demonstrate a PLL which locks with a phase precision of 10 to the minus 4 radian at 50 GHz and follows the reference signal over a range of 5 GHz. This significant achievement requires an on-chip VCO with inherent quality factor of 10,000 and a feedback loop bandwidth of at least 5 MHz. In the next phase of the research, HYPRES will develop a frequency tracking demodulator with clock recovery using the PLL developed in Phase I, capable of operating at 30 GHz. There is a significant need for inexpensive, tunable, phaselocked clock sources in this frequency range for signal processing in scientific and communications applications. These applications include ultrafast clocking of superconducting digital circuits and acquisition, modulation, demodulation, and tracking of carriers above 20 GHz. Gunn diodes are already available as high-Q microwave sources in the frequency range 20 - 100 GHz. They are expensive, however, and must be locked by even more expensive electronics (typical cost, circa $30,000). The proposed approach will yield a much less expensive option (typical cost - $1000) for creating phase-locked clock signals in the frequency range 20 - 100 GHz and directly useable by RSFQ digital signal processing circuits. The primary commercial application is in satellite communications hardware, which is a market worth over $100 M per year.
