SBIR Phase II: High-Speed, Low-Cost Maskless Lithography

Information

  • NSF Award
  • 0620566
Owner
  • Award Id
    0620566
  • Award Effective Date
    9/15/2006 - 18 years ago
  • Award Expiration Date
    8/31/2010 - 14 years ago
  • Award Amount
    $ 929,204.00
  • Award Instrument
    Standard Grant

SBIR Phase II: High-Speed, Low-Cost Maskless Lithography

This Small Business Innovation Research (SBIR) Phase II project will research and develop a maskless lithography tool based on the results of the feasibility study. The company has a unique and proprietary approach to achieve higher throughput and lower cost than currently available maskless lithography tools. The approach will employ Line Light Modulator (LLM) to pattern wafers with a linear array of 2048 beams. The patent-pending LLM is a novel and efficient light engine that converts a single light source into a large linear array of beamlets. Using a large array of beamlets increases the power handling capability of the system which increases the exposure throughput. The result is a one to two order of magnitude improvement in throughput compared to existing maskless lithography tools. Our tool also takes advantage of the new 405nm diode laser. The 405nm diode laser offers a combination of power, cost, and speed not available in other UV laser sources. In the feasibility study, we have demonstrated the ability to pattern photoresist with <1um resolution using the LLM. In Phase II, we will develop and fully characterize a prototype tool that will achieve a 1um resolution, 50nm position accuracy, and a throughput of 65mm2/sec (two minutes per 4" wafer). <br/><br/>As high volume semiconductor production has mostly moved overseas, the US semiconductor industry relies more on prototyping and initial manufacturing of innovative, cutting-edge technology. Lowering the cost to pattern wafers at these volumes helps keep US companies competitive by enabling rapid and cost-effective innovations. Cost is especially important for the small- to medium-sized companies that neither have the capital for high cost mask sets, nor require the most advanced resolutions of modern conventional lithography tools. The proposed tool addresses this need for fast and cost-effective semiconductor lithography with good throughput, resolution, and seamless integration with current lithography processes. The proposed project will provide researchers with an affordable tool to quickly fabricate new and existing designs. These low cost lithography tools will also be useful in fabrication and MEMS laboratory courses. A maskless lithography tool will make it practical for students to design and fabricate devices instead of simply using masks made for the course.

  • Program Officer
    Juan E. Figueroa
  • Min Amd Letter Date
    9/6/2006 - 18 years ago
  • Max Amd Letter Date
    1/12/2009 - 16 years ago
  • ARRA Amount

Institutions

  • Name
    ALCES TECHNOLOGY, INC.
  • City
    JACKSON
  • State
    WY
  • Country
    United States
  • Address
    650 West Elk Ave #8
  • Postal Code
    830019472
  • Phone Number
    3077321994

Investigators

  • First Name
    Richard
  • Last Name
    Yeh
  • Email Address
    yeh@alcestech.com
  • Start Date
    9/6/2006 12:00:00 AM

FOA Information

  • Name
    Industrial Technology
  • Code
    308000