SBIR Phase II: Ultra-Low Power Microcontroller Design

Information

  • NSF Award
  • 0724361
Owner
  • Award Id
    0724361
  • Award Effective Date
    8/1/2007 - 17 years ago
  • Award Expiration Date
    7/31/2011 - 13 years ago
  • Award Amount
    $ 952,000.00
  • Award Instrument
    Standard Grant

SBIR Phase II: Ultra-Low Power Microcontroller Design

This Small Business Innovation Research Phase II research project will investigate novel integrated circuit design technologies for the realization of ultra-low-power microcontrollers. The main objective of this project is to investigate the deployment of novel charge-recovery circuitry for the design of an ultra-low-power leading-edge commercial microcontroller core. The resulting charge-recovery core is expected to dissipate 25-30% less power than its conventional counterpart. In conventional circuit design, capacitors are switched abruptly between supply and ground, dissipating all their stored energy as heat across resistive devices. In charge recovery design, on the other hand, capacitors are switched gradually, returning any energy that remains un-dissipated back to the power supply. The significant potential of charge recovery to reduce power consumption has so far remained untapped in the commercial world, primarily due to the lack of support for such a new design style that deviates from established design practices. <br/><br/>The results of the proposed research are commercially applicable to the realization of a broad class of computer systems and consumer electronic devices that are subject to power efficiency requirements. Microcontrollers are essential elements of every System-on-Chip (SoC) and typically account for a substantial fraction of overall chip power, since they remain on most of the time. Embedded microcontrollers are key components of semiconductor chips for mobile devices such as cell phones and personal digital assistants. Generating a commercial microcontroller core with substantially reduced power consumption will lead to a broad variety of next-generation computer and communication systems with enhanced features, longer battery life, and improved performance.

  • Program Officer
    Muralidharan S. Nair
  • Min Amd Letter Date
    7/20/2007 - 17 years ago
  • Max Amd Letter Date
    12/15/2009 - 15 years ago
  • ARRA Amount

Institutions

  • Name
    Cyclos Semiconductor
  • City
    Berkeley
  • State
    CA
  • Country
    United States
  • Address
    1995 University Avenue, Ste 375
  • Postal Code
    947045309
  • Phone Number
    5106651341

Investigators

  • First Name
    Alexander
  • Last Name
    Ishii
  • Email Address
    alexander.ishii@cyclos-semi.com
  • Start Date
    7/20/2007 12:00:00 AM

FOA Information

  • Name
    Industrial Technology
  • Code
    308000