Schmitt trigger circuit

Abstract

A level shift element is connected between a transistor (Tr.sub.5) which is used to determine a threshold level when the input voltage falls and a diode (D.sub.3) is connected between an input terminal and an output control transistor (Tr.sub.2) to discharge the base of the output control transistor. The level shift element comprises a diode connected in the forward direction or a resistor.

Description

BACKGROUND OF THE INVENTION

(1) Field of the Invention

The present invention relates to a Schmitt trigger circuit which exhibits hysteresis in response to an input voltage.

(2) Description of the Prior Art

In a Schmitt trigger circuit, the threshold level is high with respect to the rise of an input voltage (from an L level to an H level) and is low with respect to the fall of the input voltage (from the H level to the L level). This hysteresis means a Schmitt trigger circuit has large noise margins and furthermore is free from the oscillation which plagues a transistor-transistor logic (TTL) circuit having a fixed threshold level. Therefore, a Schmitt trigger circuit is preferably used for an input buffer of a long bus line in which noise easily enters and causes distortion of the wave shapes of signals therein.

A conventional type of Schmitt trigger circuit used for input buffers has a serious problem in that the input current abruptly increases by a great deal when the input voltage falls.

SUMMARY OF THE INVENTION

It is, therefore, an object of the present invention to provide a Schmitt trigger circuit in which the input current does not abruptly and greatly increase when the input voltage falls.

The above object is achieved by a Schmitt trigger circuit which includes an input stage having a first transistor and a load resistor connected to each other in series, an output stage and a second transistor inserted between the input stage and the output stage. The second transistor is turned on and off depending upon an input voltage applied to the first transistor and controls the output stage. A first circuit has a first diode which is connected between one terminal of the first transistor and the base of the second transistor, the forward voltage drop of the first diode determining a threshold level of the input voltage to turn on the second transistor. A third transistor is connected in parallel with the first diode for clamping the forward voltage of the first diode so as to determine a threshold level of the input voltage to turn off the second transistor. A second circuit turns on the third transistor when the second transistor turns on and a third circuit has a second diode which is connected between the bases of the first and second transistors, for discharging charges stored in the base of the second transistor. A level shift means is connected between the third transistor and an anode terminal of the second diode.

The above and other related objects and features of the present invention will be apparent from the description of the present invention set forth below, with reference to the accompanying drawings, as well as from the appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1a and 1b are circuit diagrams of conventional Schmitt trigger circuits;

FIGS. 2a and 2b are waveform diagrams of operations of the circuits shown in FIGS. 1a and 1b, respectively;

FIGS. 3a and 3b are circuit diagrams of embodiments of the present invention;

FIGS. 4a and 4b are waveform diagrams of operations of the circuits shown in FIGS. 3a and 3b, respectively; and

FIGS. 5a and 5b are circuit diagrams of other embodiments of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Before describing a Schmitt trigger circuit of the present invention, conventional Schmitt trigger circuits will first be described with reference to the accompanying drawings.

FIG. 1a is a circuit diagram of a conventional non-inverting type Schmitt trigger circuit and FIG. 1b a conventional inverting type Schmitt trigger circuit. Referring to FIG. 1a, Tr.sub.1 denotes a PNP transistor in an input stage, Tr.sub.2 and Tr.sub.3 denote NPN transistors which constitute a phase-splitter, Tr.sub.4 denotes an NPN transistor in an output stage, Tr.sub.5 denotes an NPN transistor for forming hysteresis, and Tr.sub.6 denotes an NPN transistor for controlling the NPN transistor Tr.sub.5. The transistors Tr.sub.2 to Tr.sub.6 are composed of Schottky barrier diode (SBD) clamped transistors.

A PN diode D.sub.1 which is formed by shorting the collector and base of an NPN transistor is connected between the emitter and collector of the transistor Tr.sub.5. A PN diode D.sub.2, which is formed by shorting the collector and base of an NPN transistor, is connected between the trasistor Tr.sub.2 and ground.

A Schottky barrier diode (SBD) D.sub.3 is connected in the forward direction between the base of the transistor Tr.sub.2 and the base of the transistor Tr.sub.1, the base of the transistor Tr.sub.1 is an input terminal of the Schmitt trigger circuit. The diode D.sub.3 is used to discharge the base of the transistor Tr.sub.2 so as to speed up the turning off of the transistor Tr.sub.2 when the input voltage V.sub.IN falls.

The anode (base shorted with collector) of the diode D.sub.1 is connected to a node N.sub.1 of the emitter of the transistor Tr.sub.1 and the load resistor R.sub.1. The cathode (emitter) of the diode D.sub.1 is connected to the base of the transistor Tr.sub.2. The diode D.sub.1 is used to determine a threshold voltage V.sub.H at the rising of the input voltage V.sub.IN.

While the input voltage V.sub.IN is the L level, for example, zero volts, the transistor Tr.sub.1 is in the on state. In this case, the voltage V.sub.N1 at the node N.sub.1 is expressed as V.sub.N1 =V.sub.IN +V.sub.BE =V.sub.BE, where V.sub.BE is the base to emitter voltage of the transistor Tr.sub.1. Since the forward voltage drop of the diode D.sub.1 is V.sub.BE and the transistor Tr.sub.5 is in the off state, the transistor Tr.sub.2 is in the off state. In order to turn on the transistor Tr.sub.2, the voltage V.sub.N1 at the node N.sub.1 should be equal to or higher than the sum of V.sub.BE of the transistor Tr.sub.2 and the voltage of the diodes D.sub.1 and D.sub.2, namely V.sub.N1 .gtoreq.3 V.sub.BE. Since the input voltage V.sub.IN at the input terminal is lower than V.sub.N1 by V.sub.BE, if the input voltage V.sub.IN is V.sub.IN .gtoreq.2 V.sub.BE, the transistor Tr.sub.2 turns on. In other words, a threshold voltage V.sub.H at the rising of V.sub.IN is V.sub.H =2 V.sub.BE.

While V.sub.IN =L, the transistor Tr.sub.2 is in the off state as aforementioned and, thus, the transistors Tr.sub.3 and Tr.sub.4 are in the on state, causing the output voltage V.sub.out to be the L level. In this case, the current I.sub.36 flows to the transistor Tr.sub.3 a resistor R.sub.2 and via the base to emitter of the transistor Tr.sub.6. The current I.sub.56 to the transistor Tr.sub.5 (which is in the off state), however, does not flow.

When the input voltage V.sub.IN is increased from V.sub.IN =L to V.sub.IN =2 V.sub.BE (in this case, V.sub.N1 =3 V.sub.BE), the transistor Tr.sub.2 starts to turn on. During this transitional period, the base current to the transistor Tr.sub.2 is supplied via the load resistor R.sub.1 and the diode D.sub.1 as indicated by I.sub.21. If the transistor Tr.sub.2 starts to turn on, the base current of the transistor Tr.sub.3 decreases to finally turn off the transistor Tr.sub.3. Thus, the transistor Tr.sub.4 turns off, causing the output voltage V.sub.out to change to the H level. In this case, the current passing through the resistor R.sub.2 changes from I.sub.36 to I.sub.56. The current I.sub.56 flows to the base of the transistor Tr.sub.5 via the base to the collector of the transistor Tr.sub.6 causing the transistor Tr.sub.5 to turn on. Since the collector to emitter voltage V.sub.CE of the transistor Tr.sub.5 during the on state is lower than V.sub.BE of the diode D.sub.1, the base current to the transistor Tr.sub.2 is supplied via the resistor R.sub.1 and the collector to the emitter of the transistor Tr.sub.5 as indicated by I.sub.25, after the transistor Tr.sub.5 turns on, instead of I.sub.21. While V.sub.IN =H, the above state is maintained.

While the input voltage V.sub.IN changes from V.sub.IN =H to V.sub.IN =L, the transistor Tr.sub.2 turns off. This turning off occurs when the voltage V.sub.N1 at the node N.sub.1 decreases to be equal to or lower than V.sub.CE +2 V.sub.BE, which is the sum of V.sub.CE of the transistor Tr.sub.5, V.sub.BE of the transistor Tr.sub.2, and V.sub.BE of the diode D.sub.2. Therefore, when the input voltage V.sub.IN becomes V.sub.IN .ltoreq.V.sub.BE +V.sub.CE, the transistor Tr.sub.2 turns off. In other words, the threshold voltage V.sub.L when V.sub.IN falls is V.sub.L =V.sub.BE +V.sub.CE.

FIG. 2a is a graph of the hysteresis between the input voltage V.sub.IN and the output voltage V.sub.out, and the input current I.sub.IL when the input voltage falls, according to the Schmitt trigger circuit of FIG. 1a. The difference between the threshold voltages V.sub.H and V.sub.L at the rising and falling of the input voltage V.sub.IN is indicated as V.sub.H -V.sub.L =2 V.sub.BE -(V.sub.BE +V.sub.CE)=V.sub.BE -V.sub.CE. In general, V.sub.BE is about 0.8 V, and V.sub.CE is about 0.2 to 0.3 V. Therefore, the difference V.sub.H -V.sub.L which corresponds to a noise margin is at least about 0.4 V.

In the aforementioned Schmitt trigger circuit, there occurs a problem in that the input current I.sub.IL abruptly and greatly increases when the input voltage V.sub.IN falls. If V.sub.IN is decreased from H to L, a part of the current passing through the transistor Tr.sub.5, which is in the on state while V.sub.IN =H, flows to the input terminal via the diode D.sub.3 during the transitional period from when V.sub.IN =H to when V.sub.IN =L.

While V.sub.IN =H, as the current I.sub.25 flows via the transistor Tr.sub.2 and the diode D.sub.2, the voltage at the emitter of the transistor Tr.sub.5 is kept at 2 V.sub.BE. In this case, the diode D.sub.3 is in the off state. When the input voltage V.sub.IN decreases from V.sub.IN =H to V.sub.IN +V.sub.F .ltoreq.2 V.sub.BE (where V.sub.F is the forward voltage drop of the diode D.sub.3), the diode D.sub.3 turns on and the current I.sub.15 through the diode D.sub.3 starts to flow. The current I.sub.15 causes the input current I.sub.IL to instantaneously and greatly increase as indicated in FIG. 2a. The above phenomenon occurs when the relationship between

V.sub.BETr.sbsb.1, V.sub.CETr.sbsb.5, and V.sub.FD3 is V.sub.BETr.sbsb.1 .gtoreq.V.sub.CETr.sbsb.5 +V.sub.FD3, where V.sub.BETr.sbsb.1 is the base to emitter voltage of the transistor Tr.sub.1, where V.sub.CETr.sbsb.1 is the collector to emitter voltage of the transistor Tr.sub.5, and where V.sub.FD3 is the forward voltage drop of the diode D.sub.3.

The normal input current I.sub.IL while V.sub.IN =L is equal to the base current I.sub.10 /.beta. of the transistor Tr.sub.1, which is extremely small. However, since the above-mentioned current I.sub.15 flows out without being decreased by 1/.beta., the input current I.sub.IL is extremely increased. Particularly, when the frequency of the input voltage V.sub.IN is high, the input current I.sub.IL instantaneously increases by a large amount. If the input current I.sub.IL increases, the current drawn by a former stage connected to this input terminal becomes very large. This causes the former stage to provide an extremely large capacitive load. Furthermore, if the input current I.sub.IL increases, it becomes very difficult to connect a large number of fan-outs.

The same operations are effected in an inverting type Schmitt trigger circuit as shown in FIG. 1b. In this circuit, while V.sub.IN =L, the transistor Tr.sub.1 is in the on state and the transistor Tr.sub.2 is in the off state because there is no supply of base current. Therefore, the transistor Tr.sub.4 is also in the off state, causing the output voltage V.sub.out to be the H level. However, when V.sub.IN changes to V.sub.IN =H, the transistor Tr.sub.1 turns off and the transistor Tr.sub.2 turns on, because base current is supplied through the resistor R.sub.1 and the diode D.sub.1. Thus, the transistor Tr.sub.4 turns on, causing the output voltage V.sub.out to change to the L level.

On the other hand, while V.sub.IN is the L level and the transistor Tr.sub.2 is in the off state, the current passing through the transistor Tr.sub.6 flows to the base of the transistor Tr.sub.7. Therefore, both the transistor Tr.sub.7 and a diode D.sub.4 turn on. Thus, the transistor Tr.sub.5 turns off. When V.sub.IN changes to V.sub.IN =H, since the transistor Tr.sub.2 turns on, the transistor Tr.sub.6 stops supplying the base current to the transistor Tr.sub.7. As a result, the transistor Tr.sub.7 and the diode D.sub.4 turn off, and, thus, the transistor Tr.sub.5 turns off. In the circuit of FIG. 1b, because the collector-emitter voltage of the transistor Tr.sub.5 plus the forward voltage of the diode D.sub.3 are applied between the node N.sub.1 and the input terminal (that is, between the emitter and the base of transistor Tr.sub.1), and because V.sub.BETr.sbsb.1 =V.sub.CETr.sbsb.5 +V.sub.FD.sbsb.3, as mentioned above, the current I.sub.15 is transitionally produced as shown in FIG. 2b when the input voltage V.sub.IN falls.

FIGS. 3a and 3b are examples of non-inverting type and inverting type Schmitt trigger circuits according to the present invention, respectively.

The Schmitt trigger circuits of FIGS. 3a and 3b have the same construction as the conventional circuits of FIGS. 1a and 1b, respectively, except that a Schottky barrier diode D.sub.5 is connected in the forward direction between the anode of the diode D.sub.3 and the emitter of the transistor Tr.sub.5.

Hereinafter, the operation of the non-inverting type Schmitt trigger circuit of FIG. 3a is explained. While the input voltage V.sub.IN is the L level (V.sub.IN =0 volt), the transistor Tr.sub.1 is in the on state, and thus, the voltage V.sub.N1 at the node N.sub.1 is V.sub.N1 =V.sub.BE. The forward voltage drop across the diodes D.sub.1 and D.sub.2 are V.sub.BE and V.sub.F. Since the diodes D.sub.1 and D.sub.2 are connected between the node N.sub.1 and the base of the transistor Tr.sub.2, the voltage at the base of the transistor Tr.sub.2 is zero and, thus, the transistor Tr.sub.2 is in the off state in this case. In order to turn on the transistor Tr.sub.2, the voltage V.sub.N1 at the node N.sub.1 should be V.sub.N1 .gtoreq.3 V.sub.BE +V.sub.F. That is, if the input voltage V.sub.IN is V.sub.IN .gtoreq.2 V.sub.BE +V.sub.F, the transistor Tr.sub.2 will turn on. In other words, the threshold voltage V.sub.H at the rising of V.sub.IN is V.sub.H =2 V.sub.BE +V.sub.F. The output voltage V.sub.out is the L level when V.sub.IN =L as in the case of FIG. 1a.

When the input voltage V.sub.IN is increased from V.sub.IN =L to V.sub.IN =2 V.sub.BE +V.sub.F (in this case V.sub.N1 =3 V.sub.BE +V.sub.F), the transistor Tr.sub.2 starts to turn on. The base current of the transistor Tr.sub.2 at this time is supplied through the load resistor R.sub.1 and the diodes D.sub.1 and D.sub.5 in a manner similar to the current I.sub.21 as shown in FIG. 1a. When the transistor Tr.sub.2 turns on, the transistor Tr.sub.4 turns off, causing the output voltage V.sub.out to change to the H level. Furthermore, the current I.sub.56 flows from the transistor Tr.sub.6 to the transistor Tr.sub.5 to turn on the transistor Tr.sub.5. Since the collector to emitter voltage V.sub.CE of the on-state transistor Tr.sub.5 is lower than V.sub.BE of diode D.sub.1, base current to the transistor Tr.sub.2 is supplied through the resistor R.sub.1, the collector to the emitter of the transistor Tr.sub.5, and the diode D.sub.5 as indicated by I.sub.25 after the transistor Tr.sub.5 turns on, instead of I.sub.21. While V.sub.IN =H, the above state is maintained.

While the input voltage V.sub.IN changes from V.sub.IN =H to V.sub.IN =L, the transistor Tr.sub.2 turns off. This turning off occurs when the voltage V.sub.N1 at the node N.sub.1 decreases to a level equal to or lower than V.sub.CE +2 V.sub.BE +V.sub.F, which is the sum of V.sub.CE of the transistor Tr.sub.5, V.sub.F of the diode D.sub.5, V.sub.BE of the transistor Tr.sub.2, and V.sub.BE of the diode D.sub.2. Therefore, when the input voltage V.sub.IN becomes V.sub.IN .gtoreq.V.sub.BE +V.sub.CE +V.sub.F, the transistor Tr.sub.2 turns off. In other words, the threshold voltage V.sub.L at the falling of V.sub.IN is V.sub.L =V.sub.BE +V.sub.CE +V.sub.F.

According to the Schmitt trigger circuit of FIG. 3a, the abrupt and large increase of the input current I.sub.IL when the input voltage V.sub.IN falls can be prevented. The reason for this is as follows. As aforementioned, the abrupt increase of I.sub.IL is due to the existence of the current I.sub.15, which flows through the collector to the emitter of the transistor Tr.sub.5 and the diode D.sub.3. In the circuit of FIG. 3a, the voltage along the route of the current I.sub.15 is

V.sub.CETr.sbsb.5 +V.sub.FD5 +V.sub.FD3, where V.sub.CETr.sbsb.5 is the collector to emitter voltage of the transistor Tr.sub.5 and V.sub.FD5 and where V.sub.FD3 are the forward voltage drops of the diodes D.sub.5 and D.sub.3, respectively. It is clear that the voltage V.sub.CETr.sbsb.5 +V.sub.FD5 +V.sub.FD3 is higher than the base to emitter voltage V.sub.BETr.sbsb.1 of the transistor Tr.sub.1. That is, a relationship of V.sub.BETr.sbsb.1 <V.sub.CETr.sbsb.5 +V.sub.FD5 +V.sub.FD3 exists. Therefore, according to the circuit of FIG. 3a, the current I.sub.15 is very small even when the input voltage V.sub.IN falls, as shown in FIG. 4a. Of course, this circuit functions to discharge from the base of the transistor Tr.sub.2 as does the conventional circuit of FIG. 1a.

In the inverting type Schmitt trigger circuit of FIG. 3b, the abrupt and great increase of the input current I.sub.IL when V.sub.IN falls can be prevented as shown in FIG. 4b, for the same reason as the circuit of FIG. 3a.

FIGS. 5a and 5b are other examples of non-inverting type and inverting type Schmitt trigger circuits according to the present invention.

The Schmitt trigger circuits of FIGS. 5a and 5b have almost the same construction as those of the respective circuits of FIGS. 3a and 3b, except that a resistor R.sub.6 is used instead of the diode D.sub.5. The resistance of the resistor R.sub.6 is designed so that voltage drop across the resistor R.sub.6 is almost equal to V.sub.F. The operations and effects of these examples of FIGS. 5a and 5b are also the same as that of FIGS. 3a and 3b.

From the description hereinbefore, in a Schmitt trigger circuit according to the present invention, a level shift element such as a diode D.sub.5 or a resistor R.sub.6 is connected between a third transistor Tr.sub.5 and an anode of a second diode D.sub.3. Therefore, a large and abrupt increase of the input current I.sub.IL when the input voltage falls can be reliably prevented. Accordingly, increasing the capacitance of a load in the former stage connected to this circuit is not required. Furthermore, a large number of fan-outs can be connected.

As many widely different embodiments of the present invention may be constructed without departing from the spirit and scope of the present invention, it should be understood that the present invention is not limited to the specific embodiments described in this specification, except as defined in the appended claims.

Claims

1. A Schmitt trigger circuit operatively connected to receive an input voltage and an input current and operatively connected to a power source and ground, comprising:

an input stage comprising:

a first transistor having a base operatively connected to receive the input voltage, having a collector operatively connected to ground, and having an emitter operatively connected to the power source; and

a load resistor operatively connected between the emitter of said first transistor and the power source;

an output stage operatively connected to said input stage;

a second transistor operatively connected between said input stage and said output stage, having a base operatively connected to receive the input voltage, having an emitter operatively connected to ground, and having a collector operatively connected to the power source, said second transistor being turned on and off in dependence upon the input voltage, for controlling said output stage;

first circuit means including a first diode having a first terminal operatively connected to the emitter of said first transistor, and having a second terminal operatively connected to the base of said second transistor, the forward voltage drop of said first diode determining a threshold level of the input voltage to turn on said second transistor;

a third transistor, operatively connected in parallel with said first diode, having a collector operatively connected to the first terminal of said diode, having an emitter operatively connected to the second terminal of said diode, and having a base, for clamping the forward voltage of said first diode so as to determine a threshold level of the input voltage to turn off said second transistor;

second circuit means, operatively connected to said third transistor, for turning on said third transistor when said second transistor turns on;

third circuit means including a second diode having a cathode terminal operatively connected to the base of said first transistor and having an anode terminal operatively connected to the base of said second transistor, for discharing charges stored in the base of said second transistor; and

level shift means, operatively connected between the emitter of said third transistor and the anode terminal of said second diode, for preventing an abrupt increase in the input current when the input voltage decreases.

2. A Schmitt trigger circuit as claimed in claim 1, wherein said level shift means comprises a third diode having an anode operatively connected to the emitter of said third transistor, and having a cathode operatively connected to the anode terminal of said second diode.

3. A Schmitt trigger circuit as claimed in claim 1, wherein said level shift means comprises a resistor having a first terminal operatively connected to the emitter of said third transistor and having a second terminal operatively connected to the anode terminal of said second diode.

4. A Schmitt trigger circuit receiving an input voltage and operatively connected to a power source and ground, comprising:

a first transistor having a base operatively connected to receive the input voltage, having an emitter operatively connected to the power source, and having a collector operatively connected to ground;

a second transistor having a base operatively connected to the base of said first transistor, having a collector operatively connected to the power source, and having an emitter operatively connected to ground;

a first diode having a cathode operatively connected to the base of said first transistor and an anode operatively connected to the base of said second transistor;

a level shift circuit having a first terminal operatively connected to the anode of said first diode and having a second terminal;

a diode circuit having a first terminal operatively connected to the second terminal of said level shift circuit and having a second terminal operatively connected to the emitter of said first transistor; and

a third resistor having a collector operatively connected to the second terminal of said diode circuit, having an emitter operatively connected to the second terminal of said level shift circuit, and having a base.

5. A Schmitt trigger circuit according to claim 4, wherein said level shift circuit comprises a second diode, said first terminal being the anode of said second diode and said second terminal being the cathode of said second diode.

6. A Schmitt trigger circuit according to claim 4, wherein said level shift circuit comprises a resistor.