Patent Grant
11456862
The present invention relates to the field of cryptographic techniques, and more particularly to the field of secure computation techniques.
In some schemes, values are exchanged among multiple secure computation apparatuses and each secure computation apparatus performs secure computation such as secure multiplication or secure multiply-accumulate using values received from other secure computation apparatuses (see Patent Literature 1, for instance).
Patent Literature 1: Japanese Registered Patent No. 6006842
The scheme described in Patent Literature 1, however, has the disadvantage of involving a large number of additions/subtractions and multiplications and a large number of memory accesses.
An object of the present invention is to provide techniques for performing secure multiplication or secure multiply-accumulate with a less number of additions/subtractions and multiplications and a less number of memory accesses than conventional techniques.
The secure multiplication according to the present invention is performed in the following manner. A storage of a secure computation apparatus Pi and a storage of a secure computation apparatus P+ have stored therein subshares a+∈{a0, a1, a2} and b+∈{b0, b1, b2}, and the storage of the secure computation apparatus Pi and a storage of a secure computation apparatus P− have stored therein subshares a−∈A− and b−∈B−. Here, i∈{0, 1, 2} holds; P+ is P(i+1)mod 3; P− is P(i−1)mod 3; a and b are arbitrary values; a0, a1, and a2 are subshares satisfying a=a0+a1+a2; b0, b1, and b2 are subshares satisfying b=b0+b1+b2; A− is a complement of a+ in {a0, a1, a2}; and a is a complement of b+ in {b0, b1, b2}. A sharing unit of the secure computation apparatus Pi and a sharing unit of the secure computation apparatus P+ share an arbitrary value r+, and the sharing unit of the secure computation apparatus Pi and a sharing unit of the secure computation apparatus P− share an arbitrary value r−, and an arithmetic unit of the secure computation apparatus Pi calculates c+=(a++a−)(b++b−)−a−b−+r+−r−. An output unit of each secure computation apparatus Pi outputs c+ to the secure computation apparatus P+, and c+ is input to an input unit of the secure computation apparatus P+.
The secure multiply-accumulate according to the present invention is performed in the following manner. A storage of a secure computation apparatus Pi and a storage of a secure computation apparatus P+ have stored therein subshares a+(n)∈{a0(n), a1(n), a2(n)} and b+(n)∈{b0(n), b1(n), b2(n)}, and the storage of the secure computation apparatus Pi and a storage of a secure computation apparatus P− have stored therein subshares a−(n)∈A−(n) and b−(n)∈B−(n). Here, i∈{0, 1, 2} holds; P+ is P(i+1)mod 3; P− is P(i−1)mod 3; a(n) and b(n) are arbitrary values; a0(n), a1(n), and a2(n) are subshares satisfying a(n)=a0(n)+a1(n)+a2(n); b0(n), b1(n), and b2(n) are subshares satisfying b(n)=b0(n)+b1(n)+b2(n); N is a positive integer, where n=0, . . . , N−1; A−(n) is a complement of a+(n) in {a0(n), a1(n), a2(n)}; and B−(n) is a complement of b+(n) in {b0(n), b1(n), b2(n)}. A sharing unit of the secure computation apparatus Pi and a sharing unit of the secure computation apparatus P+ share an arbitrary value r+, the sharing unit of the secure computation apparatus Pi and a sharing unit of the secure computation apparatus P− share an arbitrary value r−, and an arithmetic unit of the secure computation apparatus Pi calculates:
c+=Σn=0N-1{(a+(n)+a−(n))(b+(n)+b−(n))−a−(n)b−(n)+r+−r−}
Each secure computation apparatus Pi outputs c+ to the secure computation apparatus P+, and c+ is input to an input unit of the secure computation apparatus P+.
This allows secure multiplication or secure multiply-accumulate to be performed with a less number of additions/subtractions and multiplications and a less number of memory accesses compared to conventional techniques.
Embodiments of the present invention are described below using the drawings.
In a first embodiment, multiplication ab∈F of arbitrary values a, b∈F is performed by secure computation (secure multiplication). Here, F represents a finite field. This secure multiplication obtains secret sharing values of a multiplication result ab from secret sharing values (shares) of the arbitrary value a and secret sharing values of the arbitrary value b. This is described in detail below.
<Configuration>
As illustrated in
<Preliminary Processing>
Through preliminary processing, an arbitrary value a is secret-shared among subshares a0, a1, a2∈F satisfying a=a0+a1+a2∈F, and an arbitrary value b is secret-shared among subshares b0, b1, b2∈F satisfying b=b0+b1+b2∈F. A storage 111-P1 of a secure computation apparatus 11-Pi has stored therein subshares a+∈{a0, a1, a2} and b+∈{b0, b1, b2}, and a storage 111-P+ of a secure computation apparatus 11-P+ also has stored therein the subshares a+ and b+. The subshare a+ is any one element of {a0, a1, a2}, and the subshare b+ is any one element of {b0, b1, b2}. The storage 111-Pi of the secure computation apparatus 11-Pi has stored therein subshares a−∈A− and b−∈B−, and a storage 111-P− of a secure computation apparatus 11-P− also has stored therein subshares a− and b−. The subshare a− is any one element of A−, and the subshare b− is any one element of B−. Here, A− is a complement of a+ in {a0, a1, a2} (A−={a0, a1, a2}|{a+}), and B− is a complement of b+ in {b0, b1, b2}(B−={b0, b1, b2}−{b+}). Also, i∈{0, 1, 2} holds, P+ is P(i+1)mod 3, and P− is P(i−1)mod 3. In the example of
<Secure Computation>
On the precondition that this preliminary processing has been performed, each secure computation apparatus 11-Pi (where i∈{0, 1, 2}) performs the following secure computation (
A sharing unit 114-Pi of each secure computation apparatus 11-Pi and a sharing unit 114-P+ of the secure computation apparatus 11-P+ share an arbitrary value r+∈F. That is, the sharing unit 114-Pi and the sharing unit 114-P+ each obtain the same arbitrary value r+ as that obtained by the other. The shared arbitrary value r+ is stored in the storage 111-Pi and the storage 111-P+. Examples of the arbitrary value r+ include a pseudo random number, a true random number, a value selected from multiple predetermined values, an input value, a value resulting from a separate process, and the like. Sharing of the arbitrary value r+ can be done in a known manner. For example, the arbitrary value r+ may be shared between the sharing unit 114-Pi and the sharing unit 114-P+ by sending the arbitrary value r+ or information for identifying the arbitrary value r+ from the sharing unit 114-Pi to the sharing unit 114-P+. Conversely, the arbitrary value r+ may be shared between the sharing unit 114-Pi and the sharing unit 114-P+ by sending the arbitrary value r+ or information for identifying the arbitrary value r+ from the sharing unit 114-P+ to the sharing unit 114-Pi. The sharing unit 114-Pi and the sharing unit 114-P+ may also share a seed value with each other beforehand and perform predetermined processing using the seed value so that the arbitrary value r+ is shared between the sharing unit 114-Pi and the sharing unit 114-P+. The arbitrary value r+ may also be shared between the sharing unit 114-Pi and sharing unit 114-P+ by means of a known key exchange algorithm (step S11).
The sharing unit 114-Pi of each secure computation apparatus 11-Pi and the sharing unit 114-P− of the secure computation apparatus 11-P− share an arbitrary value r−∈F. That is, the sharing unit 114-Pi and the sharing unit 114-P− each obtain the same arbitrary value r− as that obtained by the other. The shared arbitrary value r− is stored in the storage 111-Pi and the storage 111-P−. Examples of the arbitrary value r− include a pseudo random number, a true random number, a value selected from multiple predetermined values, an input value, a value resulting from a separate process, and the like. Sharing of the arbitrary value r− can be done in a known manner. For example, the arbitrary value r− may be shared between the sharing unit 114-Pi and the sharing unit 114-P− by sending the arbitrary value r− or information for identifying the arbitrary value r− from the sharing unit 114-Pi to the sharing unit 114-P−. Conversely, the arbitrary value r− may be shared between the sharing unit 114-Pi and the sharing unit 114-P− by sending the arbitrary value r− or information for identifying the arbitrary value r− from the sharing unit 114-P− to the sharing unit 114-Pi. Alternatively, the sharing unit 114-Pi and the sharing unit 114-P− may share a seed value with each other beforehand and perform predetermined processing using the seed value so that the arbitrary value r− is shared between the sharing unit 114-Pi and the sharing unit 114-P−. The arbitrary value r− may also be shared between the sharing unit 114-Pi and the sharing unit 114-P− by means of a known key exchange algorithm (step S12).
In the example of
An arithmetic unit 112-Pi of each secure computation apparatus 11-Pi uses a+, a−, b+, b−, r+, and r− read from the storage 111-Pi to calculate and output c+=(a++a−)(b++b−)−a−b−+r+−r−∈F. In the example of
A communication unit 115-Pi of each secure computation apparatus 11-P1 transmits c+ (outputs c+) to the secure computation apparatus 11-P+ (step S14). c+ is received by (input to) a communication unit 115-P+ of the secure computation apparatus 11-P+. Letting c− represent a value calculated by an arithmetic unit 112-P− of the secure computation apparatus 11-P− and transmitted from a communication unit 115-P−, the communication unit 115-Pi of each secure computation apparatus 11-Pi receives c− (step S15). In the example of
c− received at step S15 and c+ obtained at step S13 are stored in the storage 111-Pi of each secure computation apparatus 11-Pi. In the example of
c0, c1, and c2 in this embodiment are the subshares of the multiplication result ab which satisfies ab=c0+c1+c2∈F, and (c0, c1), (c1, c2), and (c2, c0) are the secret sharing values of the multiplication result ab. Obtaining any two of these secret sharing values (c0, c1), (c1, c2), (c2, c0) allows reconstruction of the multiplication result ab. That is, c0+c1+c2=ab is satisfied. In the example of
(c−, c+) stored in the storage 111-Pi of each secure computation apparatus 11-Pi may be provided as input to a further secure computation apparatus (not shown), or may be provided as input to a reconstruction apparatus (not shown) which reconstructs the multiplication result ab for reconstruction and output of the multiplication result ab.
As shown above, this embodiment allows secure multiplication to be performed with a less number of additions/subtractions and multiplications and a less number of memory accesses compared to the conventional scheme described in Patent Literature 1. More specifically, the conventional scheme described in Patent Literature 1 requires each secure computation apparatus to save, in its memory, values obtained by performing additions/subtractions and multiplications on its own using secret sharing values or the like stored in the memory, to receive values that were obtained at another secure computation apparatus by additions/subtractions and multiplications and save them in the memory, and to further perform additions/subtractions and multiplications using these values saved in the memory. The scheme of Patent Literature 1 accordingly involves large numbers of additions/subtractions and multiplications and memory accesses. In this embodiment, by contrast, values that are obtained by each secure computation apparatus by performing additions/subtractions and multiplications on its own using secret sharing values and the like stored in its memory and values that are obtained at another secure computation apparatus by performing additions/subtractions and multiplication directly become the subshares of an arithmetic result. Thus, it involves a less number of additions/subtractions and multiplications and a less number of memory accesses than the scheme of Patent Literature 1. Particularly in secure computation of high arithmetic speed, the time for memory access creates a bottleneck in the improvement of the overall arithmetic speed. Because the scheme of this embodiment allows reduction in the number of memory accesses, it can significantly improve the arithmetic speed. For example, when calculating cXY=a−b++a+ b−−rZX, secure multiplication with a conventional technique reads a−, b+, a+, and b− and writes the resulting cXY. This requires execution of two multiplications and two additions/subtractions. Further, when calculating c−=a−b−+cZX+rZX, secure multiplication with the conventional technique reads a−, b−, and cZX and writes c−. This requires execution of one multiplication and three additions/subtractions. Still further, when calculating c+=a+ b++cXY+rXY, secure multiplication with the conventional technique reads a+, b+, and cXY and writes the resulting c+. This requires execution of one multiplication and three additions/subtractions. Consequently, in total, it is necessary to perform ten reading operations, three writing operations, four multiplications, and eight additions/subtractions per party. By contrast, when calculating c+=(a++a−)(b++b−)−a−b−+r+−r−, the secure computation apparatus 10-Pi of this embodiment reads a−, b+, a+, and b− and writes the resulting c+. Thus, in total, only four reading operations, one writing operation, two multiplications, and five additions/subtractions are required per party. Compared to the conventional technique, this embodiment can lessen the number of reading operations to 40%, the number of writing operations to 33%, the number of multiplications to 50%, and the number of additions/subtractions to 63%.
In a second embodiment, multiply-accumulate a(0)b(0)+ . . . +a(N−1)b(N−1)∈F with arbitrary values a(0), a(N−1) and b(0), b(N−1) is performed by secure computation (secure multiply-accumulate). Here, F represents a finite field and N is a positive integer (for example, an integer greater than 1). This secure multiply-accumulate obtains secret sharing values of a multiply-accumulate result a(0)b(0)+ . . . +a(N−1)b(N−1) from secret sharing values of an arbitrary value a(n) and secret sharing values of an arbitrary value b(n) for n=0, . . . , N−1. This is described in detail below.
<Configuration>
As illustrated in
<Preliminary Processing>
Through preliminary processing, an arbitrary value a(n) is secret-shared among subshares a0(n), a1(n), a2(n)∈F satisfying a(n)=a0(n)+a1(n)+a2(n)∈F, and an arbitrary value b(n) is secret-shared among subshares b0(n), b1(n), b2(n)∈F satisfying b(n)=b0(n)+b1(n)+b2(n)∈F, for n=0, . . . , N−1 (where N is a positive integer, for example, N is an integer greater than 1). A storage 211-Pi of a secure computation apparatus 21-Pi has stored therein subshares a+(n)∈{a0(n), a1(n), a2(n)} and b+(n)∈{b0(n), b1(n), b2(n)} for n=0, . . . , N−1, and a storage 211-P+ of a secure computation apparatus 21-P+ also has stored therein the subshares a+(n) and 13+(n) for n=0, . . . , N−1. Each subshare a+(n) is any one element of {a0(n), a1(n), a2(n)}, and each subshare b+(n) is any one element of {b0(n), b1(n), b2(n)}. The storage 211-Pi of the secure computation apparatus 21-Pi has stored therein subshares a−(n)∈A−(n) and b−(n)∈B−(n) for n=0, . . . , N−1, and a storage 211-P− of a secure computation apparatus 21-P− also has stored therein subshares a−(n) and b−(n) for n=0, . . . , N−1. Each subshare a−(n) is any one element of A−(n), and each subshare b−(n) is any one element of B−(n). Here, A−(n) is a complement of a+(n) in {a0(n), a1(n), a2(n)}(A−(n)={a0(n), a1(n), a2(n)}-{a+(n)}), and B−(n) is a complement of b+(n) in {b0(n), b1(n), b2(n)}(B−(n)={b0(n), b1(n), b2(n)}-{b+(n)}). Also, i∈{0, 1, 2} holds, P+ is P(i+1)mod 3, and P− is P(i−1)mod 3. In the example of
<Secure Computation>
On the precondition that this preliminary processing has been performed, each secure computation apparatus 21-Pi (where i∈{0, 1, 2}) performs the following secure computation (
A sharing unit 114-Pi of each secure computation apparatus 21-Pi and a sharing unit 114-P+ of the secure computation apparatus 21-P+ share an arbitrary value r+ E F. The shared arbitrary value r+ is stored in the storage 211-Pi and the storage 211-P+. Specific examples of the arbitrary value r+ and the process of sharing it were described in the first embodiment (step S21).
The sharing unit 114-Pi of each secure computation apparatus 21-Pi and the sharing unit 114-P− of the secure computation apparatus 21-P− share an arbitrary value r−∈F. The shared arbitrary value r− is stored in the storage 211-Pi and the storage 211-P−. Specific examples of the arbitrary value r− and the process of sharing it were described in the first embodiment (step S22).
In the example of
An arithmetic unit 212-Pi of each secure computation apparatus 21-Pi uses a+(n), a−(n), b+(n), b−(n), r+, and r− for n=0, . . . , N−1 read from the storage 211-Pi to calculate and output:
c+=Σn=0N-1{(a+(n))+a−(n))(b+(n)+b−(n))−a−(n)b−(n)+r+−r−}∈F
In the example of
c1=Σn=0N-1{(a0(n))+a1(n))(b0(n)+b1(n))−a0(n)b0(n)+r01−r20}∈F
the arithmetic unit 212-P1 of the secure computation apparatus 21-Pi calculates and outputs:
c2=Σn=0N-1{(a1(n))+a2(n))(b1(n)+b2(n))−a1(n)b1(n)+r12−r01}∈F
and the arithmetic unit 212-P2 of the secure computation apparatus 21-P2 calculates and outputs:
c0=Σn=0N-1{(a2(n))+a0(n))(b2(n)+b0(n))−a2(n)b2(n)+r20−r12}∈F
(step S23).
A communication unit 115-Pi of each secure computation apparatus 21-Pi transmits c+ (outputs c+) to the secure computation apparatus 21-P+ (step S24). c+ is received by (input to) a communication unit 115-P+ of the secure computation apparatus 21-P+. Letting c− represent a value calculated by an arithmetic unit 212-P− of the secure computation apparatus 21-P− and transmitted from the communication unit 115-P− the communication unit 115-Pi of each secure computation apparatus 21-Pi receives c− (step S25). In the example of
c− received at step S25 and c+ obtained at step S23 are stored in the storage 211-Pi of each secure computation apparatus 21-Pi. In the example of
c0, c1, and c2 in this embodiment are the subshares of the multiply-accumulate result a(0)b(0)+ . . . +a(N−1)b(N−1), which satisfies a(0)b(0)+ . . . +a(N−1)b(N−1)=c0+c1+c2∈F. (c0, c1), (c1, c2), and (c2, c0) are the secret sharing values of the multiply-accumulate result a(0)b(0)+ . . . +a(N−1)b(N−1). Obtaining any two of these secret sharing values (c0, c1), (c1, c2), (c2, c0) allows reconstruction of the multiply-accumulate result a(0)b(0)+ . . . +a(N−1)b(N−1). That is, c0+c1+c2=a(0)b(0)+ . . . +a(N−1)b(N−1) is satisfied.
(c−, c+) stored in the storage 211-Pi of each secure computation apparatus 21-Pi may be provided as input to a further secure computation apparatus (not shown), or may be provided as input to a reconstruction apparatus (not shown) which reconstructs the multiply-accumulate result a(0)b(0)+ . . . +a(N−1)b(N−1) for reconstruction and output of the multiply-accumulate result a(0)b(0)+ . . . +a(N−1)b(N−1).
As shown above, this embodiment allows secure multiply-accumulate to be performed with a less number of additions/subtractions and multiplications and a less number of memory accesses compared to the conventional scheme described in Patent Literature 1.
It is to be noted that the present invention is not limited to the foregoing embodiments. For example, the above-described various kinds of processing may be executed, in addition to being executed in chronological order in accordance with the descriptions, in parallel or individually depending on the processing power of an apparatus that executes the processing or when needed. In addition, it goes without saying that changes may be made as appropriate without departing from the spirit of the present invention. Also, the arbitrary value r+ in the second embodiment may be r+(n) corresponding to each one of n=0, . . . , N−1, and the arbitrary value r− may be r−(n) corresponding to each one of n=0, . . . , N−1. For instance, in the example of
The above-described each apparatus is embodied by execution of a predetermined program by a general- or special-purpose computer having a processor (hardware processor) such as a central processing unit (CPU), memories such as random-access memory (RAM) and read-only memory (ROM), and the like, for example. The computer may have one processor and one memory or have multiple processors and memories. The program may be installed on the computer or pre-recorded on the ROM and the like. Also, some or all of the processing units may be embodied using an electronic circuit that implements processing functions without using programs, rather than an electronic circuit (circuitry) that implements functional components by loading of programs like a CPU. An electronic circuit constituting a single apparatus may include multiple CPUs.
When the above-described configurations are implemented by a computer, the processing details of the functions supposed to be provided in each apparatus are described by a program. As a result of this program being executed by the computer, the above-described processing functions are implemented on the computer. The program describing the processing details can be recorded on a computer-readable recording medium. An example of the computer-readable recording medium is a non-transitory recording medium. Examples of such a recording medium include a magnetic recording device, an optical disk, a magneto-optical recording medium, and semiconductor memory.
The distribution of this program is performed by, for example, selling, transferring, or lending a portable recording medium such as a DVD or a CD-ROM on which the program is recorded. Furthermore, a configuration may be adopted in which this program is distributed by storing the program in a storage device of a server computer and transferring the program to other computers from the server computer via a network.
The computer that executes such a program first, for example, temporarily stores the program recorded on the portable recording medium or the program transferred from the server computer in a storage device thereof. At the time of execution of processing, the computer reads the program stored in the storage device thereof and executes the processing in accordance with the read program. As another mode of execution of this program, the computer may read the program directly from the portable recording medium and execute the processing in accordance with the program and, furthermore, every time the program is transferred to the computer from the server computer, the computer may sequentially execute the processing in accordance with the received program. A configuration may be adopted in which the transfer of a program to the computer from the server computer is not performed and the above-described processing is executed by so-called application service provider (ASP)-type service by which the processing functions are implemented only by an instruction for execution thereof and result acquisition.
Instead of executing a predetermined program on the computer to implement the processing functions of the present apparatuses, at least some of the processing functions may be implemented by hardware.
1, 2 secure computation system
11-P secure computation apparatus
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| JP2017-132034 | Jul 2017 | JP | national |
| Filing Document | Filing Date | Country | Kind |
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| PCT/JP2018/024588 | 6/28/2018 | WO |
| Publishing Document | Publishing Date | Country | Kind |
|---|---|---|---|
| WO2019/009180 | 1/10/2019 | WO | A |
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