Secure digital memory devices and controllers thereof

Abstract

A secure digital memory device comprising a first memory chip, a second memory chip, and a controller. The controller is coupled to the first and second memory chips and operates in an automatic backup mode of the secure digital memory device. In the automatic backup mode, the controller configures the first and second memory chips as main and backup memory partitions respectively. When data is written into the secure digital memory device, the controller writes the data to the main memory partition and into the backup memory partition to serve as backup data.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:

FIG. 1 depicts an conventional secure digital memory device;

FIG. 2A depicts an exemplary embodiment of a secure digital memory device; and

FIG. 2B is a schematic view showing a normal mode of the secure digital memory device of FIG. 2A.

Claims

1. A secure digital memory device, comprising: a first memory chip;a second memory chip; anda controller coupled to the first and second memory chips and operating in an automatic backup mode of the secure digital memory device;wherein, in the automatic backup mode, the controller configures the first and second memory chips as main and backup memory partitions respectively; andwherein, when data is written into the secure digital memory device, the controller writes the data to the main memory partition and into the backup memory partition to serve as backup data.

2. The secure digital memory device as claimed in claim 1, wherein the controller further operates in a normal mode of the secure digital memory device, and the controller integrates the first and second memory chips into a normal memory area in the normal mode.

3. The secure digital memory device as claimed in claim 2, wherein the controller receives a control program and is switched to the normal or automatic backup mode according to the control program.

4. The secure digital memory device as claimed in claim 1, wherein the controller is coupled a switch signal, and in the automatic backup mode: if the switch signal is invalid and the secure digital memory device is desired to read data, the controller reads the data in the main memory partition; andif the switch signal is valid and the secure digital memory device is desired to read data, the controller reads the data in the backup memory partition.

5. The secure digital memory device as claimed in claim 4 further comprising: a switch having a first and second positions; anda switch detection device for determining a position of the switch;wherein, when the switch is in the first position, the switch detection device makes a switch signal invalid; andwherein, when the switch is in the second position, the switch detection device makes the switch signal valid.

6. A controller disposed in a secure digital memory device and coupled to a first and second memory chips of the secure digital memory device, and the controller comprising a register; wherein, when the register stores a first setting value, the controller configures the first and second memory chips as a main and backup memory partitions respectively; andwherein, when data is written into the secure digital memory device, the controller writes the data to the main memory partition and into the backup memory partition to serve as backup data.

7. The controller as claimed in claim 6, wherein when the register stores a second setting value, the controller integrates the first and second memory chips into a normal memory area.

8. The controller as claimed in claim 7, wherein the controller receives a control program to change a setting value of the register to the first or second setting value.

9. The controller as claimed in claim 6, wherein controller is coupled a switch signal, and when the register stores the first setting value: if the switch signal is invalid and the controller is desired to read data, the controller reads the data in the main memory partition; andif the switch signal is valid and the controller is desired to read data, the controller reads the data in the backup memory partition.

10. The controller as claimed in claim 6 further comprising: a switch detection device coupled to a switch of the secure digital memory device for determining a position of the switch;wherein, the switch has a first and second positions;wherein, when the switch is in the first position, the switch detection device makes a switch signal invalid; andwherein, when the switch is in the second position, the switch detection device makes the switch signal valid.