This application provides techniques for coupled inductor circuits for DC-DC voltage converters or regulators.
DC-DC switching regulators, as the name applies, use high-frequency switching to generate a desired output voltage for an electronic device. In certain applications, the demand for low voltage electronics to accept relatively high supply voltages creates design challenges for stepping down the supply voltage to a low supply voltage. The same, or very similar, design challenges can also be found in step-up applications where a high supply voltage is converted from a low input supply voltage.
In the drawings, which are not necessarily drawn to scale, like numerals may describe similar components in different views. Like numerals having different letter suffixes may represent different instances of similar components. The drawings illustrate generally, by way of example, but not by way of limitation, various embodiments discussed in the present document.
The present inventor(s) have recognized techniques for planar transformers, or planar coupled inductor circuits, that can employ segmented windings to reduce the size, and possibly, the complexity of certain step-down and step-up transformers for DC-to-DC voltage converters compared to conventional techniques.
As illustrated, the example of
In certain examples, the coupled inductor circuit 100 can include a controller 225 mounted within or on the substrate. In some examples, the controller 225 can be remote from the coupled inductor circuit 100. For the present example, the primary winding circuit 220 can have 3 states of operation. A first state, a free-wheeling state, can have a first switch (Q1) and a second switch (Q2) “OFF” or in a high impedance state, and a third switch (Q3) and a fourth switch (Q4) “ON”, or in a low impedance state. In the first, free-wheeling state, the terminal ends 221, 222 of the first winding 101 can be isolated from a DC supply voltage and can be coupled to a reference voltage such as ground (GND). Such connection can terminate current passing through the first winding 101. In certain examples, just before, and just after, the supply voltage (VIN) is applied across the first winding, all the switches (Q1, Q2, Q3, Q4) can be placed in a high-impedance state for a short interval to prevent shorting the supply voltage (VIN) to ground due to, for example, a longer inherent delay of one of the switches (Q1, Q2, Q3, Q4) compared to another.
The second state and the third state of the first winding circuit 220, or at least the transition to each such state, can be power generating states of the coupled inductor circuit 100. In the second state, the second switch (Q2) and the third switch (Q3) can be “ON”, and the first switch (Q1) and the fourth switch (Q4) can be “OFF”. The second state can provide a DC voltage (Vd) across the first winding 101 with a first terminal end 221 of the first winding 101 more positive than the second terminal end 222 of the first winding 101. In the third state, the first switch (Q1) and the fourth switch (Q4) can be “ON”, and the second switch (Q2) and the third switch (Q3) can be “OFF”. The third state can again provide the DC voltage (Vd) across the first winding 101, but with the first terminal end 221 of the first winding 101 more negative than the second terminal end 222 of the first winding 101. Therefore, the difference between the second and third states of operation of the first winding circuit 220 is the polarity of the supply voltage (Vd) coupled to the first winding 101.
In certain examples, some segments of the second winding 102 can be electrically coupled. For example, in the illustrated example, each segment trace 109, 110 in the third layer 105 can be electrically connected in parallel to a corresponding segment trace 309, 310 in the fourth layer 106. With the parallel connections of the segments, or segment traces, of the second winding 102, the coupled inductor circuit 100 can provide a step down of the voltage applied to the first winding 101 by a factor of 8.
In general, the voltage ratio (V1/V2) between the first winding voltage and the second winding voltage can be given by:
where V1 is the voltage at the terminal ends of the first winding, V2 is the voltage at the terminal ends of the second winding, N is the turns ratio and Ns is the number of segments per turn of the segmented second winding. For the illustrated coupled inductor circuit and layers of
In certain examples, the coupled inductor circuit can include an output stage coupled to drains of the switches that can provide an output DC voltage. In an example, the output stage can include an individual inductor having one node coupled to a corresponding output node (A, B, C, D) of the second winding 102. The other node of each inductor can be coupled to the other node of the other inductors to provide an output node for providing the output DC voltage.
In general, the winding segments of the second winding are placed in one of three phases to capture a voltage induced by the first winding during the transitions associated with the supply voltage being applied to, or isolated from the first winding. When the supply voltage is applied to, or isolated from, the first winding, the change in current through the first winding can induce a voltage across each second winding segment. By switching the connections of the second winding segments to capture the voltage induced as current polarity of the first winding is changed, a stepped-down DC voltage can be captured at the terminal ends, or output nodes (A, B, C, D), of the second winding. The plot of signals assumes that a logic high places each switch, or transistor, in a low impedance state (e.g., “on”) and a logic low places each switch in a high impedance state (e.g., “off”). However, it is understood that switches or transistors responding to logic commands differently are possible and do not depart form the scope of the present subject matter.
For example, at to, the first winding circuit is in the first, free-wheeling state and the second winding circuit has all the switches (M1-M8) “on” (e.g., PH1=PH2=“high”), thus, coupling each node of the segments to ground. The free-wheeling state of the first winding allows any current in the first winding to continue to flow until terminated by the circuit losses. As the switching of the system is relatively fast, there is generally little of any change in current during the free-wheeling state. Since there is little change in current flow of the first winding, no voltage is induced by the first winding in the segments of the second winding.
At t1, the first winding circuit moves to the second state, and a supply voltage can be applied across the first winding with a first polarity (+VIN). The application of the supply voltage (VIN) can induce a change in current (I1) of the first winding and a voltage can be induced across segments of the second winding. For example, at or in response to the application of the supply voltage (+VIN) on the first winding, the switches (
At t2, the first winding circuit transitions back to the first, free-wheeling state and the second winding circuit has all the switches (M1-M8) “on” (e.g., PH1=PH2=“high”), thus, coupling each node of the second winding segments to ground. As before, any current flowing in the first winding continues to flow because the first winding inductance resists a change in current flow. The current may fall slightly during the free-wheeling state due to losses in the circuit, however, for purposes of this disclosure, the losses are negligible due to the high switching frequency of the system.
At t3, the first winding circuit moves to the third state, and the supply voltage (VIN) can be applied across the first winding with a second polarity (−VIN). The application of the supply voltage (VIN) can induce a change in current (I1) of the first winding and voltage can be induced across segments of the second winding. For example, at or in response to the application of the supply voltage (−VIN) on the first winding, the switches (
In certain examples, a coupled inductor circuit that employs a winding with segmented turns can benefit over conventional transformers as the resistance of the winding with the fractional turns can be less that the resistance of a traditional winding.
8 units/turn*4 turns=32 units.
For the example second winding of
2 units/segment*4 segments=8 units.
The reduced winding resistance of the example segmented second winding of
A second phase of the method can couple the second node of the first segment to ground, isolate the first node of the first segment from ground, apply the supply voltage with opposite polarity to the second winding, and induce the voltage at the first node using the current change of the second winding. Between phases, the method can include electrically coupling the ends of the second winding together such that current flow in the second winding is maintained, and can include coupling each node of each segment of the segmented winding to a ground plate.
The above detailed description includes references to the accompanying drawings, which form a part of the detailed description. The drawings show, by way of illustration, specific embodiments in which the invention can be practiced. These embodiments are also referred to herein as “examples.” Such examples can include elements in addition to those shown or described. However, the present inventors also contemplate examples in which only those elements shown or described are provided. Moreover, the present inventors also contemplate examples using any combination or permutation of those elements shown or described (or one or more aspects thereof), either with respect to a particular example (or one or more aspects thereof), or with respect to other examples (or one or more aspects thereof) shown or described herein.
In the event of inconsistent usages between this document and any documents so incorporated by reference, the usage in this document controls.
In this document, the terms “a” or “an” are used, as is common in patent documents, to include one or more than one, independent of any other instances or usages of “at least one” or “one or more.” In this document, the term “or” is used to refer to a nonexclusive or, such that “A or B” includes “A but not B,” “B but not A,” and “A and B,” unless otherwise indicated. In this document, the terms “including” and “in which” are used as the plain-English equivalents of the respective terms “comprising” and “wherein.” Also, the terms “including” and “comprising” are open-ended, that is, a system, device, article, composition, formulation, or process that includes elements in addition to those listed after such a term are still deemed to fall within the scope of subject matter discussed. Moreover, such as may appear in a claim, the terms “first,” “second,” and “third,” etc. are used merely as labels, and are not intended to impose numerical requirements on their objects.
Method examples described herein can be machine or computer-implemented at least in part. Some examples can include a computer-readable medium or machine-readable medium encoded with instructions operable to configure an electronic device to perform methods as described in the above examples. An implementation of such methods can include code, such as microcode, assembly language code, a higher-level language code, or the like. Such code can include computer readable instructions for performing various methods. The code may form portions of computer program products. Further, in an example, the code can be tangibly stored on one or more volatile, non-transitory, or non-volatile tangible computer-readable media, such as during execution or at other times. Examples of these tangible computer-readable media can include, but are not limited to, hard disks, removable magnetic disks, removable optical disks (e.g., compact disks and digital video disks), magnetic cassettes, memory cards or sticks, random access memories (RAMs), read only memories (ROMs), and the like.
The above description is intended to be illustrative, and not restrictive. For example, the above-described examples (or one or more aspects thereof) may be used in combination with each other. Other embodiments can be used, such as by one of ordinary skill in the art upon reviewing the above description. The Abstract is provided to comply with 37 C.F.R. § 1.72(b), to allow the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of a claim. Also, in the above Detailed Description, various features may be grouped together to streamline the disclosure. This should not be interpreted as intending that an unclaimed disclosed feature is essential to any claim. Rather, inventive subject matter may lie in less than all features of a particular disclosed embodiment. The following aspects are hereby incorporated into the Detailed Description as examples or embodiments, with each aspect standing on its own as a separate embodiment, and it is contemplated that such embodiments can be combined with each other in various combinations or permutations.
Number | Name | Date | Kind |
---|---|---|---|
4058758 | Peterson | Nov 1977 | A |
6091616 | Jacobs | Jul 2000 | A |
7129784 | Bhatti et al. | Oct 2006 | B2 |
7298238 | Eaton | Nov 2007 | B1 |
7332993 | Nussbaum | Feb 2008 | B1 |
7576607 | Lee et al. | Aug 2009 | B2 |
7915989 | Li et al. | Mar 2011 | B2 |
7915991 | Waffenschmidt et al. | Mar 2011 | B2 |
7940152 | Kim et al. | May 2011 | B1 |
7944296 | Lee et al. | May 2011 | B1 |
8044732 | Kossel et al. | Oct 2011 | B2 |
8725085 | Darabi et al. | May 2014 | B2 |
8842410 | Chan | Sep 2014 | B2 |
9379629 | Chandrasekaran | Jun 2016 | B2 |
20040017276 | Chen et al. | Jan 2004 | A1 |
20060066431 | Anand et al. | Mar 2006 | A1 |
20060197510 | Chandrasekaran | Sep 2006 | A1 |
20070103941 | Liu | May 2007 | A1 |
20090010971 | Nakahori | Apr 2009 | A1 |
20110215865 | Nam et al. | Sep 2011 | A1 |
20140153294 | Deboy et al. | Jun 2014 | A1 |
20170085183 | Notsch | Mar 2017 | A1 |
20170271073 | Zeng et al. | Sep 2017 | A1 |
20170310228 | Nakajima et al. | Oct 2017 | A1 |
20190229633 | Perreault | Jul 2019 | A1 |
Number | Date | Country |
---|---|---|
103141021 | Sep 2015 | CN |
105720824 | Jun 2016 | CN |
111091957 | May 2020 | CN |
0050432 | Apr 1982 | EP |
0302162 | Feb 1989 | EP |
2445677 | Jul 2008 | GB |
4149915 | Jul 2008 | JP |
I220994 | Sep 2004 | TW |
202017297 | May 2020 | TW |
2013107782 | Jul 2013 | WO |
2018160962 | Sep 2018 | WO |
Entry |
---|
“European Application Serial No. 19202178.0, Extended European Search Report dated Apr. 6, 2020”, 11 pgs. |
“Korean Application Serial No. 10-2019-0132039, Office Action dated Jan. 11, 2021”, w/ English Translation, 18 pgs. |
“European Application Serial No. 19202178.0, Communication Pursuant to Article 94(3) EPC dated Nov. 23, 2020”, 6 pgs. |
“European Application Serial No. 19202178.0, Response filed Mar. 17, 2021 to Communication Pursuant to Article 94(3) EPC dated Nov. 23, 2020”, 12 pgs. |
“European Application Serial No. 19202178.0, Response filed Oct. 23, 2020 to Extended European Search Report dated Apr. 6, 2020”, 18 pgs. |
“Korean Application Serial No. 10-2019-0132039, Response filed Mar. 10, 2021 to Office Action dated Jan. 11, 2021”, w/ English claims, 22 pgs. |
“International Application Serial No. PCT/EP2021/059499, International Search Report dated Jul. 30, 2021”, 5 pgs. |
“International Application Serial No. PCT/EP2021/059499, Written Opinion dated Jul. 30, 2021”, 10 pgs. |
Number | Date | Country | |
---|---|---|---|
20200135390 A1 | Apr 2020 | US |