SEMICONDUCTOR APPARATUS

Abstract

A semiconductor apparatus is equipped with an internal circuit (201) including a semiconductor element (202)(203) and a protection circuit (101) including a semiconductor (102)(103) for protecting the internal circuit (201) against damage from electrostatic discharge (ESD). The semiconductor elements (102)(103) (202)(203) constituting the internal circuit (201) and the protection circuit (101) include an impurity diffusion region (7)(8) connected by an eternal terminal and a guard band region (6)(5) formed near the impurity diffusion region (7)(8), respectively. A shortest distance (102L)(103L) between the impurity diffusion region (7)(8) and the guard band region (6)(5) in the semiconductor element (102)(103) of the protection circuit (101) is set to be shorter than a shortest distance (202L)(203L) between the impurity diffusion region (7)(8) and the guard band region (6)(5) in the semiconductor element (202)(203) of the internal circuit (201).

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The preferred embodiments of the present invention are shown by way of example, and not limitation, in the accompanying figures, in which:

FIG. 1 is a typical example of a semiconductor integrated circuit equipped with an internal circuit and a protection circuit for protecting the internal circuit against damage from electrostatic discharge (ESD);

FIG. 2A is a schematic explanatory view showing structures of a p-type protection element and an n-type protection element constituting the protection circuit shown in FIG. 1;

FIG. 2B is a schematic explanatory view showing structures of a p-type internal circuit element and an n-type internal circuit element constituting the internal circuit shown in FIG. 1;

FIG. 3A is a partial schematic cross-sectional view taken along the line X101-X101 in FIG. 2;

FIG. 3B is a partial schematic cross-sectional view taken along the line X201-X201 in FIG. 2B;

FIG. 4A is a partial schematic cross-sectional view taken along the line Y103-Y103 in FIG. 2A;

FIG. 4B is a partial schematic cross-sectional view taken along the line Y203-Y203 in FIG. 2B;

FIG. 5A is a partial schematic cross-sectional view taken along the line Y102-Y202 in FIG. 2A;

FIG. 5B is a partial schematic cross-sectional view taken along the line Y202-202 in FIG. 2A;

FIG. 6 is a schematic explanatory view showing another embodiment of the present invention;

FIG. 7 is a schematic explanatory view showing still another embodiment of the present invention.

Claims

1. A semiconductor apparatus equipped with an internal circuit including a semiconductor element and a protection circuit including a semiconductor element for protecting the internal circuit against damage from electrostatic discharge (ESD), wherein the semiconductor element constituting the internal circuit includes an impurity diffusion region formed at a surface portion of a substrate of semiconductor material and connected by an external terminal and a guard band region formed near the impurity diffusion region,wherein the semiconductor element constituting the protection circuit includes an impurity diffusion region formed at a surface portion of a substrate of semiconductor material and connected by an external terminal and a guard band region formed near the impurity diffusion region, andwherein a shortest distance between the impurity diffusion region and the guard band region in the semiconductor element of the protection circuit is set to be shorter than a shortest distance between the impurity diffusion region and the guard band region in the semiconductor element of the internal circuit.

2. The semiconductor apparatus as recited in claim 1, wherein the semiconductor element is a MOS transistor, and wherein the impurity diffusion region of the semiconductor is a drain region.

3. The semiconductor apparatus as recited in claim 2, wherein the guard band region is formed along at least a part of the drain region.

4. The semiconductor apparatus as recited in claim 2, wherein the guard band region is formed so as to fully surround the drain region.

5. The semiconductor apparatus as recited in claim 4, wherein the guard band region is formed into a rectangular shape fully surrounding the drain region.

6. The semiconductor apparatus as recited in claim 1, wherein the semiconductor element constituting the internal circuit has a source region, a drain region and a guard band region surrounding the source region and the drain region,wherein the semiconductor element constituting the protection circuit has a source region, a drain region and a guard band region surrounding the source region and the drain region,wherein a distance between the source region and the guard band region of the semiconductor constituting the internal circuit and a distance between the source region and the guard band region of the semiconductor constituting the protection circuit are set to be identical or substantially identical, andwherein the shortest distance between the drain region and the guard band region in the semiconductor element of the protection circuit is set to be shorter than the shortest distance between the drain region and the guard band region in the semiconductor element of the internal circuit.

7. The semiconductor apparatus as recited in claim 1, wherein the protection circuit is a CMOS type circuit including a first conductive type MOS transistor and a second conductive type MOS transistor.

8. The semiconductor apparatus as recited in claim 7, wherein a source region, the guard band region and a gate electrode of the first conductive type MOS transistor are connected to a ground terminal, and wherein a source region, the guard band region and a gate electrode of the second conductive type MOS transistor are connected to a power source terminal.

9. The semiconductor apparatus as recited in claim 1, wherein the external terminal is one of an input terminal, an output terminal, an input/output terminal and a power source terminal.