The present application claims priority from Japanese Patent Application No. 2019-225767 filed on Dec. 13, 2019, the content of which is hereby incorporated by reference into this application.
The present invention relates to a semiconductor device provided with a diode and its manufacturing method, particularly, to an effective technique appliable to a diode configured by using gallium oxide (Ga2O3) as a semiconductor material.
As a semiconductor material having a wide band gap, in a device using gallium oxide (Ga2O3) as a semiconductor material, a Ga2O3 substrate can be manufactured by an EFG (Edge-defined Film-fed Growth) method, which has results of mass production of sapphire substrates. Since the Ga2O3 substrate has a breakdown field strength three times larger than that of a silicon carbide substrate, the Ga2O3 substrate is expected to have the same or higher performance at a lower cost than the silicon carbide substrate, which brings active research and development.
Since on-resistance that is an important performance index of the diode is determined by resistance of a drift layer, use of properties of the drift layer equal to or more than ten times a breakdown field strength of silicon (0.5 MV/cm) brings a reduction in resistance due to an increase in a concentration of the drift layer (e.g., a concentration of 1×1016 cm−3 to 1×1017 cm−3) (see FIG. 2 in Non-Patent Document 1 (K. Konishi et al., Appl. Phys. Lett. 110, 103506 (2017))). In this state, a withstand voltage in a reverse direction is determined, unlike a silicon device, not by dielectric breakdown due to an electric field but by an increase in a leakage current due to a tunnel current (see FIG. 3 in Non-Patent Document 1). Since a p-type layer cannot be formed with gallium oxide (Ga2O3) in order to suppress the tunnel current, a gate material having a large barrier height and a process as shown in FIG. 4 of Non-Patent Document 1 have been used as one of some solutions. A metal material such as platinum (Pt), gold (Au), or nickel (Ni) having a large barrier height is used as an anode electrode, and an attempt of a heterojunction to a dissimilar oxide semiconductor (e.g., nickel oxide (NiO)) with p-type properties has also been reported (see FIGS. 6 and 7 in Non-Patent Document 2 (Y. Kokubun et al., Appl. Phys. Express 9, 091101 (2016))).
As a result of examining improvement of characteristics of a diode configured by using gallium oxide (Ga2O3) as a semiconductor material, the inventors of the present application have found the following concerns.
Pt and Au, which are noble metals each having a large work function and a barrier height of 1.0 to 1.5 eV, are effective in reducing a reverse current of a gate, but their adhesive forces are small (weak) since they do not react with gallium oxide (Ga2O3). Consequently, when a wiring wire (s) is bonded to an anode electrode, a concern about the anode electrode being peeled off the wiring wire may occur. Therefore, a concern arises about a yield decreasing in assembling a package(s) for sealing the diode or in mounting a device(s).
Further, in order to improve the adhesion properties of the anode electrode, when a heat treatment is applied by using a metal (e.g., titanium (Ti)) capable of forming a reaction layer at an interface between the anode electrode and gallium oxide (Ga2O3), a reaction layer of titanium oxide (TiO) is formed at (on) the interface, which brings occurrence of oxygen deficiency on a gallium oxide (Ga2O3) side. Although the adhesion properties are improved, the oxygen deficiency has a property of a donor, so that a concern arises about a high-concentration n-type donor layer being formed at the interface and a leakage current being increased in addition to a small barrier height of titanium (Ti).
Other problems and new features will be apparent from descriptions of this specification and the drawings.
A semiconductor device according to an embodiment includes: a gallium oxide substrate having an n-type gallium oxide drift layer; an anode electrode formed over a front surface of the n-type gallium oxide drift layer and made of a metal film; a cathode electrode formed over a rear surface of the gallium oxide substrate; and a reaction layer formed between the anode electrode and the n-type gallium oxide drift layer and made of a metal oxide film indicating p-type conductivity.
The reaction layer is set to have: a thickness of 5 nm or more which suppresses a tunnel current; and a thickness of 50 nm or less which suppresses, up to 10% or less, an increase in resistance values during forward energization.
Further, a manufacturing method of a semiconductor device according to an embodiment includes the steps of: preparing a gallium oxide substrate having an n-type gallium oxide drift layer; forming a metal film (Ni, Cu, CuAl, ZnRh) as a material of an anode electrode over the gallium oxide substrate; and forming a reaction layer between the metal anode electrode and the n-type gallium oxide drift layer by performing a heat treatment to the gallium oxide substrate after forming the metal film, the reaction layer being made of a metal oxide film with p-type conductivity.
The semiconductor device according to the embodiment makes it possible to improve a yield at times of package assembly and device mounting in order that the adhesion properties of the anode electrodes is improved by the reaction layer made of a metal oxide film. In addition, since the reaction layer indicates a p-type, a barrier layer becomes thicker and a gate leakage current due to a tunnel phenomenon is reduced, which brings realization of a higher withstand voltage. Further, setting the thickness of the reaction layer to a predetermined thickness makes it possible to suppress an increase in resistance values during the forward energization.
A semiconductor device according to an embodiment will be described in detail with reference to the drawings. Incidentally, in the specification and drawings, the same constituent elements or corresponding constituent elements are denoted by the same reference numerals, and duplicate descriptions will be omitted. In addition, at least a part of the embodiment and a part of each modification example may be arbitrarily combined with each other. Incidentally, in each sectional view, diagonal lines indicating that each region therein is not hollow may be omitted in order to make the drawings easier to see. When indicating the hollow, the specification will set forth such an indication separately.
Each of the symbols “−” and “+” represents a relative concentration of each impurity whose conductive type is an n-type or p-type. For example, in a case of then-type impurity, an impurity concentration increases in order of “n−−”, “n−”, “n”, “n+”, and “n++”.
As shown in
Incidentally, an A-A cross-section of
Next, a manufacturing method of the gallium oxide diode according to the first embodiment shown in
First, as shown in
In addition, n-type impurities whose concentration has relatively high are introduced into the substrate 10. For example, tin (Sb) is used as a suitable material for these n-type impurities, and an impurity concentration of the substrate 10 is, for example, 5×1018 cm−3.
Next, as shown in
Next, as shown in
Further, the anode electrode 50 can be formed by a lift-off method using a resist pattern as a base having a thickness of about 2 μm after forming the nickel (Ni) film on the entire surface of the insulating film 40 including the opening OP1 by vapor deposition.
Next, under a state where the anode electrode is formed, the substrate 10 is subjected to a heat treatment at 500° C. for 30 minutes in a nitrogen (N2) atmosphere and, as shown in
Next, the rear surface of the substrate 10 is sequentially subjected to grinding, polishing, and CMP (Chemical Mechanical Polishing) steps, and the thickness of the substrate 10 is thereby reduced, for example, from an initial thickness of 650 μm to a thickness of 200 μm.
Next, as shown in
In order to explain a main effect of the gallium oxide diode according to the first embodiment, calculated values of the reverse voltage dependence of the leakage current in the diode are shown in
For example, in a diode in which the drift layer 20 formed of an epitaxial layer of gallium oxide has an impurity concentration of 1×1016 cm−3 and a thickness of 10 μm and the anode electrode 50 has a barrier height of 1.1 eV, if a guideline of the withstand voltage is set to a leak current density of 1×10−4 A/cm2 standardized by a diode area, a conventional diode has a withstand voltage of about 750 V due to an influence of the tunnel current as shown by a dotted line B, whereas the diode of the first embodiment in which the reaction layer 60 having a thickness of about 50 nm is formed has a withstand voltage improved up to 1000 V or more as shown by a solid line A.
On the contrary, if the withstand voltages are about the same, the diode of the first embodiment has a smaller leakage current. Further, the increase in the resistance value in the forward direction causes a current to flow through the diode when a forward voltage is applied to the anode electrode 50 (also referred to as a gate). When a p-type NiGaO reaction layer is formed at the interface between the anode electrode 50 and the drift layer 20, electrons are injected into the reaction layer 60 from the drift layer 20 formed of n-type Ga2O3 during the energization to generate a current. However, its electron concentration is low, so that a resistance R becomes high in value and a loss (R×I2) during the energization of the diode increases.
However, as shown by the calculated values in
Further, forming the reaction layer 60 at the interface between the anode electrode 50 and the drift layer makes it possible to prevent the anode electrode from peeling off when a wire bonding wiring(s) is formed on the anode electrode 50 and to improve a yield of the semiconductor device. Therefore, according to a diode structure and a diode manufacturing method of the first embodiment, a diode reducing a reverse-direction leakage current, hiving a high withstand voltage, and suppressing an increase in on-resistance can be manufactured with a good yield
As shown in
Even when zirconium (Zr), yttrium (Y), or hafnium (Hf) other than aluminum is used as the electrode material of the anode electrode 70, the same effect as that of the first embodiment can be obtained. In this case, each material of metal oxide configuring the reaction layer 80 is ZrGaO2, YGaO, or HfGaO.
Adrift layer 90 made of n-type Ga2O3 is formed on a substrate 10 made of n+-type Ga2O3 by an epitaxial growth method; a cathode electrode 30 is formed on the rear surface of the substrate 10; stripe-shaped trenches TR are periodically formed on the main surface of the drift layer 90 opposite to the rear surface of the substrate 10; and an anode electrode 100 made of nickel (Ni) is formed so as to embed the trenches TR.
At an interface between a bottom surface BS and a side surface SS of the trench TR, a reaction layer 110 made of, for example, NiGaO is formed. Further, gallium oxide and a constituent material (Ni) of the unreacted anode electrode 100 directly contact with each other on an upper surface US of the drift layer 90 periodically existing between the trenches TR.
As in the first embodiment, the second embodiment has a feature in which the electrode material used for the anode electrode 100 is thermally oxidized to form a reaction layer 110 made of an oxide semiconductor (NiGaO) with p-type conductivity at an interface between the anode electrode 100 and the drift layer 90. Further, as in the first embodiment, a metal film such as copper (Cu) or a copper-aluminum alloy (CuAl) can be used as a constituent material of the anode electrode. The electrode material of the anode electrode 100 is not limited to the above, and the metal (Zr, Al, Y, Hf) used in the first modification example can also be used.
Next, a manufacturing method of the gallium oxide diode of the second embodiment will be described with reference to
First, as in the first embodiment, as shown in
Next, hard masks HM1 made of a patterned insulating film are formed on the upper surface of the drift layer 90. In order to form stripe-shaped trenches and mesa patterns in the drift layer 90, the hard masks HM1 are patterned so as to have rectangular stripe shapes each of which has a line width of 1.0 mm and the number of repetitions of 200, for example, as a line and space having an opening size of 3.0 μm and a width of 2.0 μm.
The hard mask HM1 is formed of, for example, a silicon oxide film, a silicon nitride film, or a laminated film thereof. A suitable example of the hard mask HM1 is, for example, a TEOS (Tetra Ethyl Ortho Silicate) film. The hard masks HM1 can be formed by using a CVD method to deposit the TEOS film on the upper surface of the drift layer 90 up to a thickness of about 2.0 μm and then by using a photolithography technique and an etching method to pattern the TEOS film.
Next, as shown in
Next, as shown in
Next, as shown in
Next, as shown in
Next, as shown in
Next, the rear surface of the substrate 10 is sequentially subjected to grinding, polishing, and CMP steps to thin the substrate 10 from, for example, an initial thickness of 650 μm to a thickness of 200 μm. Next, as shown in
In the second embodiment, when a high voltage in a reverse direction is applied to the gallium oxide diode, the upper surface US (upper surface of the mesa pattern) of the drift layer 90 is electrically shielded by a Ga2O3/NiGaO/Ni junction formed on the bottom surface BS and side surface SS of the trench whose leakage current due to the tunnel current is small (weak), so that an electric field strength about the upper surface of the mesa pattern can be reduced (weakened). When an electric field strength near a Ga2O3/Ni junction on the upper surface of the mesa pattern becomes small, a thickness of a Schottky barrier layer becomes thick (large) and the leakage current due to the tunnel current can be reduced.
Therefore, if the structure of the second embodiment is used, the resistance during the forward energization is low in value and use of the Ga2O3/Ni junction becomes possible and the trade-off between the on-resistance and the withstand voltage is further improved.
As described above, the invention made by the present inventors has been specifically explained based on the embodiments. However, the present invention is not limited to the above embodiments, and can be variously modified within a range of not departing from the gist thereof.
For example, as the reaction layers 60, 110, the p-type oxide semiconductor layers have been used, but n-type oxide semiconductor layers having a low concentration may be used.
Number | Date | Country | Kind |
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2019-225767 | Dec 2019 | JP | national |