Semiconductor device and method for fabricating the same

Information

  • Patent Application
  • 20070173025
  • Publication Number
    20070173025
  • Date Filed
    October 02, 2006
    18 years ago
  • Date Published
    July 26, 2007
    17 years ago
Abstract
First and second gate portions each made of a gate insulating film, a silicon film, and a protective film are formed on a semiconductor substrate. Then, a first sidewall insulating film is formed on each of the side surfaces of the first and second gate portions. Subsequently, the protective film is removed such that the silicon film is exposed. A thermal process is performed with respect to a Ni film deposited on the silicon film to convert the silicon film to a NiSi film and then an insulating film is formed on the NiSi film. Thereafter, a Ni film is deposited on the NiSi film and a thermal process is performed to convert the NiSi film to a Ni3Si film.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIGS. 1A to 3C are step cross-sectional views schematically illustrating a method for fabricating a complementary MIS transistor according to a first embodiment of the present invention;



FIG. 4 is a cross-sectional view showing a complementary MIS transistor according to a variation of the first embodiment;



FIGS. 5A to 6C are step cross-sectional views schematically illustrating a method for fabricating a complementary semiconductor device according to a second embodiment of the present invention;



FIG. 7 is a cross-sectional view showing a complementary MIS transistor according to a variation of the second embodiment;



FIGS. 8A and 8B are step cross-sectional views illustrating a method for fabricating a conventional complementary MIS transistor; and



FIGS. 9A to 9D are cross-sectional views illustrating a method for fabricating another conventional complementary MIS transistor.


Claims
  • 1. A semiconductor device comprising a first MIS transistor and a second MIS transistor, wherein the first MIS transistor comprises:a first gate portion having a first gate insulating film formed on a semiconductor substrate and a first gate electrode made of a first metal silicide film formed on the first gate insulating film;a first sidewall insulating film formed on each of side surfaces of the first gate portion; andan insulating film formed on the semiconductor substrate in lateral relation to the first sidewall insulating film andthe second MIS transistor comprises:a second gate portion having a second gate insulating film formed on the semiconductor substrate and a second gate electrode made of a second metal silicide film formed on the second gate insulating film;a second sidewall insulating film formed on each of side surfaces of the second gate portion; andthe insulating film formed on the semiconductor substrate in lateral relation to the second sidewall insulating film, whereinrespective upper surfaces of the first and second gate portions are planarized to be flush with an upper surface of the insulating film.
  • 2. The semiconductor device of claim 1, wherein the first gate portion is made of the first gate insulating film, the first gate electrode, a protective insulating film formed on the first gate electrode, and a metal film formed on the protective insulating film.
  • 3. The semiconductor device of claim 2, wherein the second gate portion is made of the second gate insulating film, the second gate electrode, and a third sidewall insulating film formed on an upper portion of each of inner side surfaces of the second sidewall insulating film.
  • 4. The semiconductor device of claim 2, wherein the second gate portion further comprises the metal film formed on the second metal silicide film.
  • 5. The semiconductor device of claim 1, wherein an upper surface of the first metal silicide film is lower in level than an upper surface of the second metal silicide film.
  • 6. The semiconductor device of claim 1, wherein the first gate portion is made of the first gate insulating film and the first gate electrode andthe second gate portion is made of the second gate insulating film and the second metal silicide film.
  • 7. The semiconductor device of claim 1, wherein the first gate portion is made of the first gate insulating film and the first gate electrode andthe second gate portion is made of the second gate insulating film, the second metal silicide film, and a metal film formed on the second metal silicide film.
  • 8. The semiconductor device of claim 1, wherein the second metal silicide film is metal-richer than the first metal silicide film.
  • 9. The semiconductor device of claim 1, wherein the first meal silicide film is made of NiSi or Ni2Si and the second metal silicide film is made of Ni3Si.
  • 10. The semiconductor device of claim 1, wherein the first MIS transistor is an N-type MIS transistor andthe second MIS transistor is a P-type MIS transistor.
  • 11. A method for fabricating a semiconductor device comprising a first MIS transistor having a first gate portion and a second MIS transistor having a second gate portion, the method comprising the steps of: (a) forming, on a semiconductor substrate, the first gate portion made of a first gate insulating film, a first silicon film, and a first protective film and the second gate portion made of a second gate insulating film, a second silicon film, and a second protective film;(b) forming a first sidewall insulating film on each of side surfaces of the first gate portion and forming a second sidewall insulating film on each of side surfaces of the second gate portion;(c) after the step (b), forming an insulating film on the semiconductor substrate and then planarizing the insulating film to expose respective upper surfaces of the first and second protective films;(d) after the step (c), selectively removing the first and second protective films from the first and second gate portions;(e) after the step (d), siliciding the entire first silicon film to form a first metal silicide film;(f) after the step (d), siliciding the entire second silicon film to form a second metal silicide film; and(g) after the steps (e) and (f), planarizing respective upper surfaces of the first and second gate portions such that they are flush with an upper surface of the insulating film, whereinthe first gate portion of the first MIS transistor has the first gate insulating film and a first gate electrode made of the first metal silicide film andthe second gate portion of the second MIS transistor has the second gate insulating film and a second gate electrode made of the second metal silicide film.
  • 12. The method of claim 11, wherein the step (e) includes the step of siliciding the entire second silicon film to form a metal silicide film, while simultaneously forming the first metal silicide film, each through silicidation using a first metal film, the method further comprising the step of:(h) after the step (e) and before the step (f), forming a protective insulating film covering an upper surface of the first metal silicide film, whereinthe step (f) includes the step of converting the metal silicide film to the second metal silicide film through silicidation using a second metal film,the step (g) includes the step of performing planarization by polishing away the portion of the second metal film which is located on the insulating film and thereby locally leaving the second metal film on the protective insulating film,the first gate portion of the first MIS transistor is made of the first gate insulating film, the first gate electrode, the protective insulating film formed on the first gate electrode, and the second metal film formed on the protective insulating film, andthe second gate portion of the second MIS transistor is made of the second gate insulating film and the second gate electrode.
  • 13. The method of claim 12, wherein the step (g) includes the step of polishing away the portion of the second metal film which is located on the insulating film and thereby locally leaving the second metal film on the second metal silicide film, andthe second gate portion of the second MIS transistor is made of the second gate insulating film, the second gate electrode, and the second metal film.
  • 14. The method of claim 11, further comprising the steps of: (i) before the step (a), forming a gate insulating film on the semiconductor substrate;(j) forming, on the gate insulating film, a first silicon forming film having a first thickness and a second silicon forming film having a second thickness smaller than the first thickness; and(k) forming a protective film having a planarized surface over the first and second silicon forming films, whereinthe step (a) includes the step of patterning the protective film, the first and second silicon forming films, and the gate insulating film to form the first and second protective films each made of the protective film, the first silicon film made of the first silicon forming film, the second silicon film made of the second silicon forming film, and the first and second gate insulating films each made of the gate insulating film,the steps (e) and (f) include the step of performing silicidation by using a metal film to simultaneously form the first and second metal silicide films, andthe step (g) includes performing planarization by polishing away the portion of the metal film which is located on the insulating film.
  • 15. The method of claim 14, wherein the step (g) includes the step of polishing away the portion of the metal film which is located on the insulating film and thereby leaving the metal film on the second metal silicide film andthe second gate portion of the second MIS transistor is made of the second gate insulating film, the second gate electrode, and the metal film.
  • 16. The method of claim 11, wherein the second metal silicide film is metal-richer than the first metal silicide film.
  • 17. The method of claim 16, wherein the first meal silicide film is made of NiSi or Ni2Si and the second metal silicide film is made of Ni3Si.
  • 18. The method of claim 11, wherein the first MIS transistor is an N-type MIS transistor andthe second MIS transistor is a P-type MIS transistor.
Priority Claims (1)
Number Date Country Kind
JP 2006-016217 Jan 2006 JP national