The present invention relates to a semiconductor device using insulated gate bipolar transistors (hereinafter referred to as IGBTs) and to a plasma display driving semiconductor integrated circuit device using the IGBT semiconductor device.
An electrostatic breakdown of a semiconductor integrated circuit is caused by localized heating and electric field concentrations that occur when a discharge current from an electrostatic discharge (ESD) flows through the semiconductor device. With semiconductor devices being increasingly miniaturized in a higher density as their fabrication technology advances, the semiconductor devices in recent years tend to have a reduced capability to withstand ESD, making a problem of how to deal with the ESD an important issue. In high voltage power ICs using a SOI substrate, in particular, its structure in which an oxide layer (insulating film) with a low thermal conductivity surrounds the device causes a temperature increase from heating to be greater than when the device is formed on a Si substrate, giving rise to a possibility of having to take special considerations for the degraded ESD withstand capability.
One of conventional measures that have been taken against the ESD in semiconductor integrated circuits involves putting an ESD protective circuit between a high-voltage supply wire and a ground wire in parallel with a circuit being protected, to discharge ESD surges applied to external terminals. This method generally uses a diode or MOS transistor as a standard protective circuit device.
However, the conventional ESD protective circuit has some problems. For example, if devices of standard structure commonly used in circuits to be protected, such as output circuits, are installed in the ESD protective circuit, a high ESD withstand capability cannot be obtained. Another problem is that to improve the ESD withstand capability requires a special device design for the ESD.
To solve the above problems, in a semiconductor device having an electrostatic surge protective circuit formed between a first power supply wire and a ground wire, the present invention is characterized in that the protective circuit has an insulated gate bipolar transistor connected between a potential of the first power supply wire and a potential of the ground wire and that a latch-up initiation voltage of the insulated gate bipolar transistor is lower than a breakdown voltage of a semiconductor device connected to the first power supply wire and the output terminal.
Further, to solve the above problem, in a semiconductor device having an electrostatic surge protective circuit formed between a first power supply wire and a ground wire, the present invention comprises: an output circuit having an insulated gate bipolar transistor between the first power supply wire and an output terminal or between an output terminal and the ground wire; and an insulated gate bipolar transistor between a potential of the first power supply wire and a potential of the ground wire; wherein a latch-up initiation voltage of the insulated gate bipolar transistor of the protective circuit is lower than that of the insulated gate bipolar transistor of the output circuit.
Further, in the semiconductor device, the present invention is characterized in that the insulated gate bipolar transistor in the protective circuit has a lower impurity density in a first conduction type region provided to prevent a latch-up operation than that in a first conduction type region provided to prevent a latch-up operation of the insulated gate bipolar transistor in the output circuit.
Further, in the semiconductor device, the present invention is characterized in that a means is provided between a gate terminal of the insulated gate bipolar transistor in the protective circuit and the ground wire so that, when applied a voltage, it reduces impedance between the gate terminal and the ground wire.
Further, to solve the above problems, in a semiconductor device having an electrostatic surge protective circuit formed between a potential of a first power supply wire and a potential of a ground wire, the present invention comprises: an output circuit having an insulated gate bipolar transistor formed on a semiconductor substrate between the first power supply wire and an output terminal or between an output terminal and the ground wire; and an insulated gate bipolar transistor formed on the semiconductor substrate between a potential of the first power supply wire and a potential of the ground wire; wherein a latch-up initiation voltage of the insulated gate bipolar transistor of the protective circuit is lower than that of the insulated gate bipolar transistor of the output circuit.
Further, in the semiconductor device, the present invention is characterized in that the insulated gate bipolar transistor in the protective circuit has a lower impurity density in a first conduction type region provided to prevent a latch-up operation than that in a first conduction type region provided to prevent a latch-up operation of the insulated gate bipolar transistor in the output circuit.
Further, in the semiconductor device, the present invention is characterized in that the insulated gate bipolar transistor in the protective circuit and the insulated gate bipolar transistor in the output circuit are formed on the same semiconductor substrate.
Further, this invention uses the above-mentioned semiconductor as a plasma display driving semiconductor device.
The ESD protective circuit of this invention offers an improved ESD withstand capability by the use of the IGBT latch-up operation and also a size reduction. The ESD protective circuit can also eliminate an ESD-dedicated design. Further, with the use of an IGBT for low-voltage system (logic system), the ESD protective circuit is also applicable to a low-voltage ESD circuit.
Other objects, features and advantages of the invention will become apparent from the following description of the embodiments of the invention taken in conjunction with the accompanying drawings.
Embodiments of this invention will be described in the following using the accompanying drawings.
It is seen from the current-voltage graph of
The plasma display driving semiconductor integrated circuit device 123 has an ESD protective circuit 124, a shift register circuit 125, a latch circuit 126, a selector 127 and an output stage circuit 128. The shift register circuit 125 shifts a control signal entered from the terminal DATA in synchronism with a clock signal supplied to the terminal CLK. By a combination of terminals OC1 and OC2 connected to the selector 127, all output terminals are set to a high-voltage VH level, a GND voltage level, a high-impedance state, or a data-output-from-latch state. The output stage circuit 128 has IGBTs totem pole-connected between the high-voltage power supply and the ground, with a connecting point of the IGBTs taken out as an output terminal HVO. Depending on the state of OC1 and OC2, the IGBTs are turned on or off to set the output terminal HVO to a high potential VH, a GND potential or a high-impedance state.
The ESD protective circuit 124 has a construction of
This invention can be applied to an ESD protective circuit using lateral type insulated gate bipolar transistors (IGBTs) formed on an SOI substrate and also to a plasma display driving semiconductor integrated circuit.
It should be further understood by those skilled in the art that although the foregoing description has been made on embodiments of the invention, the invention is not limited thereto and various changes and modifications may be made without departing from the spirit of the invention and the scope of the appended claims.
Number | Date | Country | Kind |
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2009-047490 | Mar 2009 | JP | national |