Semiconductor device having IGBT element

Abstract

A semiconductor device having an insulated gate bipolar transistor (IGBT) is formed on a semiconductor substrate. Abase region and an emitter are formed on a first surface of the substrate while a collector layer is formed on second surface of the substrate. A region having a low breakdown voltage is formed on the first surface around the IGBT, and a carrier collecting region is formed in the vicinity of the region having the low breakdown voltage. The IGBT is prevented from being broken down due to an avalanche phenomenon, because the breakdown occurs in the region having the low breakdown voltage, and carriers of the breakdown current are collected through the carrier collecting region. The breakdown of the IGBT is further effectively prevented by forming a guard ring for suppressing electric field concentration around the region having the low breakdown voltage.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view showing a semiconductor device having an IGBT as a first embodiment of the present invention;

FIG. 2 is a plan view partially showing the semiconductor device shown in FIG. 1;

FIG. 3 is a cross-sectional view showing a semiconductor device having an IGBT as a second embodiment of the present invention;

FIG. 4 is a cross-sectional view showing a semiconductor device having an IGBT as a third embodiment of the present invention; and

FIG. 5 is a cross-sectional view showing a semiconductor device having an IGBT as a fourth embodiment of the present invention.

Claims

1. A semiconductor device comprising: a substrate, made of a first type semiconductor, having a first surface and a second surface; a base region, made of a second type semiconductor, formed on the first surface of the substrate;gate trenches formed through the base region to reach the substrate;a gate electrode filling the gate trenches, inner walls of the gate trenches being covered with a gate insulating film;an emitter region, made of the second type semiconductor, formed between gate trenches; andan IGBT element including an emitter electrode connected to the emitter region, a collector layer, made of the second type semiconductor, formed on the second surface of the substrate, and a collector electrode connected to the collector layer; wherein:a region having a low breakdown voltage is formed on the first surface of the substrate around the IGBT element; and a carrier collecting region, made of the second type semiconductor and connected to the emitter electrode, is formed in the vicinity of the region having the low breakdown voltage.

2. The semiconductor device as in claim 1, wherein: a field-stop layer is formed between the substrate and the collector layer.

3. The semiconductor device as in claim 2, wherein: an electric field concentration suppressing region is formed on the first surface of the substrate around the base region; andthe region having the low breakdown voltage is disposed between the electric field concentration suppressing region and a region where the IGBT element is formed.

4. The semiconductor device as in claim 3, wherein: the electric field concentration suppressing region is a guard ring made of a second type semiconductor.

5. The semiconductor device as in claim 4, wherein: the region having the low breakdown voltage is a dummy trench formed between the base region and the guard ring to surround the base region and electrically independent from the gate electrode; andat least either one of an inner peripheral portion of the guard ring or an outer peripheral portion of the base region functions as a carrier collecting region and is electrically connected to the emitter electrode.

6. The semiconductor device as in claim 5, wherein: the dummy trench is deeper than the gate trenches.

7. The semiconductor device as in claim 5, wherein: a radius of curvature at a bottom corner of the dummy trench is smaller than that of the grate trenches.

8. The semiconductor device as in claim 4, wherein: a carrier collecting region is formed between an inner peripheral portion of the guard ring and an outer peripheral portion of the base region; andthe carrier collecting region being shallower than the guard ring and the base region, and electrically connected to the emitter electrode.

9. The semiconductor device as in claim 4, wherein: a carrier collecting region is formed between the guard ring and the base region; andthe carrier collecting region being deeper than the guard ring and the base region, and electrically connected to the emitter electrode.

10. A semiconductor device comprising: a substrate, made of a first type semiconductor, having a first surface and a second surface; a base region, made of a second type semiconductor, formed on the first surface of the substrate;gate trenches formed through the base region to reach the substrate;a gate electrode filling the gate trenches, inner walls of the gate trenches being covered with a gate insulating film;an emitter region, made of the second type semiconductor, formed between gate trenches; andan IGBT element including an emitter electrode connected to the emitter region, a collector layer, made of the second type semiconductor, formed on the second surface of the substrate, anda collector electrode connected to the collector layer; wherein: a Zener diode, having a breakdown voltage lower than that of the IGBT element, is disposed between the collector electrode and the emitter electrode.

11. The semiconductor device as in claim 10, wherein: the Zener diode is formed as part of wiring formed on the substrate.

12. The semiconductor device as in claim 10, wherein: a field-stop layer is formed between the substrate and the collector layer.

13. The semiconductor device as in claim 12, wherein: an electric field concentration suppressing region is formed on the first surface of the substrate around the base region.

14. The semiconductor device as in claim 13, wherein: the electric field concentration suppressing region is a guard ring made of a second type semiconductor.

15. The semiconductor device as in claim 1, wherein: the first type semiconductor is an N-type semiconductor and the second type semiconductor is a P-type semiconductor.