Claims
- 1. A semiconductor device comprising:
- an integrated circuit formed on a first conduction-type semiconductor substrate, the semiconductor substrate having a voltage supplied thereto;
- an output buffer circuit for outputting a signal obtained from said integrated circuit;
- a protection circuit for protecting said output buffer circuit; and
- said output buffer circuit having buffer MOSFETs;
- said protection circuit having protection MOSFETs, including impurity diffusion layers, for preventing electrostatic breakdown of said buffer MOSFETs; and
- said buffer MOSFETs having impurity diffusion layers separated from said impurity diffusion layers of said protection MOSFETs by an interposed field oxide film;
- wherein each of said impurity diffusion layers of said buffer MOSFETs is separated from one of said impurity diffusion layers of said protection MOSFETs by at least 5 .mu.m.
- 2. A semiconductor device comprising
- an integrated circuit formed on a first conduction type semiconductor substrate;
- an output buffer circuit for outputting a signal obtained from said integrated circuit;
- a protection circuit for protecting said output buffer circuit; and
- a voltage supply circuit for supplying a voltage to said semiconductor substrate;
- said output buffer circuit having buffer MOSFETs;
- said protection circuit having protection MOSFETs, including impurity diffusion layers, for preventing electrostatic breakdown of said buffer MOSFETs;
- said buffer MOSFETs having impurity diffusion layers spaced from said impurity diffusion layers of said protection MOSFETs, each of the diffusion layers of the buffer MOSFETs is spaced from one of the diffusion layers of the protection MOSFETs by respective predetermined spacings, and a field oxide film interposed between said buffer MOSFETs and said protection MOSFETs;
- wherein each of said protection MOSFETs has an offset gate structure which has a gate electrode of the protection MOSFET closer to one of said impurity diffusion layers of the protection MOSFET than to another of said impurity diffusion layers.
- 3. A semiconductor device according to claim 1, wherein said semiconductor device includes an output terminal and a ground terminal, and wherein said buffer MOSFETs and said protection MOSFETs are respectively operatively coupled in parallel between said output terminal of said semiconductor device and said ground terminal thereof.
- 4. A semiconductor device according to claim 1, wherein said semiconductor device includes an output terminal and a power source terminal, and wherein said buffer MOSFETs and said protection MOSFETs are respectively operatively coupled in parallel between said output terminal of said semiconductor device and said power source terminal thereof.
- 5. A semiconductor device according to claim 1, wherein the smallest of said predetermined spacings is at least 5 .mu.m.
- 6. A semiconductor device according to claim 1, wherein each of said buffer MOSFETs has a lightly doped drain (LDD) structure.
- 7. A semiconductor device according to claim 1, wherein the impurity diffusion layers of said protection MOSFETs are surrounded in a plane by a second conduction-type guard ring.
- 8. A semiconductor device comprising:
- an integrated circuit formed on a first conduction-type semiconductor substrate;
- an output buffer circuit for outputting a signal obtained from said integrated circuit;
- a protection circuit for protecting said output buffer circuit; and
- a voltage supply circuit for supplying a voltage to said semiconductor substrate;
- said output buffer circuit having buffer MOSFETs;
- said protection circuit having protection MOSFETs, including impurity diffusion layers, for preventing electrostatic breakdown of said buffer MOSFETs;
- said buffer MOSFETs having impurity diffusion layers spaced from said impurity diffusion layers of said protection MOSFETs, each of the diffusion layers of the buffer MOSFETs is spaced from one of the diffusion layers of the protection MOSFETs by predetermined spacings, and a field oxide film interposed between said buffer MOSFETs and said protection MOSFETS, a length of said field oxide film being at least one of the predetermined spacings;
- wherein said impurity diffusion layers of said protection MOSFETs each have bottom and side portions surrounded by a pn-junction; and
- wherein said pn-junction is formed by a second conduction-type first well and a first conduction-type second well, the first well being provided within the semiconductor substrate and the first conduction-type second well embedded in the second conduction-type first well.
- 9. A semiconductor device comprising:
- an integrated circuit formed on a first conduction-type semiconductor substrate, the semiconductor substrate having a voltage supplied thereto;
- an output buffer circuit for outputting a signal obtained from said integrated circuit;
- a protection circuit for protecting said output buffer circuit; and
- said output buffer circuit having buffer MOSFETS;
- said protection circuit having protection MOSFETS, including impurity diffusion layers, for preventing electrostatic breakdown of said buffer MOSFETs; and
- said buffer MOSFETs having impurity diffusion layers separated from said impurity diffusion layers of said protection MOSFETs by an interposed field oxide film;
- wherein each of said protection MOSFETs has an offset gate structure which has a gate electrode of the protection MOSFET closer to one of said impurity diffusion layers of the protection MOSFET than to another of said impurity diffusion layers of the protection MOSFET.
- 10. A semiconductor device comprising:
- an integrated circuit formed on a first conduction-type semiconductor substrate, the semiconductor substrate having a voltage supplied thereto;
- an output buffer circuit for outputting a signal obtained from said integrated circuit;
- a protection circuit for protecting said output buffer circuit; and
- said output buffer circuit having buffer MOSFETs;
- said protection circuit having protection MOSFETs, including impurity diffusion layers which each have bottom and side portions surrounded by a pn-junction, for preventing electrostatic breakdown of said buffer MOSFETs; and
- said buffer MOSFETs having impurity diffusion layers separated from said impurity diffusion layers of said protection MOSFETs by an interposed field oxide film;
- wherein said pn-junction is formed by a second conduction-type first well and a first conduction-type second well, the first well being provided within the semiconductor substrate and the first conduction-type second well being embedded in the second conduction-type first well.
Priority Claims (1)
Number |
Date |
Country |
Kind |
206967 |
Aug 1994 |
JPX |
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Parent Case Info
This is a continuation, of application Ser. No. 08/518,832 filed Aug. 24, 1995, now U.S. Pat. No. 5,739,571.
US Referenced Citations (3)
Non-Patent Literature Citations (1)
Entry |
"Improvement of `Soft Breakdown` Leakage of off-State nMOSFETs Induced by HBM ESD Events Using Drain Engineering for LLD Structure", by Ikuo Kurachi and Yasuhiro Fukuda, in IEICE Transactions, vol. E77-A, No. 1, Jan. 1994, pp. 166-173. |
Continuations (1)
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Number |
Date |
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Parent |
518832 |
Aug 1995 |
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