Claims
- 1. A semiconductor device including insulated gate field effect transistors, the semiconductor device comprising:a first insulated gate field effect transistor which constitutes a non-volatile memory element for a non-volatile memory and includes a first gate insulating film containing nitride atoms uniformly doped into the first gate insulating film from the top surface to the bottom surface thereof; and a second insulated gate field effect transistor which constitutes a logic element for a logic circuit and includes a second gate insulating film containing nitride atoms with a peak nitride atom density at least at the surface of the second gate insulating film, the peak nitride atom density being lower than a density of nitride atoms in the first insulating gate film, and the second insulated gate field effect transistor being provided on the same substrate together with the first insulated gate field effect transistor.
- 2. The semiconductor device according to claim 1, wherein the first and second gate insulating films are oxynitride films.
- 3. The semiconductor device according to claim 2, wherein the first gate insulating film is a tunnel insulating film.
- 4. The semiconductor device according to claim 1, wherein the first gate insulating film is a tunnel insulating film.
- 5. The semiconductor device according to claim 1, wherein the logic element is a p-channel type insulated gate field effect transistor.
- 6. The semiconductor device according to claim 1, wherein the nitride atom density of the first gate insulating film of the first insulated gate field effect transistor is 5% or more, and the peak nitride atom density of the second gate insulating film of the second insulated gate field effect transistor is less than 5%.
Priority Claims (1)
Number |
Date |
Country |
Kind |
P11-67369 |
Mar 1999 |
JP |
|
Parent Case Info
This a division of application Ser. No. 09/552,592, now U.S. Pat. No. 6,417,051, filed Mar. 10, 2000 which is incorporated in its entirety herein by reference.
US Referenced Citations (7)
Foreign Referenced Citations (3)
Number |
Date |
Country |
6-224442 |
Aug 1994 |
JP |
7-283323 |
Oct 1995 |
JP |
10-4145 |
Jan 1998 |
JP |
Non-Patent Literature Citations (1)
Entry |
K. Umeda et al., “A Semiconductor Device and Its Manufacturing Method,” English translation of Japanese unexamined patent No. JP 10-4145 A, Jan. 1998. |