Claims
- 1. In a semiconductor device integrating a semiconductor laser and a transistor for modulating the laser, comprising semiconductor layers on a substrate and ohmic electrodes on the back surface of the substrate and on the uppermost semiconductor layer, the improvement wherein the semiconductor layers except the uppermost layer are semiconductor layers whose cavity is constructed by a pair of parallel cleavages or etched surfaces perpendicular to the semiconductor layers, the uppermost semiconductor layer is portioned into three semiconductor sections by a V-shaped boundary extending through the entire thickness of the uppermost semiconductor layer perpendicular to the cleavages or etched surfaces, the three semiconductor sections being a first semiconductor section within the V-shaped boundary and being of the same conductivity type as that of the semiconductor layer lying below said first semiconductor section, and second and third semiconductor sections separated by the first section and having a different conductivity type from that of the first semiconductor section, and the ohmic electrodes on the uppermost semiconductor layer are on each of the first, second and third semiconductor sections of the uppermost semiconductor layer, whereby said laser and said transistor for modulating said laser are integrated vertically above the same area of said substrate.
- 2. The semiconductor device of claim 1, wherein the semiconductor layers and sections are of a material selected from the group consisting of GaAs, GaAlAs, InP and InGaAsP.
- 3. The semiconductor device of claim 1, wherein the substrate consists of n-type GaAs, the semiconductor layers and sections consist of an n-type Al.sub.x Ga.sub.1-x As layer, p-type GaAs layer, p-type Al.sub.x Ga.sub.1-x As layer abd n-type GaAs layer, the ohmic electrode on the substrate consists of AuGeNi, the ohmic electrodes on the second and third semiconductor sections consist of AuGeNi, and the ohmic electrode on the first semiconductor section consists of AuCr.
Priority Claims (1)
Number |
Date |
Country |
Kind |
55-85523 |
Jun 1980 |
JPX |
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Parent Case Info
This application is a continuation of now abandoned application Ser. No. 275,029, filed June 18, 1981.
US Referenced Citations (5)
Non-Patent Literature Citations (2)
Entry |
Eichenberger et al., "Integrable FET Device", IBM Technical Disclosure Bulletin, vol. 13, No. 11, Apr. 1971, p. 3216. |
Baliga, "A Power Junction Gate Field-Effect Transistor Structure with High Blocking Gain", IEEE Transaction on Electron Devices, vol. Ed-27, No. 2, Feb. 1980, pp. 368-373. |
Continuations (1)
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Number |
Date |
Country |
Parent |
275029 |
Jun 1981 |
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