Patent Application
20240275132
The present disclosure relates to a semiconductor device and the like.
Patent Document 1 discloses a surface emitting semiconductor laser element in which a distributed Bragg reflector (DBR) layer and a light-emitting layer are provided on a GaN substrate. The structure using the DBR as a selective growth mask has heat dissipation problems.
A semiconductor device according to the present disclosure includes a base substrate including a main substrate, a first light reflector located above the base substrate, a first mask located above the first light reflector, a base semiconductor part located above the first mask, a compound semiconductor part located above the base semiconductor part, and a second light reflector located above the compound semiconductor part and the first light reflector.
The semiconductor device 30 includes one or more surface emitting semiconductor laser elements 20 each including the base semiconductor part 8, the compound semiconductor part 9, the first light reflector RF, and the second light reflector RS. Here, the normal direction of the base substrate UK, that is, the direction from the base substrate UK toward the first mask 6 is referred to as an upward direction. In the semiconductor device 30, the first mask 6 may be a mask layer 6, the base semiconductor part 8 may be a base semiconductor layer 8, the compound semiconductor part 9 may be a compound semiconductor layer 9, the first light reflector RF may be a first light reflector layer, and the second light reflector RS may be a second light reflector layer. The first mask 6 may include a mask portion 5 and an opening portion K. That is, the first mask 6 may be a mask pattern including the mask portion 5 and the opening portion K.
A first electrode E1 can be provided on the compound semiconductor part 9. The first light reflector RF, the base semiconductor part 8, the compound semiconductor part 9, the first electrode E1, and the second light reflector RS may overlap each other in plan view. Two components overlapping each other in plan view means that at least a part of one component overlaps the other component when viewed (including perspective viewing) in the normal direction of the base substrate UK.
In the semiconductor device 30, laser oscillation is enabled when the light generated in the compound semiconductor part 9 reciprocates between the first and second light reflectors RF and RS. In the semiconductor device 30, the first light reflector RF provided between the base substrate UK and the first mask 6 increases heat dissipation from the first light reflector RF, and improves the reliability of the surface emitting semiconductor laser element 20.
The base semiconductor part 8 and the compound semiconductor part 9 may include a nitride semiconductor. The nitride semiconductor may be expressed, for example, by AlxGayInzN (0≤x≤1; 0≤y≤1; 0≤z≤1; x+y+z=1). Specific examples of the nitride semiconductor may include a GaN-based semiconductor, aluminum nitride (AlN), indium aluminum nitride (InAlN), and indium nitride (InN). The GaN-based semiconductor is a semiconductor containing gallium atoms (Ga) and nitrogen atoms (N). Typical examples of the GaN-based semiconductor may include GaN, AlGaN, AlGaInN, and InGaN. The base semiconductor part 8 may be of a doped type (for example, an n-type including a donor). Each of the base semiconductor part 8 and the compound semiconductor part 9 may be a nitride semiconductor layer.
The base semiconductor part 8 including the nitride semiconductor can be formed by an epitaxial lateral overgrowth (ELO) method. The use of the ELO method decreases the number of threading dislocations (defects) in the base semiconductor part 8 and the compound semiconductor part 9 on the mask portion 5, thus enhancing the light emission efficiency of the compound semiconductor part 9 (for example, the ratio of the amount of light to the amount of charge injected from the first electrodes E1) while reducing the amount of heat generation. This is due to the fact that the threading dislocations are dislocations (defects) that extend from the base semiconductor part 8 to the compound semiconductor part 9, suppressing charge transfer and causing heat generation.
When the base semiconductor part 8 is formed using the ELO method, a template substrate including the base substrate UK, the first light reflector RF, and the mask pattern 6 on the first light reflector RF may be used. The template substrate may include a growth suppression region (for example, a region that suppresses crystal growth in the Z-direction) corresponding to the mask portion 5 and a seed region corresponding to the opening portion K. For example, the growth suppression region and the seed region may be formed in the first light reflector RF, and the base semiconductor part 8 may be formed on the growth suppression region and the seed region using the ELO method.
The first light reflector RF may be the epitaxial distributed Bragg reflector (DBR) including a nitride semiconductor. This increases the light reflectance of the first light reflector RF.
The first film forming unit 72 may include a metal organic chemical vapor deposition (MOCVD) apparatus, and the control unit 74 may include a processor and a memory. The control unit 74 may be configured to control the first and second film forming units 72, 73 by executing a program stored in, for example, a built-in memory or a communicable communication device, or on an accessible network. The program and a recording medium or the like in which the program is stored are also included in the present embodiment.
The base semiconductor part 8 includes a first portion HD and a second portion SD (low-defect portion) which is located on the mask portion 5 and having a threading dislocation density of one fifth or less of the first portion HD. The threading dislocation density of the second portion SD may be 5×106/cm2 or less. The second portion SD overlaps the compound semiconductor part 9 in plan view. A part of the compound semiconductor part 9 that overlaps the second portion SD in plan view is a low dislocation portion taking over the low dislocation characteristic (low-defect characteristic) of the base semiconductor part 8. The first light reflector RF and the second light reflector RS can be configured to overlap the second portion SD in plan view. The base semiconductor part 8 can be made of an n-type semiconductor (for example, silicon-doped gallium nitride). For example, when the mask portion 5 contains silicon, the base semiconductor part 8 can be the n-type semiconductor by diffusing a part of the first mask 6 while the base semiconductor part 8 is formed by unintentional doping.
In
The semiconductor device 30 includes one or more vertical cavity surface emitting semiconductor laser elements 20 (VCSEL: vertical cavity surface emitting elements), each including the first light reflector RF, the base semiconductor part 8, the compound semiconductor part 9, the insulating film KF, the first and second electrodes E1, E2, and the second light reflector RS. In the semiconductor laser element 20, the light generated in the compound semiconductor part 9 by the current between the first and second electrodes E1, E2 oscillates in the laser due to induced emission and feedback effects between the first and second light reflectors RF, RS.
In the semiconductor device 30, the first light reflector RF provided between the base substrate UK and the first mask 6 increases heat dissipation from the first light reflector RF, and improves the reliability of the surface emitting semiconductor laser element 20. This also increases the degree of freedom of design (material, structure, and the like) of the base substrate UK and the first light reflector RF.
The semiconductor device 30 includes the insulating film KF located on the compound semiconductor part 9. The insulating film KF includes an aperture portion AP overlapping the first electrode E1, the first light reflector RF, the second portion SD, and the second light reflector RS in plan view. The first electrode E1 is a transparent electrode located between the compound semiconductor part 9 and the second light reflector RS, and the first electrode E1 is in contact with the upper surface of the insulating film KF. For the insulating film KF, SiOx, SiNx, AlOx, or the like can be used.
In the aperture portion AP, the first electrode E1 is in contact with the compound semiconductor part 9. Specifically, the p-type semiconductor layer 9B exposed from the aperture portion AP is in contact with the central portion of the first electrode E1. The aperture portion AP is a current constriction portion formed by, for example, circularly penetrating the insulating film KF. The aperture portion AP constricts the current path between the first and second electrodes E1, E2 on the anode side, thus enhancing the light emission efficiency.
In Example 1, the aperture portion AP overlaps the second light reflector RS, the compound semiconductor part 9, the second portion SD (low-defect portion) of the base semiconductor part 8, and the first light reflector RF in plan view. This allows generation of the current path extending from the first electrode E1 in the aperture portion AP to the base semiconductor part 8 through the compound semiconductor part 9 at the low-defect portion of the base semiconductor part 8 and the compound semiconductor part 9. This enhances the light emission efficiency in the active layer 9K, while suppressing the heat generation in the base semiconductor part 8 and the compound semiconductor part 9.
In the semiconductor device 30, a first pad P1 is provided in contact with the first electrode E1, and the first pad P1, the aperture portion AP, and the second electrode E2 are arranged in the Y-direction in plan view. This allows the second electrode E2 to be formed on the second portion SD (low-defect portion) of the base semiconductor part 8, enhancing the light emission efficiency in the active layer 9K. The first pad P1 only needs to be in contact with a part of the first electrode E1, but may be shaped such that the first pad P1 is in contact with the periphery of the first electrode E1 (that is, a region contacting the first electrode E1 surrounds the aperture portion AP in plan view) in order to inject the current more uniformly into the aperture portion AP. The first pad P1 may be circular.
The first light reflector RF formed as the epitaxial DBR including a nitride semiconductor increases the light reflectance of the first light reflector RF and simplifies the manufacturing process. This also relaxes the stress (tensile stress at room temperature) of the base semiconductor part 8.
The second light reflector RS may be located on the first electrode E1 and may be a dielectric DBR including a dielectric body. In this case, as illustrated in
The lower surface of the second light reflector RS may be included in the third refractive portion R3, and the upper surface of the second light reflector RS may be included in the fourth refractive portion R4. The third refractive portion R3 may have a light refractive index smaller than that of the p-type semiconductor layer 9B. This increases the light reflectance of the second light reflector RS. The second light reflector RS provided in an island shape on the first electrode E1 increases the heat dissipation.
As illustrated in
A different substrate having a lattice constant different from that of the base semiconductor part including, for example, the GaN-based semiconductor can be used for the main substrate 1 of the base substrate UK. Examples of the different substrate include a single-crystal silicon (Si) substrate, a sapphire (Al2O3) substrate, a silicon carbide (SiC) substrate, and an aluminum nitride (AlN) substrate. The plane orientation of the main substrate 1 is, for example, the (111) plane of the silicon substrate, the (0001) plane of the sapphire substrate, or the 6H-SiC (0001) plane of the SiC substrate.
The main substrate 1 may have a thermal conductivity higher than that of the GaN bulk substrate. A SiC substrate may be adopted as the main substrate 1 from the viewpoint of having a better thermal conductivity than the GaN substrate and having translucency. A GaN substrate (bulk crystal) can also be used as the main substrate 1 (see
In the base substrate UK, for example, as illustrated in
The buffer portion 2 need not be provided when the main substrate 1 and the base portion 3 do not melt together. In Example 1, the main substrate 1 is the SiC substrate, and the GaN layer is formed on the main substrate 1 as the base portion 3 by the MOCVD method to achieve a thickness of 1.0 μm.
The buffer portion 2 (for example, aluminum nitride) and/or the base portion 3 (for example, the GaN-based semiconductor) can be formed using a sputtering device (pulse sputter deposition (PSD), pulse laser deposition (PLD), etc.). Film formation using the sputtering device can streamline the manufacturing process.
When the base semiconductor part 8 is grown in the lateral direction using the ELO method, even if the base layer having poor crystallinity is used, its low crystallinity is taken over onto the opening portion K (the first portion HD) and is not taken over onto the second portion SD overlapping the aperture portion AP and the light emitting region of the active layer 9K in plan view (therefore, the second portion SD is a low-defect portion). This reduces the cost while maintaining the light-emitting characteristic.
The base portion 3 may have at least one of the effect of suppressing melting of the main substrate 1 and the first light reflector RF, the effect of improving the crystallinity of the first light reflector RF, the effect of relaxing the internal stress of the base semiconductor part 8 (relaxing warpage of the semiconductor device 30), and the effect of increasing the heat dissipation. The buffer portion 2 may have at least one of the effect of suppressing melting of the main substrate 1 and the base portion 3, the effect of improving the crystallinity of the base portion 3, the effect of relaxing the internal stress of the base semiconductor part 8, and the effect of increasing heat dissipation.
A GaN substrate (bulk crystal) may be used as the main substrate 1. In this case, the first light reflector RF (epitaxial DBR) may be formed (directly) on the main substrate 1, or the first light reflector RF (epitaxial DBR) may be formed on the main substrate 1 via the base portion 3 (for example, a GaN layer). The use of the GaN substrate as the main substrate 1 reduces the number of threading dislocations in the first light reflector RF, and reduces the number of threading dislocations on the opening portion K in the base semiconductor part 8.
Alternatively, the base substrate in which the (11-22) plane of the GaN-based semiconductor layer is formed on the sapphire substrate or the base substrate in which the (20-21) plane of the GaN-based semiconductor layer is formed on a sapphire substrate may be used. Since the semiconductor layer formed epitaxially on these semipolar planes of the base substrate has a high crystallinity, these base substrates can also be used in Example 1.
As illustrated in
The first light reflector RF made of the epitaxial DBR of AlN (first refractive portion)/GaN (second refractive portion) can increase the thermal conductivity of the first light reflector RF. The first mask 6 can suppress propagation of the stress from the first light reflector RF to the base semiconductor part 8 and the compound semiconductor part 9. The first light reflector RF can, of course, be the epitaxial DBR having a matching lattice system such as AlInN (first refractive portion)/GaN (second refractive portion).
The epitaxial DBR may be formed using the MOCVD method, or the remote plasma chemical vapor deposition (RPCVD) method, which allows low-temperature deposition, or the pulse sputter deposition (PSD) method. The low-temperature film formation method such as the RPCVD method or the PSD method can reduce the temperature difference between during and after the film formation and suppresses generation of cracks due to a difference in thermal expansion coefficient between the main substrate 1 and the epitaxial DBR. Alternatively, the epitaxial DBR may be formed using sputtering or the like capable of low-temperature film formation, and the seed portion 4 may be formed using the MOCVD method.
In Example 1, by using the metal organic vapor phase epitaxial (MOVPE) method, an undoped GaN layer of about 2 μm was deposited on a 6H-SiC (0001) substrate as the base portion 3, and 30 pairs of AlN (first refractive portion)/GaN (second refractive portion) were stacked on the base portion 3 at a growth temperature of 1040° C. and a growth pressure of 50 Torr, thus providing the epitaxial DBR. The design peak wavelength of the DBR was 400 nm, and the optical film thickness of AlN in one pair was λ/4. Thus, the first light reflector RF having a high light reflectance of about 98% was obtained.
As illustrated in
The refractive material of the first refractive portion R1 may be AlN, AlInN, or InN. The refractive material (for example, AlN) of the first refractive portion R1 may have a thermal conductivity larger than that of the GaN-based semiconductor (for example, GaN) of the second refractive portion R2. The refractive material of the first refractive portion R1 may have a lattice parameter different from that of the GaN-based semiconductor of the second refractive portion R2. The refractive material (for example, AlN) of the first refractive portion R1 may have a smaller lattice constant than the GaN-based semiconductor (for example, GaN) of the second refractive portion R2. The thermal expansion coefficient of the main material of the main substrate 1 (for example, SiC, Si)<the thermal expansion coefficient of the GaN-based semiconductor of the second refractive portion R2 (for example, GaN)<the thermal expansion coefficient of the refractive material of the first refractive portion R1 (for example, AlN).
The opening portion K in the first mask 6 functions as a growth initiation hole to expose the nitride semiconductor that serves as the seed and initiates the growth of the base semiconductor part 8. The mask portion 5 functions as a selective growth mask for lateral growth of the base semiconductor part 8. Examples of the mask portion 5 that can be used include a single-layer film including any one of a silicon oxide film (SiOx), a titanium nitride film (TiN or the like), a silicon nitride film (SiNx), a silicon oxynitride film (SiON), and a metal film having a high melting point (for example, 1000° C. or higher), or a layered film including at least two of these.
For example, a silicon oxide film having a thickness of from about 10 nm to about 500 nm is formed on the entire surface by sputtering, and a resist is applied onto the entire surface of the silicon oxide film. Subsequently, the resist is patterned by photolithography to form the resist with a plurality of stripe-shaped opening portions. Subsequently, a part of the silicon oxide film is removed with a wet etchant such as a hydrofluoric acid (HF) or a buffered hydrofluoric acid (BHF) to form the plurality of opening portions K, and the resist is removed by organic cleaning. Thus, the first mask 6 is formed. Alternatively, the opening portion K may be formed by using a typical lift-off method.
The opening portion K has a longitudinal shape (slit shape) and is periodically arranged in an a-axis direction (X-direction) of the base semiconductor part layer 8. The width (opening width) of the opening portion K can be set to about 0.1 μm to 20 μm (for example, about 5 μm). As the width of each opening portion decreases, the number of threading dislocations propagating from each opening portion to the base semiconductor part 8 decreases. The second portion (low-defect portion) SD can be made large. The thickness of the mask portion 5 is preferably thin from the viewpoint of heat dissipation, but may be 10 nm or more, 20 nm or more, or 40 nm or more in consideration of suppression of the mutual reaction between the first mask 6 and the base semiconductor part 8.
The width of the mask portion 5 can be from 10 μm to 200 μm. By increasing the width of the mask portion 5, the area (effective area) of the second portion SD (low-defect portion) of the base semiconductor part 8 can be increased. Accordingly, the aperture diameter (diameter of the aperture portion AP) can also be increased, achieving a high-output semiconductor laser device.
The silicon oxide film may decompose and evaporate in minute amounts during film formation of the base semiconductor part 8 and may be taken into the base semiconductor part 8. However, silicon nitride and silicon oxynitride films have the advantage of being difficult to decompose and evaporate at high temperatures.
Therefore, the first mask 6 may be a single-layer film of a silicon nitride or silicon oxynitride film, a layered film in which a silicon oxide film and a silicon nitride film are formed in this order, a laminate film in which a silicon nitride film and a silicon oxide film are formed in this order, or a layered film in which a silicon nitride film, a silicon oxide film, and a silicon nitride film are formed in this order.
An abnormal portion such as a pinhole in the mask portion 5 may be eliminated by performing organic cleaning or the like after film formation and introducing the film again into a film forming device to form the same type of film. A typical silicon oxide film (single layer) can also be used to form a good quality first mask 6 by such a method to form the film again.
The mask portion 5 may have a light refractive index smaller than that of the second refractive portion R2 (for example, a GaN-based semiconductor). In Example 1, since the first mask 6 exists in the cavity, the first mask 6 can be designed so as not to disturb the resonance of light as much as possible. Since the mask portion 5 is a selective growth film and also a light transmission film, the light transmission characteristic may be increased (light absorption may be reduced). When the uppermost portion of the first light reflector RF (the second refractive portion R2) or the seed portion 4 is a GaN layer and a single layer of silicon oxide film or silicon nitride film having a lower refractive index than GaN is used as the mask material, the optical film thickness (physical film thickness/refractive index) of the silicon oxide film or silicon nitride film can be made to be an integer of λ (oscillation wavelength)/2 times the optical film thickness (physical film thickness/refractive index). This increases the reflectance in the first light reflector RF. Furthermore, a mask material including a plurality of film types, each having an optical film thickness of an integer multiple of λ/2, may be used. For example, when the uppermost portion (the second refractive portion R2) of the first light reflector RF or the seed portion 4 is a GaN layer, a silicon oxide film and a silicon nitride film having a refractive index higher than the silicon oxide film can be formed in this order on top of this GaN layer, both films having an optical film thickness of λ/4. By adopting such a pair of a silicon oxide film having the optical film thickness of λ/4 and a silicon nitride film having the optical film thickness of 24 as the first mask, the light reflectance can be further increased. Conversely, a design that involves decreasing the reflectance of the first light reflector RF by the first mask 6 is also possible.
In Example 1, the GaN layer was provided as the base semiconductor part 8 (ELO semiconductor layer), and the ELO film of gallium nitride (GaN) was formed on the template substrate described above using the MOCVD apparatus. The following may be adopted as examples of the ELO film formation conditions: substrate temperature: 1120° C., growth pressure: 50 kPa, trimethylgallium (TMG): 22 sccm, NH3: 15 slm, and V/III=6000 (ratio of group V raw material supply amount to group III raw material supply amount).
In this case, the base semiconductor part 8 was selectively grown (vertically grown) on the seed portion 3 (for example, the GaN layer) exposed from the opening portion K, and was subsequently grown laterally on the mask portion 5. The lateral growth was stopped before two base semiconductor parts 8 laterally growing from both sides on the mask portion 5 met.
A single silicon nitride film was used as the mask portion 5, and the optical film thickness of the mask portion 5 was set to λ/4 under the assumption that the emission wavelength was 450 nm. The width of the mask portion 5 was 50 μm, the width of the opening portion K was 5 μm, the width of the gap TK was 3 μm, the lateral width of the base semiconductor part 8 was 52 μm, the width (size in the X-direction) of the low-defect portion was 23.5 μm, and the layer thickness of the base semiconductor part 8 was 5 μm. Thus, the aspect ratio of the base semiconductor part 8 was 52 μm/5 μm=10.4, achieving a very high aspect ratio. The width (effective width) of the low-defect portion SD may be 10 μm or more or 20 μm or more.
In Example 1, the lateral film formation rate is increased in the formation of the base semiconductor part 8. A method for increasing the lateral film formation rate is as follows. First, a vertical growth layer growing in the Z-direction (c-axis direction) is formed on the seed portion 3 exposed from the opening portion K, followed by a lateral growth layer growing in the X-direction (a-axis direction). In this case, by setting the thickness of the vertical growth layer to 10 μm or less, preferably 5 μm or less, and more preferably 3 μm or less, the thickness of the lateral growth layer may be suppressed to be thin and the lateral film formation rate may be increased.
Here, the film formation of the initial growth layer SL may be stopped just before the edge of the initial growth layer SL rides up to the upper surface of the mask portion 5 (when it is in contact with the top edge of the side surface of the mask portion 5) or just after it rides up to the upper surface of the mask portion 5 (that is, the ELO film formation conditions may be switched from the film formation conditions in the c-axis direction to the film formation conditions in the a-axis direction at this timing). In this way, the initial growth layer SL protrudes slightly from the mask portion 5 before lateral film formation is performed, reducing the amount of material consumed for growth in the thickness direction of the base semiconductor part 8 and allowing the base semiconductor part 8 to be grown laterally at high speed. The initial growth layer SL may be formed to have a thickness of, for example, 2.0 μm or more and 3.0 μm or less.
The film-forming temperature of the base semiconductor part 8 (ELO semiconductor portion) may exceed 1200° C. or may be equal to or less than 1150° C. The ELO semiconductor portion can be formed even at a low temperature below 1000° C., which is more preferable from the viewpoint of reducing the interaction. It has been found that, in such low-temperature film formation, when trimethyl gallium (TMG) is used as a gallium raw material, the raw material is not sufficiently decomposed, and gallium atoms and carbon atoms are simultaneously taken into the ELO semiconductor portion in larger quantities than usual. This may be because the ELO method is faster for the film formation in the a-axis direction and slower for the film formation in the c-axis direction, thus taking up more during the c-plane film formation.
It has also been found that carbon incorporated into the ELO semiconductor portion reduces the reaction with the mask portion 5 and adhesion between the mask portion 5 and the ELO semiconductor portion (base semiconductor part 8). Therefore, in the low-temperature film formation of the ELO semiconductor portion, the amount of ammonia supplied is reduced and the film is formed at about low V/III (<1000) to incorporate carbon elements in the raw material or chamber atmosphere into the ELO semiconductor portion and reduce the reaction with the mask portion 5. In this case, the base semiconductor part 8 includes carbon.
The base semiconductor part 8 and the compound semiconductor part 9 may be formed successively with the same device (for example, the MOCVD apparatus). Alternatively, the substrate may be taken out of the device after the base semiconductor part 8 is formed, and the compound semiconductor part 9 is formed after treating the surface of the base semiconductor part 8 by, for example, polishing. In this case, the compound semiconductor part 9 may be formed after the n-type GaN-based semiconductor layer (for example, having a thickness of about 0.1 μm to about 3 μm) serving as a buffer during regrowth is formed on the base semiconductor part 8. In addition to the MOCVD apparatus, a sputtering apparatus, a remote plasma CVD (RPCVD) apparatus, a pulse sputter deposition (PSD) apparatus, and the like can be used to form the compound semiconductor part 9. Because the remote plasma CVD apparatus and the PSD apparatus do not use hydrogen as a carrier gas, the low-resistance p-type GaN-based semiconductor portion can be formed.
The MQW structure of the active layer 9K may be, for example, a five to six period structure of InGaN/GaN. The composition of In varies with the desired emission wavelength, with an In concentration of about 15 to 20% for blue (around 450 nm) and about 30% for green (around 530 nm). If necessary, an electron blocking layer (for example, an AlGaN layer) may be formed on the active layer 9K. To reduce the resistance, a surface (about 10 nm) of the p-type semiconductor layer 9B may be a p-type highly doped layer.
The first electrode E1 is made of a transparent conductive material having light permeability. Examples of the transparent conductive material include indium tin oxide (including crystalline ITO, amorphous ITO, and Sn-doped In2O3), indium zinc oxide (IZO), F-doped In2O3 (IFO), tin oxide (including SnO2, Sb-doped SnO2, and F-doped SnO2), and zinc oxide (including ZnO, AI-doped ZnO, and B-doped ZnO).
The first electrode E1 may include at least one of gallium (Ga) oxide, titanium (Ti) oxide, niobium (Nb) oxide, and nickel (Ni) oxide as a base layer. The aperture diameter of the first electrode E1 (the diameter of the current injection region in contact with the p-type semiconductor portion) can be, for example, from 2 μm to 100 μm.
The first pad P1 in contact with the first electrode E1 may have a single-layer structure or a multi-layer structure including at least one of Au, Ag, Pd, Pt, Ni, Ti, V, W, Cr, Al, Cu, Zn, Sn, and In. As the multi-layer structure, for example, assuming that the left side indicates the lower layer side, a configuration such as Ti layer/Au layer, Ti layer/Al layer, Ti layer/Al layer/Au layer, Ti layer/Pt layer/Au layer, Ni layer/Au layer, Ni layer/Au layer/Pt layer, Ni layer/Pt layer, Pd layer/Pt layer, or Ag layer/Pd layer can be employed.
As illustrated in
In
Specifically, a plurality of two semiconductor laser elements 20 are arranged in the Y-direction in the first region L1, and a plurality of six semiconductor laser elements 20 are arranged in the Y-direction in the second region L2. The aperture diameter of the semiconductor laser element 20 in the first region L1 is larger than the aperture diameter of the semiconductor laser element 20 in the second region L2.
In the semiconductor laser elements 20 of the first region L1, in plan view, the aperture portion AP and the first pad P1 are arranged in the Y-direction and, with the Y-direction as the longitudinal direction, the second electrode E2, which is in contact with the base semiconductor part 8, and the first pad P1 are arranged in the X-direction. In the semiconductor laser elements 20 of the second region L2, in plan view, the aperture portion AP and the first pad P1 are arranged in the X-direction and, with the X-direction as the longitudinal direction, the aperture portion AP is located between the second electrode E2, which is in contact with the base semiconductor part 8, and the first pad P1 in the X-direction.
In
The gap TK is in contact with a side surface 5S of the mask portion 5 and a side surface 4S of the seed portion 4, and the U-shaped portion UC (of the second refractive portion R2) located at the uppermost portion of the first light reflector RF is in contact with the gap TK. Alternatively, the U-shaped portion UC located at the uppermost portion of the first light reflector RF (of the first refractive portion R1) may be in contact with the gap TK. The recessed portion UT provided in the base substrate UK and the U-shaped portion provided in the first light reflector RF, which is the epitaxial DBR, relax the stress of the first light reflector RF and reduce the generation of cracks. This also increases the heat dissipation from the first light reflector RF.
In
The second mask MS includes a mask portion M and an opening portion Q. In
In Example 4, the base portion 3 or the lowermost portion of the first light reflector RF (epitaxial DBR) is formed by the ELO method, thus reducing the dislocations (defects) of the first light reflector RF and increasing the light reflectance.
In Example 5, the epitaxial DBR of InAlN (first refractive portion R1)/GaN (second refractive portion R2) was formed. In this case, the base substrate UK was placed in the reactor of the MOCVD apparatus, H2 and NH3 were supplied into the reactor to raise the substrate temperature to 1070° C., and TMG was supplied to the base substrate UK to grow 100 nm of the GaN layer as the buffer portion 2. Next, after the substrate temperature was lowered to 930° C. (first temperature), the supplied gas was switched from H2 to N2, and TMI and TMA were supplied to grow 50 nm of the non-doped InAlN layer (first refractive portion R1). Next, by supplying TEG and SiH4 in a state where the substrate temperature was maintained at 930° ° C., 5 nm of the Si-doped GaN layer was formed as the first layer of the second refractive portion R2. Subsequently, the supplied gas was switched from N2 to H2, the substrate temperature was raised to 1070° C. (second temperature), and TMG was supplied to grow 40 nm of the non-doped GaN layer as the second layer of the second refractive portion R2. Thereafter, the above process was repeated to form the epitaxial DBR composed of 40 pairs of InAlN/GaN. When the first light reflector RF made of InAlN/GaN and its lattice matched with the base semiconductor part 8 (for example, the GaN layer) was formed, the GaN substrate (bulk crystal) could be used as the base substrate UK. In this case, the threading dislocation density on the opening portion K of the first mask 6 could be suppressed to about 5×106 cm−2 or less, and the aperture portion AP could be formed also on the opening portion K.
In Example 6, the first light reflector RF (epitaxial DBR) is formed by the PSD method. In the PSD method, all or a part of elements for forming the compound epitaxial layer are intermittently supplied. All of the constituent elements need to be supplied to form the compound epitaxial layer, but in some cases, only some of the elements may be supplied intermittently. That is, all or some of the raw materials of the constituent elements are intermittently excited. Typically, in the case of a nitride of Group III-V, all of the Group III elements can be intermittently supplied, but to form a mixed crystal, some of the Group III elements may be intermittently supplied and the other Group III elements may be continuously supplied (preferably at a low supply rate).
In the case of the Group V elements, when nitrogen is supplied in the form of a gas to be present in the vicinity of the substrate growth surface in the form of gas (molecules, radicals, or ions), there is no need to intentionally supply nitrogen intermittently. The element N can also be intermittently supplied by, for example, intermittently exciting (sputtering) a raw material containing N, for example, a nitride of the Group III-V. The Group V element may be supplied by intermittently exciting the raw material, by allowing the Group V element raw material to be present in the atmosphere, or by allowing another raw material to be intermittently excited while allowing the Group V element raw material to be present in the atmosphere. When the plurality of elements are intermittently supplied, the timings at the plurality of elements are supplied may or may not be the same.
As for the supply duration, if it is too short, a large amount of energy is given instantaneously to increase the supply rate during the supply period in order to obtain a practical film forming rate, and as a result, droplets are likely to occur as in the PLD method. On the other hand, if the supply duration is too long, it may not be possible to obtain a supply stop time for allowing sufficient migration. As for the supply stop time (s), if it is too short, it is difficult to obtain good crystals due to insufficient time for migration, and if it is too long, impurities may be easily taken or cause a difficulty in continuing the film formation process depending on the film formation method.
In Example 6, 1.0 sccm of Ar gas and 4.0 sccm of nitrogen gas were introduced by a mass flow controller as the atmosphere gas, and the growth pressure was 2×10−2 Torr. The SiC substrate was grounded potentially, the voltage applied between the SiC substrate and the Ga metal target was −600 V, the voltage application time was 5 μs, and the voltage application pause time was 95 μs, while the voltage applied between the SiC substrate and the Ga metal target was −557 V, the voltage application time was 5 μs, and the voltage application pause time was 50 μs. This process was repeated. Sputtering discharge was started by temporarily increasing the amount of Ar gas introduced into the growth chamber, and after confirming that the amount of Ar gas and growth pressure had been stabilized at the set values mentioned above, each shutter was opened to form the GaN layer as the second refractive portion R2. The growth temperature was 350° C. In the same or similar way, an Al target could be used to form the AlN layer as the first refractive portion R1. By repeating the above process, the epitaxial DBR composed of 30 pairs of AlN (first refractive portion R1)/GaN (second refractive portion R2) could be formed.
In Examples 1 to 6, the base semiconductor part 8 can be made of GaN; however, the base semiconductor part 8 may be made of InGaN, which is a GaN-based semiconductor. The InGaN layer is laterally disposed at a low temperature below 1000° C., for example. This is because the vapor pressure of indium increases at a high temperature and indium is not effectively taken into the film. The low film formation temperature provides an effect of reducing the interaction between the mask portion 5 and the base semiconductor part 8. Another effect is that InGaN is less reactive to the mask portion 5 (for example, a silicon oxide film or a silicon nitride film) than GaN. When indium is taken into the base semiconductor part 8 at an In composition level of 1% or more, the reactivity with the mask portion 5 is further lowered. As the gallium raw material gas, triethylgallium (TEG) can be used.
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The foregoing embodiments and examples have been presented for purposes of illustration and description, and are not intended to be limiting. Based on these illustrations and descriptions, it will be apparent to those skilled in the art that many variations are possible.
In the present disclosure, the invention has been described above based on the various drawings and examples. However, the invention according to the present disclosure is not limited to each embodiment described above. That is, the embodiments of the invention according to the present disclosure can be modified in various ways within the scope illustrated in the present disclosure, and embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of the invention according to the present disclosure. In other words, a person skilled in the art can easily make various variations or modifications based on the present disclosure. Note that these variations or modifications are included within the scope of the present disclosure.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2021-091626 | May 2021 | JP | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2022/021754 | 5/27/2022 | WO |
