Semiconductor device package

Information

FIG. 1 is a perspective view from the front left side and below the semiconductor device package showing our new design.

FIG. 2 is a top plan view thereof;

FIG. 3 is a bottom plan view thereof; and,

FIG. 4 is an elevational view from the front side thereof.

We claim the ornamental design for a semiconductor device package, as shown and described.

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