The present invention relates to a semiconductor device including a thin film transistor (TFT) having an oxide semiconductor layer.
In recent years, vigorous development activities are being directed toward TFTs with an oxide semiconductor layer containing In (indium), Zn (zinc), Ga (gallium), or the like (e.g. Patent Documents 1 to 4). A TFT with an oxide semiconductor layer (hereinafter referred to as an oxide semiconductor TFT) has a high mobility and high ON-OFF ratio characteristics.
Patent Document 4 discloses a semiconductor device in which a light shielding film or the like is formed to prevent shorter-wavelength visible light from striking an amorphous oxide semiconductor (a-IGZO) layer containing In, Ga, and Zn. By forming a light shielding film, changes in the characteristics of the oxide semiconductor TFT are prevented.
[Patent Document 1] Japanese Laid-Open Patent Publication No. 2010-98305
[Patent Document 2] Japanese Laid-Open Patent Publication No. 2009-224354
[Patent Document 3] Japanese Laid-Open Patent Publication No. 2007-150157
[Patent Document 4] Japanese Laid-Open Patent Publication No. 2007-115902
However, the semiconductor device fabrication disclosed in Patent Document 4 has a problem in that more steps are needed for forming the light shielding film. On the other hand, in the construction disclosed in Patent Document 4, a light shielding film is formed only on the backlight side of the TFT, so that this light shielding film cannot block any light entering oxide semiconductor TFT from the viewer's side; thus, shorter-wavelength visible light may strike the oxide semiconductor TFT. If any more light shielding film were to be formed so as to block light entering the oxide semiconductor TFT from the viewer's side, the number of production steps would be further increased.
The present invention has been made in view of the above problems, and an objective thereof is to provide a semiconductor device which can be produced without increasing the number of production steps and whose TFT characteristics are unlikely to be affected by light.
A semiconductor device according to an embodiment of the present invention includes: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; an island-shaped oxide semiconductor layer formed on the gate insulating layer, the oxide semiconductor layer having a first contact region and a second contact region and a channel region located between the first contact region and the second contact region; a source electrode formed on the oxide semiconductor layer so as to be in contact with the first contact region; and a drain electrode formed on the oxide semiconductor layer so as to be in contact with the second contact region, wherein, all side faces of the oxide semiconductor layer are located over the gate electrode; in a cross section which is perpendicular to the substrate and traverses the first contact region in a channel width direction, a width of the source electrode is greater than a width of the oxide semiconductor layer; and in a cross section which is perpendicular to the substrate and traverses the second contact region in the channel width direction, a width of the drain electrode is greater than a width of the oxide semiconductor layer.
In one embodiment, within a surface of the oxide semiconductor layer, the first contact region and side faces of the first contact region relative to the channel width direction are covered by the source electrode; and within the surface of the oxide semiconductor layer, the second contact region and side faces of the second contact region relative to the channel width direction are covered by the drain electrode.
In one embodiment, within a surface of the oxide semiconductor layer, all upper face and side faces except an upper face of the channel region and side faces of the channel region relative to the channel width direction are covered by the source electrode or the drain electrode.
In one embodiment, within a surface of the oxide semiconductor layer, an upper face of the channel region and side faces of the channel region relative to the channel width direction are covered by an oxygen-containing insulative film and are in contact with the oxygen-containing insulative film; and when viewed from a normal direction of the substrate, a portion of the oxide semiconductor layer that is not covered by the source electrode or the drain electrode has a first recessed portion or a first cutaway portion.
A semiconductor device according to another embodiment of the present invention includes: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; an island-shaped oxide semiconductor layer formed on the gate insulating layer, the oxide semiconductor layer having a first contact region and a second contact region and a channel region located between the first contact region and the second contact region; a source electrode formed on the oxide semiconductor layer so as to be in contact with the first contact region; and a drain electrode formed on the oxide semiconductor layer so as to be in contact with the second contact region, wherein, all side faces of the oxide semiconductor layer are located over the gate electrode; regions of the oxide semiconductor layer other than a surface and side faces of the channel region are covered by the source electrode and the drain electrode, a region of the oxide semiconductor layer which is not covered by the source electrode or the drain electrode is covered by an oxygen-containing insulative film and is in contact with the oxygen-containing insulative film, when viewed from a normal direction of the substrate, a portion of the oxide semiconductor layer which is not covered by the source electrode or the drain electrode has a first recessed portion or a first cutaway portion.
In one embodiment, when viewed from the normal direction of the substrate, given a distance L between the source electrode and the drain electrode sandwiching the side faces of the channel region, a length of the first recessed portion or the first cutaway portion along the channel length direction and a length of the first recessed portion or the first cutaway portion along the channel width direction are, each independently, greater than 0 but equal to or less than L/2.
In one embodiment, the oxygen-containing insulative film is made of SiO2.
In one embodiment, when viewed from a normal direction of the substrate, the source electrode has a recessed portion, and the drain electrode is within the recessed portion.
In one embodiment, there is a plurality of first contact regions and second contact regions.
In one embodiment, the oxide semiconductor layer contains In, Ga, and Zn.
According to the present invention, a semiconductor device which can be produced without increasing the number of production steps and whose TFT characteristics are unlikely to be affected by light is provided.
With reference to the drawings, a semiconductor device (TFT substrate) according to an embodiment of the present invention will be described. A semiconductor device according to the present embodiment is a semiconductor device for use in a liquid crystal display device, for example. However, the present invention is not limited to the illustrated embodiment.
As shown in
Thus, since all side faces of the oxide semiconductor layer 4 are located over the gate electrode 2, it is possible to block light which enters from the opposite side of the first substrate 1 from the TFT 10A and make it difficult for that light to strike the oxide semiconductor layer 4, without having to form a light shielding film as disclosed in Patent Document 4. Moreover, since regions other than the surface and side faces of the channel region 4c are covered by the source electrode 5 or the drain electrode 6, even if light entering from the TFT 10A side of the first substrate 1 undergoes diffuse reflection within a liquid crystal panel, for example, the light will be unlikely to strike the oxide semiconductor layer 4. Furthermore, unlike the semiconductor device disclosed in Patent Document 4, the semiconductor device 100A does not require a light shielding film to be formed; therefore, the semiconductor device 100A can be produced without increasing the number of production steps.
As shown in
Thus, since the semiconductor device 100A is structured so that light is unlikely to strike the oxide semiconductor layer 4, an increase in the OFF current due to light is suppressed, and a shift of the threshold voltage toward the lower voltage side is also suppressed. Moreover, in the semiconductor device 100A, the oxide semiconductor layer 4 is shielded from light by using the gate electrode 2, the source electrode 5, and the drain electrode 6. Therefore, unlike in the semiconductor device disclosed in Patent Document 4, there is no need to separately provide a light shielding film, thus inducing no increase in the production cost.
The gate electrode 2, the source electrode 5, and the drain electrode 6 have a multilayer structure including an upper layer of an Al (aluminum) layer and a lower layer of a Ti (titanium) layer, for example. The upper layer may be a Cu (copper) layer, instead of an Al layer. Otherwise, the gate electrode 2, the source electrode 5, and the drain electrode 6 may have a single layer structure of a Ti, Mo (molybdenum), Ta (tantalum), or Cr (chromium) layer, for example. The thickness of the gate electrode 2, the source electrode 5, and the drain electrode 6 is not less than 100 nm and not more than 300 nm, for example.
Preferably, the gate insulating layer 3 and the protection layer 7 are made of an oxygen-containing insulative film. When the gate insulating layer 3 and the protection layer 7 are made of an oxygen-containing insulative film, oxygen will be supplied to the oxide semiconductor layer 4, so that oxygen defects in the oxide semiconductor layer 4 can be prevented. The gate insulating layer 3 and the protection layer 7 are made of SiO2 (silicon dioxide), for example. Note that the gate insulating layer 3 and the protection layer 7 may be made of SiNx (silicon nitride). Alternatively, the gate insulating layer 3 and the protection layer 7 may be made of SiON (silicon oxynitride). Furthermore, the gate insulating layer 3 and the protection layer 7 may have a multilayer structure containing SiO2, SiNx, or SiON. Moreover, a photosensitive organic insulative film may be formed on the protection layer 7. The thickness of the gate insulating layer 3 is not less than 300 nm and not more than 400 nm, for example. The thickness of the protection layer 7 is not less than 200 nm and not more than 300 nm, for example. Moreover, on the oxide semiconductor layer 4, an etch-stopper layer having contact holes for permitting electrical connection between the source electrode 5 and drain electrode 6 and the oxide semiconductor layer 4 may be formed. In this case, the etch-stopper layer is made of SiO2, for example.
The oxide semiconductor layer 4 is an amorphous oxide semiconductor layer (a-IGZO layer) containing In (indium), Ga (gallium), and Zn (zinc), for example. The oxide semiconductor layer 4 may be an amorphous oxide semiconductor (a-IZO) layer containing In and Zn but not containing Ga, or an amorphous oxide semiconductor (a-ZnO) layer containing Zn but containing neither In nor Ga, for example. The thickness of the oxide semiconductor layer 4 is not less than 40 nm and not more than 60 nm, for example.
Next, semiconductor devices 100B and 100C according to other embodiments of the present invention, which provide the same effects as the semiconductor device 100A, will be described. Component elements which are common to the semiconductor device 100A will be denoted by like reference numerals, and any redundant description will be omitted.
As shown in
Instead of forming the aforementioned recessed portions 9a and 9b, cutaway portions 9a′ and 9b′ may be formed as shown in
When viewed from the normal direction of the first substrate 1 (not shown), given a distance L between the source electrode 5 and the drain electrode 6 sandwiching the side faces of the channel region 4c, it is preferable that the length X1 or X1′ of the recessed portions 9a and 9b or the cutaway portions 9a′ and 9b′ along the channel length direction (i.e., a direction parallel to line I-I′ in
By thus forming the recessed portions 9a and 9b or the cutaway portions 9a′ and 9b′, it becomes possible to reduce the area of light which enters from the TFT 10B or TFT 10B′ side of the first substrate 1 (not shown) and strikes the oxide semiconductor layer 4. As a result of this, changes in TFT characteristics due to light are less likely to occur than in the TFT 10A. Furthermore, since the area of contact between the oxide semiconductor layer 4 and the protection layer 7 is increased, the amount of oxygen supply from the oxygen-containing protection layer 7 to the oxide semiconductor layer 4 increases, for example, whereby oxygen defects in the oxide semiconductor layer 4 can be prevented. If the respective lengths X1, X1′, Y1, Y1′ of the recessed portions 9a and 9b and the cutaway portions 9a′ and 9b′ mentioned above become greater than L/2, the TFT characteristics may be deteriorated.
As can be seen from
Next, a semiconductor device 100C according to still another embodiment of the present invention will be described with reference to
As shown in
Within the oxide semiconductor layer 4, recessed portions 9c and 9d are formed in a side face of the oxide semiconductor layer 4 in a region that is not covered by the recessed portion 5a of the source electrode 5 and the drain electrode 6. Alternatively, only one of the recessed portion 9c and recessed portion 9d may be formed. Moreover, it might be possible for the recessed portions 9c and 9d to be coincidentally (unintentionally) formed during the production process of the semiconductor device 100C.
When viewed from the normal direction of the first substrate 1 (not shown), given a distance L between the source electrode 5 and the drain electrode 6 sandwiching a side face of the channel region 4c, it is preferable that the length X2 of the recessed portions 9c and 9d along the channel length direction (i.e., a direction parallel to line II-II′) and the length Y2 of the recessed portions 9c and 9d along the channel width direction (i.e., a direction perpendicular to line II-II′) are, each independently, greater than 0 but equal to or less than L/2.
By thus forming the recessed portions 9c and 9d, it becomes possible to reduce the region in which light enters from the TFT 10C side of the first substrate 1 (not shown) and radiates the oxide semiconductor layer 4. As a result of this, changes in TFT characteristics due to light are less likely to occur than in any oxide semiconductor TFT in which the recessed portions 9c and 9d are not formed. Furthermore, since the area of contact between the oxide semiconductor layer 4 and the protection layer 7 is increased, the amount of oxygen supply from the oxygen-containing protection layer 7 to the oxide semiconductor layer 4 increases, for example, whereby oxygen defects in the oxide semiconductor layer 4 can be prevented. If the respective lengths X2, Y2 of the recessed portions 9c and 9d mentioned above become greater than L/2, the TFT characteristics may be deteriorated.
As can be seen from
Next, a semiconductor device 100D according to still another embodiment of the present invention will be described with reference to
As shown in
In a cross section which is perpendicular to the first substrate 1 and traverses each first contact region 4a in the channel width direction (i.e., a direction perpendicular to line III-III′ in
When viewed from the normal direction of the first substrate 1, within the oxide semiconductor layer 4, recessed portions 9e and 9f are formed on side faces of the oxide semiconductor layer 4 in each portion not covered by the source electrode 5 and the drain electrode 6, the side faces being relative to a direction which is orthogonal to the channel direction (a direction perpendicular to line III-III′ in
When viewed from the normal direction of the first substrate 1, given a distance L between the source electrode 5 and the drain electrode 6 sandwiching the side faces of each channel region 4c, it is preferable that the length X3 of the recessed portions 9e and 9f along the channel length direction (i.e., a direction parallel to line III-III′ in
By thus forming the recessed portions 9e and 9f, it becomes possible to reduce the area of light which enters from the TFT 10D of the first substrate 1 and strikes the oxide semiconductor layer 4. As a result of this, changes in TFT characteristics due to light are less likely to occur. Furthermore, since the area of contact between the oxide semiconductor layer 4 and the protection layer 7 is increased, the amount of oxygen supply from the oxygen-containing protection layer 7 to the oxide semiconductor layer 4 increases, for example, whereby oxygen defects in the oxide semiconductor layer 4 can be prevented. If the respective lengths X3, Y3 of the recessed portions 9e and 9f mentioned above become greater than L/2, the TFT characteristics may be deteriorated.
Next, terminals 90A and 90B included in the semiconductor devices 100A to 100D will be described with reference to
As shown in
As shown in
Thus, according to embodiments of the present invention, there is provided a semiconductor device which can be produced without increasing the number of production steps and whose TFT characteristics are unlikely to be affected by light.
The present invention has a very broad range of applications, and is applicable to semiconductor devices having TFTs, or electronic appliances in any field of art having such semiconductor devices. For example, it is applicable to active matrix-type liquid crystal display devices and organic EL display devices. For example, any such display device may be used as a display screen of a mobile phone or a portable game machine, a monitor of a digital camera, or the like. Thus, the present invention is applicable to any and all electronic appliances in which a liquid crystal display device or an organic EL display device is incorporated.
Number | Date | Country | Kind |
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2011-004475 | Jan 2011 | JP | national |
Number | Date | Country | |
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Parent | 13979478 | Sep 2013 | US |
Child | 15067771 | US |