Patent Application
20230207730
The disclosure relates to a semiconductor heterostructure and a method of making the same. In particular the disclosure relates to a nanocolumn (NC) heterostructure suitable for use as an optoelectronic device such as a light emitting diode (LED), or any other semiconductor device based on quantum wells such as a resonant-tunnelling diode.
Nanocolumn based LEDs may comprise nanowires, nanorods or nanopillars. The LED is a device composed of an array of NCs where the active region is vertically stacked and sandwiched between n- and p-type regions of the NC body. They can be either grown by a bottom-up method, for example by molecular beam epitaxy or fabricated from the top down.
Such NCs with an axially arranged active region exhibit improved crystalline quality despite being grown on non-native substrates. However, the active region area of such a device is reduced in comparison to a flat analogue and no emission from non-polar planes of NCs can be generated for c-plane samples.
Alternatively, in core-shell type NCs the active region is placed all around the NC body. They are better quality and allow for an improvement in the total active region area well above that in an analogous flat structure. This is achieved by using high filling factors of NC arrays and high aspect ratios of NCs themselves. Most of the active region areas correspond to nonpolar m-planes, where a built-in electric field is absent. The absence of a quantum confinement Stark effect associated with the built-in electric fields leads to improved radiative recombination rates, which can lead to improved light output efficiency and also be crucial for certain high frequency applications.
Core-shell NCs typically have both semi-polar and non-polar facets (sometimes also top c-plane facets too). As the growth rate on the slanted semi-polar facets is normally slower in comparison to both non-polar and polar facets, the stack of quantum wells and barriers (QW stack) is thinner there leading to a parasitic pathway for electron-hole recombination.
In most cases, this issue is left unaddressed so that the non-polar facets get partially by-passed and the total active region area cannot be utilised fully. Moreover, as different facets incorporate indium differently during InGaN shell growth, they have different peak emission wavelengths. The resulting emission spectrum is composed of different bands with their relative intensities generally depending on excitation level applied.
When NCs are over-grown to form GaN—InGaN core-shell heterostructures, even initially flat topped NCs convert into apex topped ones with much thinner QW stacks on the slant semi-polar facets and often a thick quantum dot or disk at or near the pyramid apex.
III-nitride nanocolumns 5, 17 are overgrown to form a target QW stack around them 7, 19. Typically, this leads to the formation also of slanted (semi-polar 9, 21), and horizontal (polar 11) facets or quantum dots (24) in addition to the target vertical (non-polar) ones 7, 19. Both the semi-polar and polar facets lead to the creation of parasitic current paths with either non-radiative or undesired radiative (wrong wavelength) recombination. Thus, significant current by-passes the non-polar side walls.
One of possible solutions to this problem is to grow the final part of GaN core undoped. This part however needs to be quite thick because of possible unintentional doping. From the active region area point of view this part of NC is lost as no current can be injected to the portion of the QW stack on sidewalls of this undoped GaN.
In another solution which is the closest prior art, (D. W. Lin et al Purely sidewall InGaN/GaN core-shell nanorod green light-emitting diodes, 2015 International Conference on Optical MEMS and Nanophotonics (OMN), pp. 1-2 and A.-J. Tzou et al High-Efficiency InGaN/GaN Core-Shell Nanorod Light-Emitting Diodes With Low-Peak Blueshift and Efficiency Droop, IEEE Trans. Nanotechnol., 16 (2017) 355-358), a cap is used to cover the body of the dry etched NC. When such NCs are overgrown to form core-shell heterostructure, semi-polar facets are formed outside the cap layer and so the by-passing problem is solved only partly: no current flows through the c-plane facet but current can still flow through the semi-polar facets. Moreover, this method does not address the problem of built-in dislocations.
Other problems in the field are the so-called green gap problem i.e. the lack of an efficient emitter in the green and another problem is efficiency droop i.e. decrease of the internal (and as a result external) quantum efficiency at high carrier densities. These problems are particularly pronounced for display Applications where a high colour purity is required. For example, U.S. Pat. Publication No. US2014/0246647 A1 disclose a process that includes a mechanical removal of all the unwanted facets at nanorod apexes and the relative quantum-well regions previously deposited on them followed by passivation of the resulting nanorod top facet with an insulator placed using a separate lithographic step. The same polishing-off approach was also proposed in an earlier Pat. Publication No. US 2008/0036038 A1, for the purpose of obtaining flat mirrors of a nanowire laser device. However, this process is very difficult to achieve industrial implementation, as the precise height control (on a sub-micrometre scale) of the polishing step is hardly possible across a full wafer of large diameters (20 and 30 cm are current industry standards in the field). In addition to that, both processes rely on a bottom-up approach, whereby the nanostructures are grown on a previously patterned substrate, a technique that is known to lead to inhomogeneous heights and also significant variations in diameter between nanorods.
There is therefore a need to provide a semiconductor heterostructure device and a method of making the same to overcome at least one of the above mentioned problems.
In accordance with a first aspect of the invention there is provided, as set out in the appended claims, a semiconductor heterostructure device for use as a component in an optoelectronic device, the device comprising:
The present invention provides a new type of structure and based on an industrially compatible top-down approach, whereby quantum wells on nanocolumn facets of unwanted orientations are eliminated. An important aspect to the invention is the presence of a novel, self-centred passivation disc, or disc like shape, created on top of the nanostructures before the deposition of the quantum wells. In addition to preventing the current injection directly into the nanocolumn, the structure has a completely new function of acting as a three-dimensional constraint for the epitaxial growth of the quantum wells, forcing the quantum wells to be deposited only along the target facets. The self-centring system for the dielectric caps means that, unlike the previously disclosed processes, this invention does not rely on any lithographic alignment step. This enables significantly higher nanostructure densities to be achieved.
In one embodiment, the overhang is formed by etching the nanocolumn to reduce the width of the nanocolumn and to reduce the number of dislocations.
In one embodiment, the etching comprises wet etching.
In one embodiment, the overhang is between 0.05 and 1.5 microns.
In one embodiment, a second passivation layer is deposited on the substrate between adjacent nanocolumns.
In one embodiment, the nanocolumns with the passivation layer are annealed and/or overgrown in an ammonia containing atmosphere to controllably form m-plane facets and/or remove some residual dislocations prior to deposition of the QW stack.
In one embodiment, the device further comprises a top contact layer, for example a p-doped contact layer.
In one embodiment, the top contact layer is grown upwards from the substrate.
In one embodiment, a metal contact is deposited on the top contact layer.
In one embodiment, the top contact layer extends a predetermined distance up the nanocolumn.
In one embodiment, the nanocolumn further comprises residual slanted facets and the predetermined distance is set such that the top contact layer is not operatively coupled to the slanted facets.
In one embodiment, the quantum well(s) are located on non-polar facets of the nanocolumn.
In one embodiment, the passivation layer comprises an insulating dielectric material.
In one embodiment, the passivation layer comprises SiO2.
In one embodiment, the passivation layer comprises SiNx.
In one embodiment, the passivation layer comprises a combination of insulating dielectric materials.
In one embodiment, the passivation layer has a thickness of between 50 and 150 nanometres.
In one embodiment, the passivation layer is created by sputtering.
In one embodiment, the passivation layer is created using plasma enhanced chemical vapour deposition (PECVD).
In one embodiment, the passivation layer is created using atomic layer deposition (ALD).
In one embodiment, the thickness of the passivation layer can be selected to make the structure more reflective
In one embodiment, the distance from a metal layer can be tuned to make the structure more reflective.
In one embodiment, the thickness of the passivation layer can be selected to maximise interference for reflection to assist with extraction of light through the back of the device.
In one embodiment, the nanocolumn comprises a III-nitride compound.
In one embodiment, the nanocolumn comprises n-type Gallium Nitride.
In one embodiment, the nanocolumn comprises n-type Aluminium Gallium Nitride.
In one embodiment, the nanocolumn comprises n-type Aluminium Nitride.
In one embodiment, the nanocolumn is formed by dry etching which reduces the number of dislocations.
In one embodiment, the nanocolumn is formed by lithography.
In one embodiment, the passivation layer is formed using a mask located above the passivation layer and configured to prevent the removal of portions of the passivation layer.
In one embodiment, the mask is a hard mask.
In one embodiment, the mask comprises self-assembled nanospheres possibly shrunk by wet or dry etch to control their diameter.
In accordance with a second aspect of the invention there is provided a semiconductor heterostructure device for use as a component in an optoelectronic device, the device comprising:
In one embodiment, the quantum well(s) are located on non-polar facets of the nanocolumn.
In one embodiment, a metal contact is provided on top of the contact layer.
In one embodiment, hole injection is provided through the metal contact around the nanocolumn.
It will be appreciated that the features of the first aspect of the invention which relate to the substrate, nanocolumn, passivation layer and active region may be incorporated in the device of the second aspect of the invention.
In accordance with a third aspect of the invention there is provided a method for creating a semiconductor heterostructure device for use as a component in an optoelectronic device, the method comprising the steps of:
In one embodiment, the overhang is formed by etching the nanocolumn to reduce the number of dislocations.
In one embodiment, the etching comprises wet etching.
In one embodiment, the overhang is between 0.05 and 1.5 microns.
In one embodiment, a second passivation layer is deposited on the substrate between adjacent nanocolumns.
In one embodiment, the nanocolumns with the passivation layer are annealed and/or overgrown in an ammonia containing atmosphere to controllably form m-plane facets and/or remove some residual dislocations prior to deposition of the QW stack.
In one embodiment, the method further comprises the step of depositing a top contact layer over the passivation layer, nanocolumn and QW stack.
In one embodiment, the top contact layer is grown upwards from the substrate.
In one embodiment, a metal contact is deposited on the top contact layer.
In one embodiment, the top contact layer extends a predetermined distance up the nanocolumn.
In one embodiment, the nanocolumn further comprises residual slanted facets and the predetermined distance is set such that the top contact layer is not operatively coupled to the slanted facets.
In one embodiment, the QW stack is located on non-polar facets of the nanocolumn.
In one embodiment, the passivation layer comprises an insulating dielectric material.
In one embodiment, the passivation layer comprises SiO2.
In one embodiment, the passivation layer comprises SiNx.
In one embodiment, the passivation layer comprises a combination of insulating dielectric materials.
In one embodiment, the passivation layer has a thickness of between 50 and 150 nanometres.
In one embodiment, the passivation layer is created by sputtering.
In one embodiment, the passivation layer is created using plasma enhanced chemical vapour deposition (PECVD).
In one embodiment, the passivation layer is created using atomic layer deposition (ALD).
In one embodiment, the thickness of the passivation layer can be selected to make the structure more reflective
In one embodiment, the distance from a metal contact can be tuned to make the structure more reflective.
In one embodiment, the thickness of the passivation layer can be selected to maximise interference for reflection to assist with extraction of light through the back of the device.
In one embodiment, the nanocolumn is formed by dry etching.
In one embodiment, the nanocolumn is formed by lithography.
In one embodiment, the passivation layer is formed using a mask located above the passivation layer and configured to prevent the removal of portions of the passivation layer.
In one embodiment, the mask is a hard mask.
In one embodiment, wherein the mask comprises self-assembled nanospheres possibly shrunk by wet or dry etch to control their diameter.
In one embodiment, the passivation layer forces the overgrowth of the QW stack to happen only along the intended direction. In one embodiment, the passivation layer inhibits any undesirable current injection through the top of the nanocolumns.
It is expected that the heterostructures so created will result in the production of more efficient optoelectronic devices, particularly more efficient LEDs with improved spectral purity.
In accordance with a fourth aspect of the invention there is provided a method for creating a semiconductor heterostructure device for use as a component in an optoelectronic device, the method comprising the steps of:
In one embodiment, the quantum well(s) are located on non-polar facets of the nanocolumn.
In one embodiment, a metal contact is provided on top of the contact layer.
In one embodiment, hole injection is provided through a metal contact around the nanocolumn.
It will be appreciated that the method steps of the method of the third aspect of the invention which relate to the substrate, nanocolumn, passivation layer and active region may be incorporated in the device of the second aspect of the invention.
The invention will be more clearly understood from the following description of an embodiment thereof, given by way of example only, with reference to the accompanying drawings, in which:
In at least one embodiment, the present invention provides a hybrid top-down-regrowth technique to fabricate dense arrays of GaN nanocolumns that are capped with a protective layer covering their top c-plane facets.
The present invention provides for efficient NC heterostructure based light emitting diodes (LEDs) and other optoelectronic devices with an active region located purely on non-polar facets of the NCs.
In this and other examples, the material used was of typical crystalline quality (dislocation density of 108-109 cm-3). In this and other examples of the present invention dislocation reduction is achieved by removal of almost all initial material and the associated dislocations by
Thus, the narrow NCs are left capped with a pre-deposited thin layer of material to which QW material does not stick at typical growth conditions (any material that can be used as a mask in selective area growth approaches).
The present invention eliminates parasitic current paths allowing LEDs to be created with emissions from the desired facets only. In one example the QW material is InGaN and the LED is a core-shell nanorod-based LED.
In one example, the hard nanomask comprised an array of closely packed silica nanospheres. However other techniques such as e-beam lithography, nanoimprinting can be used.
The automatic self-alignment to each NC nanodisk allows regrowth of the NCs recovering their diameter without formation of new dislocations while keeping constant NC height across the whole array and suppressing the formation of slant semi-polar facets and apexes at NC tops.
Moreover, the same persists when the capped NCs are overgrown to form a core-shell structure so that the shell can be formed only or mostly on their non-polar facets.
After the dry etch has been applied to form initial NCs, the layer remains only where it was shadowed by a hard nanomask.
The present invention exploits the presence of a specially processed, self-aligned, passivation layer which, in this embodiment comprises insulating self-centred passivation disks, to force the overgrowth of the QW stack only along the intended direction. In addition to that, the disks inhibit any undesirable current injection through the top of the nanocolumns. The heterostructures created results in the production of more efficient optoelectronic devices, particularly more efficient LEDs with improved spectral purity. The position of the self-centred passivation disc like shape functions as a constraint to ensure the quantum well stack is deposited along the vertical side of the column resulting in improved optoelectronic devices and material properties.
In one or more embodiments of the present invention, the NC is annealed in addition to bringing it up to the appropriate temperature for the QW stack overgrowth. This would assist both in the preforming shaping of the rods for the QW stack growth to the m-facets and also may ensure that any dislocations that can be remove are removed.
As shown in
The overhanging regions are formed by a wet-etch step for a few hours in solutions that contain hydroxide, which are able to anisotropically etch III-nitride materials. In particular, KOH-based solutions can be used for this purpose such as for example the resist developer AZ400K. The combined use of anisotropic etch and passivation layers that cannot be etched by the solution has never been reported before and constitutes a novel feature of the method of the present invention that makes it possible the formation of the overhangs created in the present invention.
As shown, in
The passivation layer 119 is deposited on the area between the bases of the nanocolumns. Any suitable deposition technique can be used, provided the floor is covered and, at the same time, the sidewalls are essentially exposed. This also includes spin-coating and curing of liquid passivation materials (such as HSQ or spin-on-glass), possibly followed by a diluted wet etch to remove any residuals from the sidewalls.
The presence of the passivation layers forces the growth of QW stack and cladding layers to take place only at the nanocolumn sidewalls. By controlling the growth conditions, the nanocolumn cross-section can be transformed from circular into hexagonal so that the QW stack can be precisely oriented on the non-polar m-plane facets.
This final layer 155 forms the top contact of the LED device and will typically be p-type, in contrast to the n-type doping of the starting material and nanocolumn cores. However, for other quantum-well based electronic devices such as resonant-tunnelling diodes, it can also be n-type.
By suppressing the doping on the first 50-200 nm of this in-filling material, a virtually insulating thin layer can be created at the base of the device, which can be used in substitution of the second passivation layer 149 at the nanocolumn floor (previously deposited, as shown in
The devices are subsequently fabricated as standard planar LEDs. In particular, mesa etch, and anode- and cathode-contact metal deposition are performed.
“Vertical” LED topologies are equally viable, as technology concept has no impact on these design aspects. To improve the light extraction from the bottom side, the thickness of the umbrella top-passivation and its distance from the metal can be tuned to make the structure more reflective 178.
In addition to fully suppressing the formation of horizontal polar facets on top of the nanocolumns, the nano-umbrellas are also able to suppress the slanted semi-polar facets. Depending on the growth conditions, this semipolar suppression may not be 100% achieved.
With this configuration the device may be fabricated using a standard, planar-LED process, but the modified version of the contact metallization 222 will prevent the current from being injected in the areas around the slanted facets. In fact, the overhang will shadow the critical parts during the metal evaporation and create small holes 224 in the metal contact 222 around each nanocolumn. This alternative fabrication process is able to completely inhibit any current shortcut through the slanted facets. Further, in this configuration the top contact metal can be chosen to be reflective.
Design of the thickness 225 of passivation layer 205 can be chosen to maximise light extraction through the bottom of the device. The thickness of the passivation layer may also be designed to maximised interference for reflection to assist with extraction of light through the back of the device.
This may be applied in both the device design where the passivation layer is overgrown by the top contact layer (effectively encapsulating the passivation layer) and in the design where the passivation layer is not overgrown (the semi polar facet issue solution variation). In the case where the device design is the overgrowth then the thickness of the contact layer between the metal contact and the passivation layer is also engineerable to maximise reflection.
In the examples of
In one or more embodiment of the present invention, the pitch of the NC array and the array geometry can (at the smaller length scales) be engineered to produce photonic crystal effects which could improve the extraction efficiency of the device.
In the specification, the terms “up”, vertical and horizontal have their ordinary meaning and refer to positions and directions relative to the substrate.
In the specification the terms “comprise, comprises, comprised and comprising” or any variation thereof and the terms “include, includes, included and including” or any variation thereof are considered to be totally interchangeable and they should all be afforded the widest possible interpretation and vice versa.
The invention is not limited to the embodiments hereinbefore described but may be varied in both construction and detail.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2007350.8 | May 2020 | EP | regional |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/EP2021/063210 | 5/18/2021 | WO |
