Semiconductor integrated circuit device

Abstract

The semiconductor integrated circuit device includes: a circuit to be protected connected between a power supply line and a ground line; a first resistance connected to an external input terminal at one terminal and to an input terminal of the circuit to be protected at the other terminal; a first electrostatic discharge protection circuit including a first voltage drop circuit connected to the power supply line at one terminal and to the input terminal of the circuit to be protected at the other terminal; and a second electrostatic discharge protection circuit including a second voltage drop circuit connected to the input terminal of the circuit to be protected at one terminal and to the ground line at the other terminal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram of a semiconductor integrated circuit device of Embodiment 1 of the present invention.

FIG. 2 is a circuit diagram of a semiconductor integrated circuit device of an alteration to Embodiment 1 of the present invention.

FIG. 3 is a circuit diagram of a semiconductor integrated circuit device of Embodiment 2 of the present invention.

FIG. 4 is a circuit diagram of a semiconductor integrated circuit device of a first alteration to Embodiment 2 of the present invention.

FIG. 5 is a circuit diagram of a semiconductor integrated circuit device of a second alteration to Embodiment 2 of the present invention.

FIG. 6 is a circuit diagram of a semiconductor integrated circuit device of Embodiment 3 of the present invention.

FIG. 7 is a circuit diagram of a conventional semiconductor integrated circuit device having ESD protection circuits.

Claims

1. A semiconductor integrated circuit device comprising: a circuit to be protected connected between a power supply line and a ground line;a first resistance connected to an external input terminal at one terminal and to an input terminal of the circuit to be protected at the other terminal;a first electrostatic discharge protection circuit including a first voltage drop circuit connected to the power supply line at one terminal and to the input terminal of the circuit to be protected at the other terminal; anda second electrostatic discharge protection circuit including a second voltage drop circuit connected to the input terminal of the circuit to be protected at one terminal and to the ground line at the other terminal.

2. The semiconductor integrated circuit device of claim 1, wherein the first electrostatic discharge protection circuit includes, as the first voltage drop circuit, at least one serially-connected first diode connected to the power supply line at an anode and to the input terminal of the circuit to be protected at a cathode.

3. The semiconductor integrated circuit device of claim 1, wherein the second electrostatic discharge protection circuit includes, as the second voltage drop circuit, at least one serially-connected second diode connected to the input terminal of the circuit to be protected at an anode and to the ground line at a cathode.

4. The semiconductor integrated circuit device of claim 1, further comprising: a third electrostatic discharge protection circuit connected to the power supply line at one terminal and to the external input terminal at the other terminal; anda fourth electrostatic discharge protection circuit connected to the external input terminal at one terminal and to the ground line at the other terminal.

5. The semiconductor integrated circuit device of claim 4, wherein the third electrostatic discharge protection circuit has a PMIS transistor that is connected to the power supply line at one terminal and to the external input terminal at the other terminal and whose gate is connected to the power supply line.

6. The semiconductor integrated circuit device of claim 5, wherein the third electrostatic discharge protection circuit has a second resistance connected to the power supply line at one terminal and to the gate of the PMIS transistor at the other terminal.

7. The semiconductor integrated circuit device of claim 4, wherein the fourth electrostatic discharge protection circuit has an NMIS transistor that is connected to the external input terminal at one terminal and to the ground line at the other terminal and whose gate is connected to the ground line.

8. The semiconductor integrated circuit device of claim 7, wherein the fourth electrostatic discharge protection circuit has a third resistance connected to the ground line at one terminal and to the gate of the NMIS transistor at the other terminal.

9. The semiconductor integrated circuit device of claim 4, wherein the third electrostatic discharge protection circuit has a third diode or a first thyristor connected to the power supply line at a cathode and to the external input terminal at an anode.

10. The semiconductor integrated circuit device of claim 4, wherein the fourth electrostatic discharge protection circuit has a fourth diode or a second thyristor connected to the external input terminal at a cathode and to the ground line at an anode.

11. The semiconductor integrated circuit device of claim 1, wherein the circuit to be protected includes: a PMIS transistor that is connected to the power supply line at one terminal and to an output terminal of the circuit to be protected at the other terminal and whose gate is connected to the input terminal of the circuit to be protected; andan NMIS transistor that is connected to the output terminal of the circuit to be protected at one terminal and to the ground line at the other terminal and whose gate is connected to the input terminal of the circuit to be protected.

12. A semiconductor integrated circuit device comprising: a circuit to be protected connected to an external input terminal;a first electrostatic discharge protection circuit connected to a power supply line at one terminal and to the external input terminal at the other terminal;a second electrostatic discharge protection circuit connected to the external input terminal at one terminal and to a ground line at the other terminal;a first resistance connected to the power supply line at one terminal and to a power supply input terminal of the circuit to be protected; anda third electrostatic discharge protection circuit including a first voltage drop circuit and connected to the power supply input terminal of the circuit to be protected at one terminal and electrically connected to the ground line at the other terminal.

13. The semiconductor integrated circuit device of claim 12, further comprising a second resistance connected to a ground input terminal of the circuit to be protected at one terminal and to the ground line at the other terminal.

14. The semiconductor integrated circuit device of claim 13, wherein the third electrostatic discharge protection circuit includes, as the first voltage drop circuit, at least one serially-connected first diode connected to the power supply input terminal of the circuit to be protected at an anode and to the ground input terminal of the circuit to be protected at a cathode.

15. The semiconductor integrated circuit device of claim 14, wherein the first voltage drop circuit has at least two first diodes, and also has a second diode connected to an input terminal of the circuit to be protected at one terminal and to a node or one of nodes between the at least two first diodes at the other terminal.

16. The semiconductor integrated circuit device of claim 13, wherein the third electrostatic discharge protection circuit includes, as the first voltage drop circuit, a Zener diode connected to the power supply input terminal of the circuit to be protected at a cathode and to the ground input terminal of the circuit to be protected at an anode.

17. The semiconductor integrated circuit device of claim 13, wherein the third electrostatic discharge protection circuit is connected to the ground line at the other terminal, and the device further comprises a fourth electrostatic discharge protection circuit including a second voltage drop circuit and connected to the power supply line at one terminal and to the ground input terminal of the circuit to be protected at the other terminal.

18. The semiconductor integrated circuit device of claim 17, wherein the third electrostatic discharge protection circuit includes, as the first voltage drop circuit, at least one serially-connected first diode connected to the power supply input terminal of the circuit to be protected at an anode and to the ground line at a cathode, and the fourth electrostatic discharge protection circuit includes, as the second voltage drop circuit, at least one serially-connected second diode connected to the power supply line at an anode and to the ground input terminal of the circuit to be protected at a cathode.

19. The semiconductor integrated circuit device of claim 17, wherein the third electrostatic discharge protection circuit includes, as the first voltage drop circuit, a first Zener diode connected to the power supply input terminal of the circuit to be protected at a cathode and to the ground line at an anode, and the fourth electrostatic discharge protection circuit includes, as the second voltage drop circuit, a second Zener diode connected to the power supply line at a cathode and to the ground input terminal of the circuit to be protected at an anode.

20. The semiconductor integrated circuit device of claim 12, wherein the first electrostatic discharge protection circuit has a PMIS transistor that is connected to the power supply line at one terminal and to the external input terminal at the other terminal and whose gate is connected to the power supply line.

21. The semiconductor integrated circuit device of claim 20, wherein the first electrostatic discharge protection circuit has a third resistance connected to the power supply line at one terminal and to the gate of the PMIS transistor at the other terminal.

22. The semiconductor integrated circuit device of claim 12, wherein the second electrostatic discharge protection circuit has an NMIS transistor that is connected to the external input terminal at one terminal and to the ground line at the other terminal and whose gate is connected to the ground line.

23. The semiconductor integrated circuit device of claim 22, wherein the second electrostatic discharge protection circuit has a fourth resistance connected to the ground line at one terminal and to the gate of the NMIS transistor at the other terminal.

24. The semiconductor integrated circuit device of claim 12, wherein the first electrostatic discharge protection circuit has a third diode or a first thyristor connected to the power supply line at a cathode and to the external input terminal at an anode.

25. The semiconductor integrated circuit device of claim 12, wherein the second electrostatic discharge protection circuit has a fourth diode or a second thyristor connected to the external input terminal at a cathode and to the ground line at an anode.

26. The semiconductor integrated circuit device of claim 13, wherein the circuit to be protected includes: a PMIS transistor that is connected to the power supply input terminal of the circuit to be protected at one terminal and to an output terminal of the circuit to be protected at the other terminal and whose gate is connected to the input terminal of the circuit to be protected; andan NMIS transistor that is connected to the output terminal of the circuit to be protected at one terminal and to the ground input terminal of the circuit to be protected at the other terminal and whose gate is connected to the input terminal of the circuit to be protected.