Semiconductor integrated circuit

Abstract

In order to set with a high precision the value of rush current flowing in the power switch circuit at the time of turning “on” the power, the internal circuit Int_Cir of the LSI is supplied with the internal source voltage Vint from the output transistor MP1 of the regulator VReg of the power switch circuit PSWC. The power switch circuit PSWC includes a control circuit CNTRLR and a start-up circuit STC. During the initial period Tint following the turning “on” of the power supply, the start-up circuit STC controls the output transistor MP1 and reduces the primary rush current so that the output current Isup of the output transistor MP1 may represent an approximately constant increment as the time passes. The difference ΔV between the internal current voltage due to the charge of load capacitance C with the output current Isup controlled by the start-up circuit STC and the current voltage Vint from the regulator VReg is set within the predetermined limit to reduce the secondary rush current.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram showing a circuit structure of the semiconductor integrated circuit according to a mode of carrying put of the present invention;

FIG. 2 is a diagram showing a more detailed circuit structure of the semiconductor integrated circuit according to a mode of carrying out of the present invention shown in FIG. 1;

FIG. 3 is an illustration describing the operating characteristics of the semiconductor integrated circuit according to a mode of carrying out of the present invention shown in FIG. 1 and FIG. 2;

FIG. 4 is a circuit diagram of the startup current generating circuit LSCG according to another mode of carrying out;

FIG. 5 is a circuit diagram of the startup current generating circuit LSCG according to another mode of carrying out;

FIG. 6 is a circuit diagram of the startup current generating circuit LSCG according to another mode of carrying out;

FIG. 7 is a circuit diagram of the startup current generating circuit LSCG according to another mode of carrying out;

FIG. 8 is a circuit diagram of the ring oscillator ROSC, an element circuit for constituting the startup voltage generating circuit LSVG shown in FIG. 3;

FIG. 9 is a circuit diagram of the divider DIV, an element circuit for constituting the startup voltage generating circuit LSVG shown in FIG. 3;

FIG. 10 is a circuit diagram of the charge pump circuit CPC, an element circuit for constituting the startup voltage generating circuit LSVG shown in FIG. 3;

FIG. 11 is a diagram showing the circuit structure of the power switch circuit PSWC according to another mode of carrying out the present invention;

FIG. 12 is a diagram showing the circuit structure of the power switch circuit PSWC according to another mode of carrying out the present invention;

FIG. 13 is a diagram showing the circuit structure of the power switch circuit PSWC according to another mode of carrying out the present invention;

FIG. 14 is a diagram showing the circuit structure of the power switch circuit PSWC according to still another mode of carrying out the present invention;

FIG. 15 is a diagram showing the circuit structure of the power switch circuit PSWC according to still another mode of carrying out the present invention; and

FIG. 16 is a top plan layout view of a semiconductor chip according to the most specific mode of carrying out the present invention.

Claims

1. A semiconductor integrated circuit comprising: a power switch circuit for starting the output of an internal source voltage to be supplied to a semiconductor chip from an external source voltage supplied from outside said semiconductor chip; andan internal circuit into which said internal current voltage from said power switch circuit is supplied,wherein said power switch circuit further comprises an output transistor for, being supplied with said external source voltage, outputting said internal source voltage; a start-up circuit for controlling said output transistor so that the output current controlled to the predetermined value during the initial- period following the turning “on” of the external power supply may flow in said output transistor; and a control circuit for controlling said start-up circuit, andwherein said control circuit controls said start-up circuit in response to the turning “on” of the external power supply so that said start-up circuit may control said output transistor in such a way that said output current flowing in said output transistor during the initial period following the turning “on” of the external power supply may constitute effectively a constant increment as the time passes.

2. The semiconductor integrated circuit according to claim 1, wherein said start-up circuit comprises a bias element for biasing said output transistor so that said output current controlled to said predetermined value may flow in said output transistor during said initial period following the turning “on” of said external power supply;wherein said start-up circuit comprises a first switch for relating the current value of said output transistor with the current value of said bias element during the initial period following the turning “on” of the external power supply and a startup current generating circuit for generating an output current constituting effectively a constant increment as the time passes during the initial period following the turning “on” of said external power supply; andwherein said output current from said startup current generating circuit constituting effectively said constant increment during said initial period following the turning “on” of said external power supply is supplied to said bias element, said control circuit sets said first switch in the “on” state during the initial period following the turning “on” of said external power supply so that the current value of said output transistor may be related with the current value of said bias element, and said control circuit sets said first switch in the “off” state during said initial period following the turning “on” of said external power supply so that the current value of said output transistor may be effectively rendered unrelated with the current value of said bias element.

3. The semiconductor integrated circuit according to claim 2, further comprising a regulator for generating an internal source voltage to be supplied to said internal circuit out of said external source voltage received, wherein said control circuit controls said output transistor so that the fact that the difference between the value of said internal source voltage due to the charge of the load capacitance of said internal circuit with said output current of said output transistor during the initial period following the turning “on” of said external power supply and the value of said internal source voltage generated by said regulator is within the predetermined limit may be detected, and as a result of the detection any increase in said output current flowing in said output transistor for the passage of time may be stopped.

4. The semiconductor integrated circuit according to claim 3, further comprising a second switch connected between a voltage supply node to which any one voltage selected from said internal source voltage from said power switch circuit and said internal source voltage from said regulator is supplied and the output of said regulator for the sake of said internal circuit, wherein after said increase in said output current flowing in said output transistor based on said result of detection for the passage of time had been stopped, said control circuit controls said second switch to be in the “on” state so that said internal source voltage generated by said regulator may be supplied to said internal circuit so that said internal source voltage generated by said regulator may be supplied to said voltage supply node as said selected one voltage.

5. The semiconductor integrated circuit according to claim 4, wherein said regulator comprises an error amplifier that compares the reference voltage generating circuit, the reference voltage from said reference voltage generating circuit and the level of said internal source voltage to be outputted to said voltage supply node to control said level of said internal source voltage, andwherein said error amplifier detects that the difference between the value of said internal source voltage due to the charge of the load capacitance of said internal circuit by said output current of said output transistor controlled by said start-up circuit during the initial period following the turning “on” of said external power supply and the value of said internal source voltage generated by said regulator is within the predetermined limit.

6. The semiconductor integrated circuit according to claim 5, further comprising: a level shift circuit for generating level shift output signals whose level have shifted to the ground potential side from said internal source voltage outputted in said voltage supply node; anda third switch connected between said level shift circuit and the negative feedback terminal of the error amplifier of said regulator,wherein during the initial period following the turning “on” of said external power supply, said control circuit controls said third switch in either one of the “off” state and the “on” state, and impresses said level shift output signals generated by said level shift circuit onto the negative feedback input terminal of said regulator so that a higher voltage determined by the level shift voltage of said level shift circuit than said reference voltage during said initial period following the turning “on” of said external power supply may be generated in said voltage supply node.

7. The semiconductor integrated circuit according to claim 1, wherein said startup current generating circuit is constituted in such a way that said output current of said startup current generating circuit may be effectively shut of f after the passage of said initial period following the turning “on” of said external power supply.

8. The semiconductor integrated circuit according to claim 1, wherein said regulator comprises any ones of series regulator, switching regulator, and switched capacitor-type regulator, andwherein after the passage of said initial period following the turning “on” of said external power supply, the voltage of said internal source voltage supplied to said internal circuit is set by the action of any one of said regulators.

9. The semiconductor integrated circuit according to claim 1, wherein an external source voltage supply line for supplying said power switch circuit with said external source voltage is disposed in an encircling manner on the outer edge of the inside of said semiconductor chip,wherein a plurality of said power switch circuits are disposed inside said external source voltage supply line disposed in an encircling manner,wherein an internal source voltage supply line for supplying said internal circuit with said internal source voltage outputted by said plurality of power switch circuits within said external source voltage supply line is disposed in an encircling manner, andwherein said internal circuit is disposed within said internal source voltage supply line disposed in an encircling manner.

10. A semiconductor integrated circuit comprising: a power switch circuit for starting the output of internal source voltage into said external source voltage supply line disposed in an encircling manner from the external source voltage supplied from outside of the semiconductor chip, and an internal circuit to which said internal source voltage from said power switch is supplied, wherein said power switch circuit includes an output transistor for outputting said internal source voltage out of said external source voltage supplied, a start-up circuit for controlling said output transistor so that the output current may flow in said output transistor during the initial period following the turning “on” of said external power supply, and a control circuit for controlling said start-up circuit; anda regulator for generating an internal source voltage to be supplied to said internal circuit out of said external source voltage supplied,wherein the fact that the difference between the value of said internal source voltage due to the charge of the load capacitance of said internal circuit by said output current of said output transistor controlled by said start-up circuit during the initial period following the turning “on” of said external power supply and the value of said internal source voltage generated by said regulator is within the predetermined limit is detected,wherein the semiconductor integrated circuit further comprises a switch connected between a voltage supply node to which any one voltage selected from said internal source voltage from said power switch circuit and said internal source voltage from said regulator is supplied and the output of said regulator for the sake of said internal circuit, andwherein based on said result of detection, said control circuit controls said switch to be in the “on” state so that said internal source voltage generated by said regulator may be supplied to said internal circuit so that said internal source voltage generated by said regulator may be supplied to said voltage supply node as said selected one voltage.

11. The semiconductor integrated circuit according to claim 10, wherein said regulator comprises an error amplifier that compares the reference voltage generating circuit, the reference voltage from said reference voltage generating circuit and the level of said internal source voltage to be outputted to said voltage supply node to control said level of said internal source voltage, andwherein said error amplifier detects that the difference between the value of said internal source voltage due to the charge of the load capacitance of said internal circuit by said output current of said output transistor controlled by said start-up circuit during the initial period following the turning “on” of said external power supply and the value of said internal source voltage generated by said regulator is within the predetermined limit.

12. The semiconductor integrated circuit according to claim 11, further comprising: a level shift circuit for generating level shift output signals whose level have shifted to the ground potential side from said internal source voltage outputted in said voltage supply node; andanother switch connected between said level shift circuit and the negative feedback terminal of the error amplifier of said regulator,wherein during the initial period following the turning “on” of said external power supply, said control circuit controls said other switch in either one of the “off” state and the “on” state, and impresses said level shift output signals generated by said level shift circuit onto the negative feedback input terminal of said regulator so that a higher voltage determined by the level shift voltage of said level shift circuit than said reference voltage during said initial period following the turning “on” of said external power supply may be generated in said voltage supply node.

13. The semiconductor integrated circuit according to claim 10, wherein said startup current generating circuit is constituted in such a way that said output current of said startup current generating circuit may be effectively shut off after the passage of said initial period following the turning “on” of said external power supply.

14. The semiconductor integrated circuit according to claim 10, wherein said regulator comprises any ones of series regulator, switching regulator, and switched capacitor-type regulator, andwherein after the passage of said initial period following the turning “on” of said external power supply, the voltage of said internal source voltage supplied to said internal circuit is set by the action of any one of said regulators.

15. The semiconductor integrated circuit according to claim 10, wherein an external source voltage supply line for supplying said power switch circuit with said external source voltage is disposed encircling various elements on the outer edge of the inside of said semiconductor chip,wherein a plurality of said power switch circuits are disposed inside said external source voltage supply line disposed in encircling manner,wherein an internal source voltage supply line for supplying said internal circuit with said internal source voltage outputted by said plurality of power switch circuits within said external source voltage supply line is disposed in an encircling manner, andwherein said internal circuit is disposed within said internal source voltage supply line disposed in an encircling manner.

16. A semiconductor integrated circuit comprising: a power switch circuit for starting the output of internal source voltage supplied inside said external source voltage supply line disposed encircling various elements from the external source voltage supplied from outside of the semiconductor chip, and an internal circuit to which said internal source voltage from said power switch is supplied,wherein said power switch circuit includes an output transistor for outputting said internal source voltage out of said external source voltage supplied, a start-up circuit for controlling said output transistor so that the output current controlled to the predetermined value may flow in said output transistor during the initial period following the turning “on” of said external power supply, and a control circuit for controlling said start-up circuit,wherein in response to the turning “on” of the external power supply, said control circuit controls said start-up circuit so that said start-up circuit controls said output transistor in such a way that said output current flowing in said output transistor during the initial period following the turning “on” of said external power supply may constitute effectively a constant increment for the passage of time;wherein the semiconductor integrated circuit further comprises a regulator for generating an internal source voltage to be supplied to said internal circuit out of said external source voltage supplied; and a switch connected between a voltage supply node to which any one voltage selected from said internal source voltage from said power switch circuit and said internal source voltage from said regulator is supplied and the output of said regulator for the sake of said internal circuit,wherein the fact the difference between the value of said internal source voltage due to the charge of the load capacitance of said internal circuit by said output current of said output transistor controlled by said start-up circuit during said initial period following the turning “on” of said external power supply and the value of said internal source voltage generated by said regulator is within the predetermined limit is detected, andwherein based on said result of detection, said control circuit controls said switch to be in the “on” state so that said internal source voltage generated by said regulator may be supplied to said internal circuit so that said internal source voltage generated by said regulator may be supplied to said voltage supply node as said selected one voltage.

17. The semiconductor integrated circuit according to claim 16, wherein said regulator comprises an error amplifier that compares the reference voltage generating circuit, the reference voltage from said reference voltage generating circuit and the level of said internal source voltage to be outputted to said voltage supply node to control said level of said internal source voltage, andwherein said error amplifier detects that the difference between the value of said internal source voltage due to the charge of the load capacitance of said internal circuit by said output current of said output transistor controlled by said start-up circuit during said initial period following the turning “on” of said external power supply and the value of said internal source voltage generated by said regulator is within the predetermined limit.

18. The semiconductor integrated circuit according to claim 17, further comprising: a level shift circuit for generating level shift output signals whose level have shifted to the ground potential side from said internal source voltage outputted in said voltage supply node; andanother switch connected between said level shift circuit and the negative feedback input terminal of the error amplifier of said regulator,wherein during said initial period following the turning “on” of said external power supply, said control circuit controls said other switch in either one of the “off” state and the “on” state, and impresses said level shift output signals generated by said level shift circuit onto the negative feedback input terminal of said regulator so that a higher voltage determined by the level shift voltage of said level shift circuit than said reference voltage during said initial period following the turning “on” of said external power supply may be generated in said voltage supply node.

19. The semiconductor integrated circuit according to claim 16, wherein said startup current generating circuit is constituted in such a way that said output current of said startup current generating circuit may be effectively shut off after the passage of said initial period following the turning “on” of said external power supply.

20. The semiconductor integrated circuit according to claim 16, wherein said regulator comprises any ones of series regulator, switching regulator, and switched capacitor-type regulator, andwherein after the passage of said initial period following the turning “on” of said external power supply, the voltage of said internal source voltage supplied to said internal circuit is set by any one of said regulators.

21. The semiconductor integrated circuit according to claim 16, wherein an external source-voltage supply line for supplying said power switch circuit with said external source voltage is disposed in an encircling manner along the outer edge of the inside of said semiconductor chip,wherein a plurality of said power switch circuits are disposed inside said external source voltage supply line disposed in an encircling manner,wherein an internal source volt-age supply line for supplying said internal circuit with said internal source voltage outputted by said plurality of power switch circuits within said external source voltage supply line is disposed in an encircling manner, andwherein said internal circuit is disposed within said internal source voltage supply line disposed in an encircling manner.