SEMICONDUCTOR INTEGRATED CIRCUIT

Abstract

A semiconductor integrated circuit includes an audio signal amplifier and a video signal amplifier built in a single semiconductor chip, the audio signal amplifier and the video signal amplifier being configured to receive a supply of a positive power supply voltage and a negative power supply voltage. The semiconductor integrated circuit further includes a negative voltage generation circuit that generates the negative power supply voltage and supplies the negative power supply voltage to the audio signal amplifier and the video signal amplifier and a limit circuit that limits an amplitude of a signal input to the audio signal amplifier to a range free from an influence of a fluctuation in the negative power supply voltage supplied by the negative voltage generation circuit. Adverse effects on an audio signal due to a fluctuation of a negative voltage occurring in synchronization with the vertical period of a video signal can be suppressed with a simple additional circuit.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit block diagram of a semiconductor integrated circuit according to Embodiment 1 of the present invention.

FIG. 2 is a circuit diagram showing an exemplary configuration of a charge pump circuit included in the semiconductor integrated circuit.

FIG. 3 is a circuit block diagram of a semiconductor integrated circuit according to Embodiment 2 of the present invention.

FIG. 4 schematically illustrates waveforms showing the operation by the semiconductor integrated circuit.

FIG. 5 is a circuit diagram showing an exemplary configuration of a clipping circuit included in the semiconductor integrated circuit.

FIG. 6 illustrates waveforms showing the operation of the clipping circuit.

FIG. 7 is a circuit block diagram of a semiconductor integrated circuit according to Embodiment 3 of the present invention.

FIG. 8 schematically illustrates waveforms showing the operation of the semiconductor integrated circuit.

FIG. 9 is a circuit block diagram of a semiconductor integrated circuit according to Embodiment 4 of the present invention.

FIG. 10 schematically shows waveforms for explaining a problem occurring in the conventional configuration example in which an audio signal amplifier and a video signal amplifier are built in a single semiconductor integrated circuit.

Claims

1. A semiconductor integrated circuit, comprising an audio signal amplifier and a video signal amplifier mounted on a single semiconductor chip, the audio signal amplifier and the video signal amplifier being configured to receive a supply of a positive power supply voltage and a negative power supply voltage, wherein the semiconductor integrated circuit further comprises:a negative voltage generation circuit that generates the negative power supply voltage and supplies the negative power supply voltage to the audio signal amplifier and the video signal amplifier; anda limit circuit that limits an amplitude of a signal input to the audio signal amplifier to a range free from an influence of a fluctuation in the negative power supply voltage supplied by the negative voltage generation circuit.

2. The semiconductor integrated circuit according to claim 1, wherein the limit circuit is a clipping circuit that, when a signal with a peak value higher than a predetermined level is input, clips the peak value of the signal to the predetermined level and outputs the clipped signal.

3. The semiconductor integrated circuit according to claim 1, wherein the limit circuit is an AGC circuit having a function of controlling a gain automatically in accordance with an amplitude of an input signal.

4. The semiconductor integrated circuit according to claim 1, wherein the limit circuit limits an amplitude of an input signal to be in a peak-to-peak symmetry.

5. The semiconductor integrated circuit according to claim 1, wherein the limit circuit limits the amplitude of the signal input to the audio signal amplifier to an amplitude range smaller than a range where a fluctuation occurs in the negative power supply voltage resulting from a vertical synchronous signal of a video signal input to the video signal amplifier.

6. A semiconductor integrated circuit, comprising an audio signal amplifier and a video signal amplifier built in a single package, the audio signal amplifier and the video signal amplifier being configured to receive a supply of a positive power supply voltage and a negative power supply voltage, wherein the semiconductor integrated circuit further comprises:a negative voltage generation circuit that generates the negative power supply voltage and supplies the negative power supply voltage to the audio signal amplifier and the video signal amplifier; anda limit circuit that limits an amplitude of a signal input to the audio signal amplifier to a range free from an influence of a fluctuation in the negative power supply voltage supplied by the negative voltage generation circuit.

7. The semiconductor integrated circuit according to claim 6, wherein the limit circuit is a clipping circuit that, when a signal with a peak value higher than a predetermined level is input, clips the peak value of the signal to the predetermined level and outputs the clipped signal.

8. The semiconductor integrated circuit according to claim 6, wherein the limit circuit is an AGC circuit having a function of controlling a gain automatically in accordance with an amplitude of an input signal.

9. The semiconductor integrated circuit according to claim 6, wherein the limit circuit limits an amplitude of an input signal to be in a peak-to-peak symmetry.

10. The semiconductor integrated circuit according to claim 6, wherein the limit circuit limits the amplitude of the signal input to the audio signal amplifier to an amplitude range smaller than a range where a fluctuation occurs in the negative power supply voltage resulting from a vertical synchronous signal of a video signal input to the video signal amplifier.