“XP002097267 Enhancement/Depletion Decoder Circuit,” Dockerty et al., IBM Technical Disclosure Bulletin, vol. 19, No. 5, Oct. 1976, pp. 1681-1682. |
“XP002097268 Dynamic depletion circuits upgrade MOS performance,” Clay Cranford, Electronics, vol. 54, No. 13, Jun. 1981, pp. 128-129. |
“XP-002097269 Pass Transistor Realization of a General Boolean Function,” M. Y. Tsai, IBM Technical Disclosure Bulletin, vol. 26, No. 1, Jun. 1983, pp. 35-39. |
Nikkei Business Publication “White paper on low power consumption LSIs”; pp. 98-106; 1994. |
Akilesh Parameswar et al. “A High Speed, Low Power, Swing Restored Pass-Transistor Logic Based Multiply and Accumulate Circuit For Multimedia Applications”, PROC. IEEE 1994 CICC, pp. 278-281, May 1994. |
K. Yano et al. “A 3.8-ns CMOS 16×16-b Multiplier Using Complementary Pass-Transistor Logic”, IEEE J. Solid-State Circuits., vol. 25, No. 2, pp. 388-395, Apr. 1990. |