This application claims priority of Korean Patent Application No. 10-2012-0150314 filed on Dec. 21, 2012, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference.
Apparatuses and methods consistent with exemplary embodiments relate to a semiconductor light emitting device and a method of manufacturing the same.
A semiconductor light emitting device is able to emit light of various colors due to electron-hole recombination occurring at p-n junctions between p-type and n-type semiconductors when current is applied thereto. Such a semiconductor light emitting device is advantageous over a filament-based light emitting device in that it has a relatively long lifespan, relatively low power consumption, superior initial-operating characteristics, high vibration resistance, and the like. These factors have continually boosted demand for semiconductor light emitting devices.
Notably of late, a great deal of attention has been drawn to group III nitride semiconductors that can emit light in a blue/short wavelength region. Since group III nitrides such as GaN, AN, and the like have high thermal stability and a direct transition energy band structure, they are extensively used in photoelectric devices emitting light in blue and ultraviolet wavelength regions. Particularly, blue and green light emitting devices using GaN are widely used in various technical fields such as flat panel display devices, traffic lights, indoor lighting devices, high density light sources, high resolution output systems, optical communications systems, and the like.
Group III nitride semiconductor layers may be grown on a heterogeneous substrate having a hexagonal crystal structure such as a sapphire substrate, a silicon carbide (SiC) substrate, a silicon (Si) substrate, or the like, by metal organic vapor phase epitaxy (MOVPE), molecular beam epitaxy (MBE) or the like. However, in the case in which the group III nitride semiconductor layer is grown on the heterogeneous substrate, warpage may occur due to a difference in thermal expansion coefficients between the semiconductor layer and the substrate. Accordingly, when an active layer is grown on the semiconductor layer formed on the warped substrate, non-uniformity in temperature distribution may occur, resulting in an increase in wavelength distribution of light. In addition, cracks or warpage may be generated within the semiconductor layer due to differences in lattice constants and thermal expansion coefficients between the semiconductor layer and the substrate, resulting in dislocation. The cracks, warpage and dislocation within the semiconductor layer degrade the characteristics of a light emitting device.
In order to alleviate stress caused by the differences in lattice constants and thermal expansion coefficients between the semiconductor layer and the substrate, a buffer layer has been used. However, despite the use of the buffer layer, the differences in lattice constants and thermal expansion coefficients may still cause cracks within the semiconductor layer or damage to the substrate.
One or more exemplary embodiments provide a semiconductor light emitting device and a method of manufacturing the same capable of preventing warpage that may be generated due to a difference in thermal expansion coefficients between a semiconductor layer and a heterogeneous substrate when the semiconductor layer is grown on the heterogeneous substrate formed of a different material from that of the semiconductor layer.
One or more exemplary embodiments also provide a method of growing a semiconductor layer with reduced crystalline defects by preventing the occurrence of cracks within the semiconductor layer.
One or more exemplary embodiments also provide a semiconductor light emitting device that is less affected by a lattice constant and a thermal expansion coefficient of a substrate and a method of manufacturing the same.
According to an aspect of an exemplary embodiment, there is provided a method of manufacturing a semiconductor light emitting device, the method including: forming a plurality of concave portions in a surface of a substrate; injecting silica particles into the plurality of concave portions; and forming a semiconductor layer on the surface of the substrate having the plurality of concave portions, the semiconductor layer including a surface having a plurality of voids formed at locations facing the plurality of concave patterns.
The plurality of concave portions may be formed by etching the substrate.
The substrate may be formed of at least one selected from the group consisting of Si, Al2O3, SiC, MgAl2O4, MgO, LiAlO2 and LiGaO2.
The semiconductor layer may be formed by a lateral growth method.
A light emitting structure may be formed on the semiconductor layer.
According to another aspect of an exemplary embodiment, there is provided a semiconductor light emitting device including: a substrate including a surface having a plurality of concave portions which silica particles are disposed; a semiconductor layer disposed on the substrate and including a surface having a plurality of voids provided at locations facing the plurality of concave portions; a light emitting structure disposed on the semiconductor layer and including a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer; and first and second electrodes connected to the first and second conductivity type semiconductor layers, respectively.
The substrate may be formed of at least one selected from the group consisting of Si, Al2O3, SiC, MgAl2O4, MgO, LiAlO2 and LiGaO2.
Each of the plurality of concave portions may have a depth of 5 nm to 5 μm.
The plurality of concave portions may have an interval of 1 nm to 10 μm therebetween.
The plurality of concave patterns may form a pattern having a quadrangular shape.
The quadrangular shape may have a side length of 5 nm to 5 μm.
The plurality of concave portions may form a pattern having a circular shape.
The circular shape may have a diameter of 5 nm to 5 μm.
The silica particles may be spherical-shaped silica balls.
The silica balls may have a diameter of 5 nm to 5 μm.
The above and other aspects will be more clearly understood from the following detailed description of exemplary embodiments taken in conjunction with the accompanying drawings, in which:
Exemplary embodiments of the inventive concept will now be described in detail with reference to the accompanying drawings.
The inventive concept may, however, be exemplified in many different forms and should not be construed as being limited to the specific exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art.
In the drawings, the shapes and dimensions of elements may be exaggerated for clarity, and the same reference numerals will be used throughout to designate the same or like elements.
As shown in
The substrate 10 may be provided for semiconductor growth. The substrate 10 may be made of a semiconductor material having insulating and conducting properties such as sapphire, SiC, MgAl2O4, MgO, LiAlO2, LiGaO2, GaN or the like. A sapphire substrate widely used as a semiconductor growth substrate is formed of a crystal having Hexa-Rhombo R3c symmetry, and has a lattice constant of 13.001 Å in a C-axis and a lattice constant of 4.758 Å in an A-axis. Orientation planes of the sapphire substrate include a C (0001) plane, an A (1120) plane, an R (1102) plane, and the like. In particular, the C plane is mainly used as a substrate for nitride growth as it facilitates the growth of a nitride film and is stable at high temperatures. A silicon (Si) substrate may also be appropriate to be used as the substrate 10. The use of a silicon substrate, which should have a large diameter and be relatively low in price, may facilitate mass-production. In the case in which a silicon substrate is used, a nucleation layer made of AlxGa1-xN may be formed on the substrate 10 and a nitride semiconductor having a desired structure may be grown thereon.
However, such a sapphire or silicon (Si) substrate and a semiconductor layer grown thereon, for example, a nitride semiconductor layer, may have relatively large differences in terms of lattice constants and thermal expansion coefficients. In order to obtain a high quality semiconductor layer, a buffer structure capable of alleviating such differences may be used.
Next, as shown in
Then, as shown in
When viewed from a top surface of the substrate 10, a pattern or shape formed by the one or more concave portions 20 may be circular, quadrangular, stripes or the like. Here, the quadrangular shape includes a trapezoidal shape, a rectangular shape and a square shape. Here, a depth of the concave portions 20 may be 5 nm to 5 μm or an interval between the concave portions 20 may be 1 nm to 10 μm.
For example, in the case in which the shape of the concave portion 20 is circular, a diameter thereof may be 5 nm to 5 μm, and in the case in which the cross-section of the concave portion 20 is quadrangular, a length of sides thereof may be 5 nm to 5 μm.
Thereafter, as shown in
In
Alternatively, as shown in
Then, as shown in
When the lower semiconductor layer 50 is laterally grown on the substrate 10 under favorable conditions for lateral growth using metal organic chemical vapor deposition (MOCVD), epitaxial growth, or the like, the growth of the lower semiconductor layer 50 may be initiated on a portion of the substrate 10 in which the concave portion 20 is not formed, while the lower semiconductor layer 50 may not be grown on a portion thereof in which the concave portion 20 is formed. In particular, the growth of the lower semiconductor layer 50 over the concave portion 20 may be disturbed due to the silica particle 30 injected into the concave portion 20. Therefore, the lower semiconductor layer 50 may include a plurality of voids 40 formed above the concave portions 20. The voids 40 may reduce a contact area between the substrate 10 and the lower semiconductor layer 50 formed on the substrate 10, thereby alleviating stress caused by the differences in lattice constants and thermal expansion coefficients between the substrate and the lower semiconductor layer 50.
Here, the lower semiconductor layer 50 may be an undoped semiconductor layer and serve as an additional buffer, but is not limited thereto. The lower semiconductor layer 50 may form a portion of a light emitting structure.
Then, as shown in
The light emitting structure 60 may include a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer sequentially stacked, and a first electrode formed on a portion of the first conductivity type semiconductor layer exposed by etching portions of the active layer and the second conductivity type semiconductor layer, and a second electrode formed on the second conductivity type semiconductor layer.
Alternatively, the light emitting structure 60 may include a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer sequentially stacked, and a first electrode formed on the first conductivity type semiconductor layer, and a second electrode formed on the second conductivity type semiconductor layer.
Here, the first conductivity type semiconductor layer of the light emitting structure 60 may be formed by doping the lower semiconductor layer 50 with impurities.
As discussed above, the contact area between the substrate 10 and the semiconductor layer 50 formed on the substrate 10 may be reduced to thereby alleviate warpage caused by the differences in thermal expansion coefficients between the substrate 10 and the semiconductor layer 50. In addition, the silica particles 30 injected into the concave portions 20 may serve to withstand stress in a direction in which the substrate 10 is warped, thereby effectively preventing the warpage of the substrate 10.
Accordingly, the semiconductor layer 50 may not be affected by the lattice constant and the thermal expansion coefficient of the substrate 10. When the semiconductor layer 50 is obtained in this manner, crystalline quality may be improved. Therefore, an additional process for preventing damage to the semiconductor layer 50 may be omitted.
In addition, the voids 40 formed in the surface of the semiconductor layer 50 that faces and contacts the substrate 10 may serve as a stress buffer, such that cracks occurring due to the difference in thermal expansion coefficients between the substrate 10 and the semiconductor layer 50 may be significantly reduced.
Furthermore, the concave portions 20 formed on the substrate 10 may have an effect on improvement of light extraction efficiency, and light extraction efficiency may be improved according to a difference in refractive index between the substrate 10 and the inside of the voids 40.
Tables 1 and 2 illustrate the radii of curvature of substrates according to exemplary embodiments and comparative examples by comparing a case in which a semiconductor layer is grown on a substrate having concave portions according to an exemplary embodiment with cases in which a semiconductor layer is grown on a substrate having a flat top surface without concave portions (comparative example 1) and on a patterned sapphire substrate (PSS) (comparative example 2). Here, Table 1 indicates the radii of curvature measured at 1000° C. while a GaN semiconductor layer is formed on a sapphire substrate, and Table 2 indicates the radii of curvature measured after the GaN semiconductor layer formed on the sapphire substrate is cooled. Also,
As shown in Table 1 and
With reference to
The substrate 10 is a wafer for manufacturing a semiconductor light emitting device. The substrate 10 may be formed of at least one selected from the group consisting of Si, Al2O3, SiC, MgAl2O4, MgO, LiAlO2 and LiGaO2.
A plurality of concave portions 20 may be formed in a top surface of the substrate 10, the concave portions 20 each having at least one silica particle 30 disposed therein.
The lower semiconductor layer 50 may be formed on the substrate 10. The lower semiconductor layer 50 may be formed of a semiconductor material expressed by AlxInyGa1−x−yN (0≦x≦1, 0≦y≦1, 0≦x+y≦1). The lower semiconductor layer 50 may include a void formed in a position corresponding to the concave portion 20 formed in the substrate 10.
The light emitting structure including the first conductivity type semiconductor layer 150, the active layer 160, and the second conductivity type semiconductor layer 170 may be formed on the lower semiconductor layer 50.
The first electrode 180 may be formed on a portion of the first conductivity type semiconductor layer 150 exposed by dry-etching portions of the active layer 160 and the second conductivity type semiconductor layer 170, and the second electrode 190 may be formed on the second conductivity type semiconductor layer 170.
In addition, a transparent electrode may be further formed between the second conductivity type semiconductor layer 170 and the second electrode 190 for current spreading.
The semiconductor light emitting device according to this exemplary embodiment may be less affected by a difference in thermal expansion coefficients between the substrate and the semiconductor layers, thereby preventing warpage, and thus, it may have uniform light characteristics.
In addition, the semiconductor light emitting device may be formed of semiconductor layers having less crystalline defects by being less affected by the lattice constant and thermal expansion coefficient of the substrate.
A package 1000 of
A package 2000 of
In the lighting device 5000, the light emitting module 5003 may include the external housing 5006 serving as a heat radiating part, and the external housing 5006 may include a heat sink plate 5004 in direct contact with the light emitting module 5003 and a plurality of heat radiating fins 5005 exposed outwardly to thereby improve the dissipation of heat. In addition, the lighting device 5000 may include the cover unit 5007 disposed above the light emitting module 5003 and having a convex lens shape. The driving unit 5008 may be disposed inside the internal housing 5009 and connected to the external connector unit 5010 such as a socket structure to receive power from an external power source. In addition, the driving unit 5008 may convert the received power into power appropriate for driving the semiconductor light emitting device 5001 of the light emitting module 5003 and supply the converted power thereto. For example, the driving unit 5008 may be provided as an AC-DC converter, a rectifying circuit part, or the like.
As set forth above, according to exemplary embodiments, warpage caused by a difference in thermal expansion coefficients between a substrate and a semiconductor layer may be prevented.
In addition, the occurrence of cracks in the semiconductor layer may be prevented, whereby the semiconductor layer, when grown, may have reduced crystalline defects.
Furthermore, a semiconductor light emitting device may be less affected by a lattice constant and a thermal expansion coefficient of the substrate.
While the present inventive concept has been shown and described in connection with the exemplary embodiments, it will be apparent to those skilled in the art that modifications and variations can be made without departing from the spirit and scope of the inventive concept as defined by the appended claims.
Number | Date | Country | Kind |
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10-2012-0150314 | Dec 2012 | KR | national |